In previous gpio default isr, interrupt status bits get cleared at the exit of the isr.
However, for edge-triggered interrupt type, the interrupt status bit should be cleared before entering the per-pin handlers to avoid any potential interrupt lost.
Closes https://github.com/espressif/esp-idf/pull/6853
essl_spi: fix wrong dummy cycle under quad spi mode ant add a test to verify spi quad mod
Closes IDF-5182 and IDF-5181
See merge request espressif/esp-idf!18680
This commit gives basic mmu driver framework. Now it is able to maintain
mmu virtual address usage on esp32, esp32s2 and esp32s3. Usage to
external virtual address should rely on mmu functions to know which
address range is available, instead of hardcoded.
This commit also improves psram memory that is added to the heap
allocator. Now it's added to the heap, according to the memory
alignment.
Closes https://github.com/espressif/esp-idf/issues/8295
1.The dummy_bits is set to 4 in ESP32C3/C2, therefore, the data transmission started too early.This commit fix this issue by changing dummy_bits to 8.
2.Put the spi command the spi defintion in spi_types.h
3.Put the function which get spi command or dummy bits in spi_ll.h
uart: update console docs about frequency for ESP32-C2, move frequency of clock sources out of HAL
Closes IDF-5424 and IDF-4332
See merge request espressif/esp-idf!19274
Prior to this commit, adc ulp is disabled by setting
adc_oneshot_unit_init_cfg_t::ulp_mode to false.
After this commit, a new enum `ADC_ULP_MODE_DISABLE` is added. So
setting `ulp_mode` to `ADC_ULP_MODE_DISABLE`, instead of `false`, to
disable the ulp mode.
Closes: https://github.com/espressif/esp-idf/issues/9208
When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
All gpio hal and ll functions input arguments gpio_num_t are changed to uint32_t type.
Validation of gpio num should be guaranteed from the driver layer.
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:
1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.
For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.
This introduced two possible issues:
1. Overflow when multiplying systimer counter by 5
- Should not be an issue, since systimer counter is 52-bit, so
counter * 5 is no more than 55-bit.
2. The code needs to perform:
- divide by 5: when converting from microseconds to ticks
- divide by 52: when converting from ticks to microseconds
The latter potentially introduces a performance issue for the
esp_timer_get_time function.
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:
- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead
Also updated soc_hal.h as follows:
- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.
This commit also updates the XCHAL_ERRATUM_572 workaround by
- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
This commit fixes the systimer_counter_value_t by adding a resreved field so that the
type fills 64-bits.
Without the reserved field, when compiling with -O0 optimization, the unoccupied high
bits would not be initalized by the compiler, leading to systimer_hal_get_counter_value()
returning a garbage value.
Since ulp wakeup signal are connected to ulp int raw(except esp32), we
need to clear ulp int raw before sleep when ulp wakeup enabled. Otherwise,
if the ulp int raw is already set, chip will not sleep properly.
Closes https://github.com/espressif/esp-idf/issues/6229
The legacy driver can't handle the breaking change between esp chips
very well.
And it's not elegant to extend new feature like DMA, ETM.
The new driver can return a opaque handle for each RMT channel.
An obvious transaction concept was also introduced.
TX and RX functionalities are splited out.
1. Clean up clk usage in IDF, replace rtc_clk_xtal/apb_freq_get with
upper level API esp_clk_xtal/apb_freq
2. Fix small errors and wrong comments related to clock
3. Add clk_tree_defs.h to provide an unified clock id for each chip
Modify the NGed drivers to adopt new clock ids
Prior to this change, `spi_flash_hal_supports_direct_write` and
`spi_flash_hal_supports_direct_read` will check the buffer pointer
place, which should be done in driver layer, instead of HAL layer.
temperature_sensor: Refactor temperature sensor to new APIs (follow rule of driverNG) and support esp32s3
Closes IDF-3665, IDF-3367, and IDF-1793
See merge request espressif/esp-idf!16787
Hub Driver is refactored as follows:
This commit update and refactors the Hub Driver as follows:
- Refactored enumeration state machine and stage functions
- Enumeration stage is now incremented
- Combined transfer stages of enumeration into common functions
- Comments updated
- Fixed usbh_hal_disable_debounce_lock() that would cause root_port_handle_events()
to fail the HCD_PORT_CMD_RESET call because the previous port connection interrupt
was not cleared.
The following features were added to the Hub Driver
- Enumeration config descriptor is now fetched in two separate stages
- Header is fetched first to determine the wTotalLength of the descriptor
- Fetching the full descriptor will request exactly wTotalLength bytes
- This works around some non-compliant devices that will babble/return zero
when requesting a length > wTotalLength
- Closes https://github.com/espressif/esp-idf/issues/7799
- Enumeration now stores string descriptors
- The Manufacturer, Product, and Serial Number string descriptors are
now read and stored during enumeration
- String descriptors are now part of usb_device_info_t
- Added unit test to test enumeration
This commit updates the USB Host stack to use the USB PHY driver. The
USB PHY and the OTG Controller should now both be setup/deleted using
usb_new_phy() and usb_del_phy() respectively.
- The hcd_install() now expects the USB PHY and OTG Contorller to be
already setup before it is called
- usb_host_install() now has an option to skip calling usb_del_phy() if
the user wants to setup their own USB PHY (e.g., in the case of using
and external PHY).
- CDC-ACM and MSC examples/test updated to use internal PHY
Closes https://github.com/espressif/esp-idf/issues/8061
As ESP32C3 does not have support for REF_TICK source clock, it is now not
possible to select it anymore.
Auto cfg clock has been improved for all boards.
This commit fixes how the USB Host HCD handles sudden disconnections.
Bugs:
- HW channels remain active when the port suddenly disconnects, and
previously the channel would be disabled by setting the disabled bit,
then waiting for a disabled interrupt. However, ISOC channels do not
generate the disabled interrupt when the port is invalid, thus leading
to tasks getting indefinitely blocked in hcd_pipe_command().
Fix:
On a sudden disconnection, forcibly treat all channels as halted even
if their HCCHAR.ChEna bit is still set. We do a soft reset after a port
error anyways, so the channels will eventually be reset.
Closes https://github.com/espressif/esp-idf/issues/7505
This commit addes the 8/16 bit register field access workarounds to
the DWC_OTG peripheral. This workaround was applied to all other
peripherals in commit 874a720286.
This commit adds the preliminary version of the USB Host Library. This commit contains:
- USBH (USB Host Driver)
- Hub Driver that only supports a single device and device enumeration
- USB Host Library (asychronous API)
- Test cases for USB Host Library asychronous API
The following changes were made to the existing HCD:
- Removed HCD_PIPE_STATE_INVALID. Pipes are no longer invalidated
- Changed pipe commands to halt, flush, and clear. Pipes need to be manually
halted, flush, and cleared.
- Halting and flushing a pipe will execute the pipe callback if it causes a
HCD_PIPE_EVENT_URB_DONE event
1. Support i2s on esp32c3 and esp32s3
2. Refactor i2s_config_t to avoid breaking change
2. Fix a bug that receiving unavailable values from message queue when dma queue has been re-allocted
4. Support i2s unit test on esp32c3 and esp32s3
The user can now request the chip select to remain active after the current
transfer. In order to do so, he MUST acquire the bus first with `spi_device_acquire_bus()`
function, else, an error is returned.
In I2C slave mode, clock source can now be changed, according to
the flags specified in `i2c_config_t` structure. Thus, ESP32-S2
can now act as an I2C slave, even with a 400KHz master clock.
Add support of gpio for esp32s3(728). Adjust some pins and comments in test_gpio.c. Add support for gpio functions for gpio19 and gpio20. Update S3 programming guide Peripheral API: gpio and sigmadelta. Add unit test for input and output function of S3 USB pins(GPIO19 and GPIO20) and C3 USB pins(GPIO18 and GPIO19). Adjust input only test in test_spi_master.c.
This commit fixes the following bugs with the HCD and USB Host HAL
- Make the setting to periodic frame list and scheduling to occur after
a reset command
- All port errors states should put the port into the HCD_PORT_STATE_RECOVERY
state.
- Fixed incorrect return type of hcd_port_command() function
Only a single command will be allocated now when a read or write is
prepared in the command list. The size of a command's buffer is not
limited to 255 bytes anymore.
add usb hal/soc, usb_ll files and esp32s3 target for usb
move usb_hal.h into soc common folder
soc/hal: fix soc and periph for usb
tinyusb: fix tinyusb io header
hal: usb_ll fix pull up/down config for esp32s3
soc/hal: fix peripheral addresses
This commit separates out the common USB types used throughout most of the stack into its
own header file inside the USB component. The types used in the USB HAL are now exclusive
to the HAL.
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
* Functions for setting and clearing interrupts
as well as function to read interrupt mask
should be clearer now.
* Using hal layer interrupt set and clear
functions in esp_wifi component
Also:
1. Separate static configuration into init phase to improve
performance
2. Add a init code config layer to avoid duplicated configuration
3. Add a HW_CALIBRATION_V1 caps
1. Provided more information regarding I2S_COMM_FORMAT_STAND_PCM_SHORT and I2S_COMM_FORMAT_STAND_PCM_LONG
2. Added --output flag for partition table read instructions
3. Reordered the header files for esp-ble-mesh
4. Reordered the setup instructions for Ubuntu and CentOS
The ``adc_digi_config_t`` struct is modified on esp32c3: configuration
of clock divider factors are not provided anymore. The SARADC sampling
frequency is provided instead. In this way, we can handle the frequency
limit better.
SoC level exceptions such as watchdog timer and cache errors are now supported.
Such exceptions now triggers a panic, giving more information about how
and when it happened.
- add lock for single read and continuous read APIs
- update onetime read start singal delay for hardware limitation[*]
- move adc_caps to soc_caps.h
- update license dates
[*] There is a hardware limitation. If the APB clock frequency is high, the
step of this reg signal: ``onetime_start`` may not be captured by the
ADC digital controller (when its clock frequency is too slow). A rough
estimate for this step should be at least 3 ADC digital controller
clock cycle.
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).
Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h
This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
feature/intr_alloc: moved interrupt allocator to the esp-system and refactored it moving all platform specific code to its place
Closes IDF-1913
See merge request espressif/esp-idf!10267
esp_system: removed repeated interrupt allocator code and moved common code to esp_system
xtens: moved xtensa specific code from freertos to the xtensa component
hal/interrupt_controller: added interrupt controller hal and ll files
docs: update the doxyfile with new location of esp_itr_alloc.h file
xtensa: fixed dangerous relocation problem after moving xtensa interrupt files out of freertos
docs: removed Xtensa reference from intr_allocator api-reference
xtensa: pushed the interrupt function that manages non iram interrupts to the xtensa layer
esp_system/test: fixed platform dependent setting for intr_allocator tests
hal: rename the functions used to manage non iram interrupt mask.
This commit seperates the hal context into different configuration
structures based on their members' definitions. Through refactoring
spi_master.c, the device related configuration should be passed in and
set each time before a new transaction. The transaction related
configuration now is a local variable in case of the fact that error
occurs without any notice when user forgets to pass new transaction
configuration in (which means the old driver will use the trans_config
that is saved from last transaction).
Besides, via above refactor, this commit fixs a bug which leads to
wrong cs polarity setting.
Closes https://github.com/espressif/esp-idf/pull/5490
Moreover, via above refactor, this commit also fixs a bug about duplex
mode switching when multiple devices are added to the bus.
Closes https://github.com/espressif/esp-idf/issues/4641
