mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
gdma: support IRAM interrupt
This commit is contained in:
morris
parent
f8f49de735
commit
83d16aa00c
@ -184,4 +184,22 @@ menu "Driver configurations"
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endmenu # GPIO Configuration
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menu "GDMA Configuration"
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config GDMA_CTRL_FUNC_IN_IRAM
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bool "Place GDMA control functions into IRAM"
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default n
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help
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Place GDMA control functions (like start/stop/append/reset) into IRAM,
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so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
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Enabling this option can improve driver performance as well.
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config GDMA_ISR_IRAM_SAFE
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bool "GDMA ISR IRAM-Safe"
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default n
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help
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This will ensure the GDMA interrupt handler is IRAM-Safe, allow to avoid flash
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cache misses, and also be able to run whilst the cache is disabled.
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(e.g. SPI Flash write).
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endmenu # GDMA Configuration
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endmenu # Driver configurations
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@ -8,6 +8,7 @@
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#include <stdlib.h>
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#include <sys/cdefs.h>
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#include "sdkconfig.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "soc/soc_caps.h"
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@ -15,14 +16,30 @@
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#include "esp_intr_alloc.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/gdma.h"
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#include "esp_heap_caps.h"
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#include "hal/gdma_hal.h"
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#include "hal/gdma_ll.h"
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#include "soc/gdma_periph.h"
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#include "soc/soc_memory_types.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/gdma.h"
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static const char *TAG = "gdma";
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#if CONFIG_GDMA_ISR_IRAM_SAFE
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#define GDMA_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED)
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#define GDMA_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#else
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#define GDMA_INTR_ALLOC_FLAGS ESP_INTR_FLAG_INTRDISABLED
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#define GDMA_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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#endif // CONFIG_GDMA_ISR_IRAM_SAFE
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#if CONFIG_GDMA_CTRL_FUNC_IN_IRAM
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#define GDMA_CTRL_FUNC_ATTR IRAM_ATTR
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#else
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#define GDMA_CTRL_FUNC_ATTR
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#endif // CONFIG_GDMA_CTRL_FUNC_IN_IRAM
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#define GDMA_INVALID_PERIPH_TRIG (0x3F)
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#define SEARCH_REQUEST_RX_CHANNEL (1 << 0)
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#define SEARCH_REQUEST_TX_CHANNEL (1 << 1)
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@ -123,11 +140,11 @@ esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_chann
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}
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if (config->direction == GDMA_CHANNEL_DIRECTION_TX) {
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search_code |= SEARCH_REQUEST_TX_CHANNEL; // search TX only
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alloc_tx_channel = calloc(1, sizeof(gdma_tx_channel_t));
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alloc_tx_channel = heap_caps_calloc(1, sizeof(gdma_tx_channel_t), GDMA_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(alloc_tx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma tx channel");
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} else if (config->direction == GDMA_CHANNEL_DIRECTION_RX) {
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search_code |= SEARCH_REQUEST_RX_CHANNEL; // search RX only
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alloc_rx_channel = calloc(1, sizeof(gdma_rx_channel_t));
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alloc_rx_channel = heap_caps_calloc(1, sizeof(gdma_rx_channel_t), GDMA_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(alloc_rx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma rx channel");
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}
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@ -364,6 +381,17 @@ esp_err_t gdma_register_tx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_
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group = pair->group;
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gdma_tx_channel_t *tx_chan = __containerof(dma_chan, gdma_tx_channel_t, base);
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#if CONFIG_GDMA_ISR_IRAM_SAFE
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if (cbs->on_trans_eof) {
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ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_trans_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_trans_eof not in IRAM");
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}
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if (user_data) {
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ESP_GOTO_ON_FALSE(esp_ptr_in_dram(user_data) ||
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esp_ptr_in_diram_dram(user_data) ||
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esp_ptr_in_rtc_dram_fast(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in DRAM");
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}
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#endif // CONFIG_GDMA_ISR_IRAM_SAFE
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// lazy install interrupt service
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ESP_GOTO_ON_ERROR(gdma_install_tx_interrupt(tx_chan), err, TAG, "install interrupt service failed");
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@ -391,6 +419,17 @@ esp_err_t gdma_register_rx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_
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group = pair->group;
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gdma_rx_channel_t *rx_chan = __containerof(dma_chan, gdma_rx_channel_t, base);
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#if CONFIG_GDMA_ISR_IRAM_SAFE
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if (cbs->on_recv_eof) {
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ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_recv_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_recv_eof not in IRAM");
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}
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if (user_data) {
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ESP_GOTO_ON_FALSE(esp_ptr_in_dram(user_data) ||
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esp_ptr_in_diram_dram(user_data) ||
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esp_ptr_in_rtc_dram_fast(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in DRAM");
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}
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#endif // CONFIG_GDMA_ISR_IRAM_SAFE
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// lazy install interrupt service
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ESP_GOTO_ON_ERROR(gdma_install_rx_interrupt(rx_chan), err, TAG, "install interrupt service failed");
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@ -408,7 +447,7 @@ err:
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return ret;
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}
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esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr)
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GDMA_CTRL_FUNC_ATTR esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr)
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{
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esp_err_t ret = ESP_OK;
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gdma_pair_t *pair = NULL;
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@ -429,7 +468,7 @@ err:
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return ret;
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}
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esp_err_t gdma_stop(gdma_channel_handle_t dma_chan)
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GDMA_CTRL_FUNC_ATTR esp_err_t gdma_stop(gdma_channel_handle_t dma_chan)
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{
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esp_err_t ret = ESP_OK;
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gdma_pair_t *pair = NULL;
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@ -448,7 +487,7 @@ err:
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return ret;
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}
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esp_err_t gdma_append(gdma_channel_handle_t dma_chan)
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GDMA_CTRL_FUNC_ATTR esp_err_t gdma_append(gdma_channel_handle_t dma_chan)
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{
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esp_err_t ret = ESP_OK;
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gdma_pair_t *pair = NULL;
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@ -467,7 +506,7 @@ err:
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return ret;
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}
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esp_err_t gdma_reset(gdma_channel_handle_t dma_chan)
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GDMA_CTRL_FUNC_ATTR esp_err_t gdma_reset(gdma_channel_handle_t dma_chan)
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{
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esp_err_t ret = ESP_OK;
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gdma_pair_t *pair = NULL;
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@ -512,7 +551,7 @@ static gdma_group_t *gdma_acquire_group_handle(int group_id)
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{
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bool new_group = false;
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gdma_group_t *group = NULL;
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gdma_group_t *pre_alloc_group = calloc(1, sizeof(gdma_group_t));
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gdma_group_t *pre_alloc_group = heap_caps_calloc(1, sizeof(gdma_group_t), GDMA_MEM_ALLOC_CAPS);
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if (!pre_alloc_group) {
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goto out;
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}
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@ -576,7 +615,7 @@ static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id)
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{
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bool new_pair = false;
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gdma_pair_t *pair = NULL;
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gdma_pair_t *pre_alloc_pair = calloc(1, sizeof(gdma_pair_t));
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gdma_pair_t *pre_alloc_pair = heap_caps_calloc(1, sizeof(gdma_pair_t), GDMA_MEM_ALLOC_CAPS);
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if (!pre_alloc_pair) {
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goto out;
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}
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@ -724,7 +763,7 @@ static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan)
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gdma_pair_t *pair = rx_chan->base.pair;
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gdma_group_t *group = pair->group;
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// pre-alloc a interrupt handle, with handler disabled
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int isr_flags = ESP_INTR_FLAG_INTRDISABLED;
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int isr_flags = GDMA_INTR_ALLOC_FLAGS;
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#if SOC_GDMA_TX_RX_SHARE_INTERRUPT
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isr_flags |= ESP_INTR_FLAG_SHARED;
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#endif
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@ -751,7 +790,7 @@ static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan)
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gdma_pair_t *pair = tx_chan->base.pair;
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gdma_group_t *group = pair->group;
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// pre-alloc a interrupt handle, with handler disabled
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int isr_flags = ESP_INTR_FLAG_INTRDISABLED;
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int isr_flags = GDMA_INTR_ALLOC_FLAGS;
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#if SOC_GDMA_TX_RX_SHARE_INTERRUPT
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isr_flags |= ESP_INTR_FLAG_SHARED;
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#endif
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@ -1,16 +1,8 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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@ -67,6 +59,7 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable)
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/**
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* @brief Get DMA RX channel interrupt status word
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*/
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__attribute__((always_inline))
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static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
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{
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return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK;
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@ -87,6 +80,7 @@ static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel
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/**
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* @brief Clear DMA RX channel interrupt
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
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{
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dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK);
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@ -127,6 +121,7 @@ static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t
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/**
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* @brief Reset DMA RX channel FSM and FIFO pointer
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
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{
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dev->channel[channel].in.in_conf0.in_rst = 1;
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@ -172,6 +167,7 @@ static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel)
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/**
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* @brief Set the descriptor link base address for RX channel
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
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{
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dev->channel[channel].in.in_link.addr = addr;
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@ -180,6 +176,7 @@ static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
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/**
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* @brief Start dealing with RX descriptors
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
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{
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dev->channel[channel].in.in_link.start = 1;
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@ -188,6 +185,7 @@ static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
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/**
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* @brief Stop dealing with RX descriptors
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
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{
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dev->channel[channel].in.in_link.stop = 1;
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@ -196,6 +194,7 @@ static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
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/**
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* @brief Restart a new inlink right after the last descriptor
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
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{
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dev->channel[channel].in.in_link.restart = 1;
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@ -220,6 +219,7 @@ static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
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/**
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* @brief Get RX success EOF descriptor's address
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*/
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__attribute__((always_inline))
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static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
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{
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return dev->channel[channel].in.in_suc_eof_des_addr;
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@ -228,6 +228,7 @@ static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uin
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/**
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* @brief Get RX error EOF descriptor's address
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*/
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__attribute__((always_inline))
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static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
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{
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return dev->channel[channel].in.in_err_eof_des_addr;
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@ -236,6 +237,7 @@ static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint3
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/**
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* @brief Get current RX descriptor's address
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*/
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__attribute__((always_inline))
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static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
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{
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return dev->channel[channel].in.in_dscr;
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@ -261,6 +263,7 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe
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/**
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* @brief Get DMA TX channel interrupt status word
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*/
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__attribute__((always_inline))
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static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
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{
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return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK;
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@ -281,6 +284,7 @@ static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel
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/**
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* @brief Clear DMA TX channel interrupt
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
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{
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dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK);
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@ -337,6 +341,7 @@ static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t c
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/**
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* @brief Reset DMA TX channel FSM and FIFO pointer
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
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{
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dev->channel[channel].out.out_conf0.out_rst = 1;
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@ -382,6 +387,7 @@ static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint3
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/**
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* @brief Set the descriptor link base address for TX channel
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
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{
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dev->channel[channel].out.out_link.addr = addr;
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@ -390,6 +396,7 @@ static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
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/**
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* @brief Start dealing with TX descriptors
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
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{
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dev->channel[channel].out.out_link.start = 1;
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@ -398,6 +405,7 @@ static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
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/**
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* @brief Stop dealing with TX descriptors
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
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{
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dev->channel[channel].out.out_link.stop = 1;
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@ -406,6 +414,7 @@ static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
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/**
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* @brief Restart a new outlink right after the last descriptor
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*/
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__attribute__((always_inline))
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static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
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{
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dev->channel[channel].out.out_link.restart = 1;
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@ -422,6 +431,7 @@ static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
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/**
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* @brief Get TX EOF descriptor's address
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*/
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__attribute__((always_inline))
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static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
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{
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return dev->channel[channel].out.out_eof_des_addr;
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@ -430,6 +440,7 @@ static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t ch
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/**
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* @brief Get current TX descriptor's address
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*/
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__attribute__((always_inline))
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static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
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{
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return dev->channel[channel].out.out_dscr;
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@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
@ -67,6 +59,7 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable)
|
||||
/**
|
||||
* @brief Get DMA RX channel interrupt status word
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK;
|
||||
@ -87,6 +80,7 @@ static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel
|
||||
/**
|
||||
* @brief Clear DMA RX channel interrupt
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
|
||||
{
|
||||
dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK);
|
||||
@ -127,6 +121,7 @@ static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t
|
||||
/**
|
||||
* @brief Reset DMA RX channel FSM and FIFO pointer
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].in.in_conf0.in_rst = 1;
|
||||
@ -172,6 +167,7 @@ static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Set the descriptor link base address for RX channel
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
|
||||
{
|
||||
dev->channel[channel].in.in_link.addr = addr;
|
||||
@ -180,6 +176,7 @@ static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
|
||||
/**
|
||||
* @brief Start dealing with RX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].in.in_link.start = 1;
|
||||
@ -188,6 +185,7 @@ static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Stop dealing with RX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].in.in_link.stop = 1;
|
||||
@ -196,6 +194,7 @@ static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Restart a new inlink right after the last descriptor
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].in.in_link.restart = 1;
|
||||
@ -220,6 +219,7 @@ static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Get RX success EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].in.in_suc_eof_des_addr;
|
||||
@ -228,6 +228,7 @@ static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uin
|
||||
/**
|
||||
* @brief Get RX error EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].in.in_err_eof_des_addr;
|
||||
@ -236,6 +237,7 @@ static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint3
|
||||
/**
|
||||
* @brief Get current RX descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].in.in_dscr;
|
||||
@ -261,6 +263,7 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe
|
||||
/**
|
||||
* @brief Get DMA TX channel interrupt status word
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK;
|
||||
@ -281,6 +284,7 @@ static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel
|
||||
/**
|
||||
* @brief Clear DMA TX channel interrupt
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
|
||||
{
|
||||
dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK);
|
||||
@ -337,6 +341,7 @@ static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t c
|
||||
/**
|
||||
* @brief Reset DMA TX channel FSM and FIFO pointer
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].out.out_conf0.out_rst = 1;
|
||||
@ -382,6 +387,7 @@ static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint3
|
||||
/**
|
||||
* @brief Set the descriptor link base address for TX channel
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
|
||||
{
|
||||
dev->channel[channel].out.out_link.addr = addr;
|
||||
@ -390,6 +396,7 @@ static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
|
||||
/**
|
||||
* @brief Start dealing with TX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].out.out_link.start = 1;
|
||||
@ -398,6 +405,7 @@ static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Stop dealing with TX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].out.out_link.stop = 1;
|
||||
@ -406,6 +414,7 @@ static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Restart a new outlink right after the last descriptor
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].out.out_link.restart = 1;
|
||||
@ -422,6 +431,7 @@ static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Get TX EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].out.out_eof_des_addr;
|
||||
@ -430,6 +440,7 @@ static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t ch
|
||||
/**
|
||||
* @brief Get current TX descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].out.out_dscr;
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
@ -81,6 +73,7 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable)
|
||||
/**
|
||||
* @brief Get DMA RX channel interrupt status word
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].in.int_st.val;
|
||||
@ -101,6 +94,7 @@ static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel
|
||||
/**
|
||||
* @brief Clear DMA RX channel interrupt
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
|
||||
{
|
||||
dev->channel[channel].in.int_clr.val = mask;
|
||||
@ -141,6 +135,7 @@ static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t
|
||||
/**
|
||||
* @brief Reset DMA RX channel FSM and FIFO pointer
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].in.conf0.in_rst = 1;
|
||||
@ -210,6 +205,7 @@ static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Set the descriptor link base address for RX channel
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
|
||||
{
|
||||
dev->channel[channel].in.link.addr = addr;
|
||||
@ -218,6 +214,7 @@ static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
|
||||
/**
|
||||
* @brief Start dealing with RX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].in.link.start = 1;
|
||||
@ -226,6 +223,7 @@ static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Stop dealing with RX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].in.link.stop = 1;
|
||||
@ -234,6 +232,7 @@ static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Restart a new inlink right after the last descriptor
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].in.link.restart = 1;
|
||||
@ -258,6 +257,7 @@ static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Get RX success EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].in.suc_eof_des_addr;
|
||||
@ -266,6 +266,7 @@ static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uin
|
||||
/**
|
||||
* @brief Get RX error EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].in.err_eof_des_addr;
|
||||
@ -274,6 +275,7 @@ static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint3
|
||||
/**
|
||||
* @brief Get current RX descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].in.dscr;
|
||||
@ -307,6 +309,7 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe
|
||||
/**
|
||||
* @brief Get DMA TX channel interrupt status word
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].out.int_st.val;
|
||||
@ -327,6 +330,7 @@ static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel
|
||||
/**
|
||||
* @brief Clear DMA TX channel interrupt
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
|
||||
{
|
||||
dev->channel[channel].out.int_clr.val = mask;
|
||||
@ -383,6 +387,7 @@ static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t c
|
||||
/**
|
||||
* @brief Reset DMA TX channel FSM and FIFO pointer
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].out.conf0.out_rst = 1;
|
||||
@ -444,6 +449,7 @@ static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint3
|
||||
/**
|
||||
* @brief Set the descriptor link base address for TX channel
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
|
||||
{
|
||||
dev->channel[channel].out.link.addr = addr;
|
||||
@ -452,6 +458,7 @@ static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
|
||||
/**
|
||||
* @brief Start dealing with TX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].out.link.start = 1;
|
||||
@ -460,6 +467,7 @@ static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Stop dealing with TX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].out.link.stop = 1;
|
||||
@ -468,6 +476,7 @@ static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Restart a new outlink right after the last descriptor
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
dev->channel[channel].out.link.restart = 1;
|
||||
@ -484,6 +493,7 @@ static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
|
||||
/**
|
||||
* @brief Get TX EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].out.eof_des_addr;
|
||||
@ -492,6 +502,7 @@ static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t ch
|
||||
/**
|
||||
* @brief Get current TX descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
return dev->channel[channel].out.dscr;
|
||||
|
||||
@ -39,7 +39,12 @@ extern "C" {
|
||||
*/
|
||||
static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_conf0.mem_trans_en = enable;
|
||||
if (enable) {
|
||||
// to enable m2m mode, the tx chan has to be the same to rx chan, and set to a valid value
|
||||
dev->channel[channel].in.in_peri_sel.sel = 0;
|
||||
dev->channel[channel].out.out_peri_sel.sel = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@ -47,16 +52,17 @@ static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bo
|
||||
*/
|
||||
static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->misc_conf.clk_en = enable;
|
||||
}
|
||||
|
||||
///////////////////////////////////// RX /////////////////////////////////////////
|
||||
/**
|
||||
* @brief Get DMA RX channel interrupt status word
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -64,15 +70,20 @@ static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t
|
||||
*/
|
||||
static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel, uint32_t mask, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
if (enable) {
|
||||
dev->intr[channel].ena.val |= (mask & GDMA_LL_RX_EVENT_MASK);
|
||||
} else {
|
||||
dev->intr[channel].ena.val &= ~(mask & GDMA_LL_RX_EVENT_MASK);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear DMA RX channel interrupt
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -80,7 +91,7 @@ static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t c
|
||||
*/
|
||||
static inline volatile void *gdma_ll_rx_get_interrupt_status_reg(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return (volatile void *)(&dev->intr[channel].st);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -88,7 +99,7 @@ static inline volatile void *gdma_ll_rx_get_interrupt_status_reg(gdma_dev_t *dev
|
||||
*/
|
||||
static inline void gdma_ll_rx_enable_owner_check(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_conf1.in_check_owner = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -96,7 +107,7 @@ static inline void gdma_ll_rx_enable_owner_check(gdma_dev_t *dev, uint32_t chann
|
||||
*/
|
||||
static inline void gdma_ll_rx_enable_data_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_conf0.in_data_burst_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -104,15 +115,17 @@ static inline void gdma_ll_rx_enable_data_burst(gdma_dev_t *dev, uint32_t channe
|
||||
*/
|
||||
static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_conf0.indscr_burst_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reset DMA RX channel FSM and FIFO pointer
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_conf0.in_rst = 1;
|
||||
dev->channel[channel].in.in_conf0.in_rst = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -121,7 +134,7 @@ static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
|
||||
*/
|
||||
static inline bool gdma_ll_rx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].in.infifo_status.val & 0x01;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -130,7 +143,7 @@ static inline bool gdma_ll_rx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, ui
|
||||
*/
|
||||
static inline bool gdma_ll_rx_is_fifo_empty(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].in.infifo_status.val & 0x02;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -139,7 +152,7 @@ static inline bool gdma_ll_rx_is_fifo_empty(gdma_dev_t *dev, uint32_t channel, u
|
||||
*/
|
||||
static inline uint32_t gdma_ll_rx_get_fifo_bytes(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].in.infifo_status.infifo_cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -147,39 +160,44 @@ static inline uint32_t gdma_ll_rx_get_fifo_bytes(gdma_dev_t *dev, uint32_t chann
|
||||
*/
|
||||
static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_pop.infifo_pop = 1;
|
||||
return dev->channel[channel].in.in_pop.infifo_rdata;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the descriptor link base address for RX channel
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_link.addr = addr;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start dealing with RX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_link.start = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stop dealing with RX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_link.stop = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Restart a new inlink right after the last descriptor
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_link.restart = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -187,7 +205,7 @@ static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
|
||||
*/
|
||||
static inline void gdma_ll_rx_enable_auto_return(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_link.auto_ret = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -195,31 +213,34 @@ static inline void gdma_ll_rx_enable_auto_return(gdma_dev_t *dev, uint32_t chann
|
||||
*/
|
||||
static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].in.in_link.park;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get RX success EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].in.in_suc_eof_des_addr;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get RX error EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].in.in_err_eof_des_addr;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get current RX descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].in.in_dscr;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -227,7 +248,7 @@ static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_
|
||||
*/
|
||||
static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, uint32_t prio)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_pri.rx_pri = prio;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -235,16 +256,17 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
|
||||
*/
|
||||
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].in.in_peri_sel.sel = periph_id;
|
||||
}
|
||||
|
||||
///////////////////////////////////// TX /////////////////////////////////////////
|
||||
/**
|
||||
* @brief Get DMA TX channel interrupt status word
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -252,15 +274,20 @@ static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t
|
||||
*/
|
||||
static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel, uint32_t mask, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
if (enable) {
|
||||
dev->intr[channel].ena.val |= (mask & GDMA_LL_TX_EVENT_MASK);
|
||||
} else {
|
||||
dev->intr[channel].ena.val &= ~(mask & GDMA_LL_TX_EVENT_MASK);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear DMA TX channel interrupt
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -268,7 +295,7 @@ static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t c
|
||||
*/
|
||||
static inline volatile void *gdma_ll_tx_get_interrupt_status_reg(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return (volatile void *)(&dev->intr[channel].st);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -276,7 +303,7 @@ static inline volatile void *gdma_ll_tx_get_interrupt_status_reg(gdma_dev_t *dev
|
||||
*/
|
||||
static inline void gdma_ll_tx_enable_owner_check(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_conf1.out_check_owner = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -284,7 +311,7 @@ static inline void gdma_ll_tx_enable_owner_check(gdma_dev_t *dev, uint32_t chann
|
||||
*/
|
||||
static inline void gdma_ll_tx_enable_data_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_conf0.out_data_burst_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -292,7 +319,7 @@ static inline void gdma_ll_tx_enable_data_burst(gdma_dev_t *dev, uint32_t channe
|
||||
*/
|
||||
static inline void gdma_ll_tx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_conf0.outdscr_burst_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -300,7 +327,7 @@ static inline void gdma_ll_tx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t
|
||||
*/
|
||||
static inline void gdma_ll_tx_set_eof_mode(gdma_dev_t *dev, uint32_t channel, uint32_t mode)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_conf0.out_eof_mode = mode;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -308,15 +335,17 @@ static inline void gdma_ll_tx_set_eof_mode(gdma_dev_t *dev, uint32_t channel, ui
|
||||
*/
|
||||
static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t channel, bool enable)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_conf0.out_auto_wrback = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reset DMA TX channel FSM and FIFO pointer
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_conf0.out_rst = 1;
|
||||
dev->channel[channel].out.out_conf0.out_rst = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -325,7 +354,7 @@ static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
|
||||
*/
|
||||
static inline bool gdma_ll_tx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].out.outfifo_status.val & 0x01;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -334,7 +363,7 @@ static inline bool gdma_ll_tx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, ui
|
||||
*/
|
||||
static inline bool gdma_ll_tx_is_fifo_empty(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].out.outfifo_status.val & 0x02;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -343,7 +372,7 @@ static inline bool gdma_ll_tx_is_fifo_empty(gdma_dev_t *dev, uint32_t channel, u
|
||||
*/
|
||||
static inline uint32_t gdma_ll_tx_get_fifo_bytes(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].out.outfifo_status.outfifo_cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -351,39 +380,44 @@ static inline uint32_t gdma_ll_tx_get_fifo_bytes(gdma_dev_t *dev, uint32_t chann
|
||||
*/
|
||||
static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint32_t data)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_push.outfifo_wdata = data;
|
||||
dev->channel[channel].out.out_push.outfifo_push = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the descriptor link base address for TX channel
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_link.addr = addr;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start dealing with TX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_link.start = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stop dealing with TX descriptors
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_link.stop = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Restart a new outlink right after the last descriptor
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_link.restart = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -391,23 +425,25 @@ static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
|
||||
*/
|
||||
static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].out.out_link.park;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get TX EOF descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].out.out_eof_des_addr;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get current TX descriptor's address
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
return dev->channel[channel].out.out_dscr;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -415,7 +451,7 @@ static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_
|
||||
*/
|
||||
static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, uint32_t prio)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_pri.tx_pri = prio;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -423,7 +459,7 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
|
||||
*/
|
||||
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
|
||||
{
|
||||
abort(); //TODO IDF-3817
|
||||
dev->channel[channel].out.out_peri_sel.sel = periph_id;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "hal/gdma_hal.h"
|
||||
#include "hal/gdma_ll.h"
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* NOTICE
|
||||
|
||||
@ -1,2 +1,7 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
// ESP32 doesn't feature General DMA peripheral.
|
||||
// We keep this file here only for consistency's sake.
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "soc/gdma_periph.h"
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#ifndef _SOC_DMA_REG_H_
|
||||
#define _SOC_DMA_REG_H_
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "soc/gdma_periph.h"
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#ifndef _SOC_DMA_REG_H_
|
||||
#define _SOC_DMA_REG_H_
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
@ -1,2 +1,7 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
// ESP32-S2 doesn't feature General DMA peripheral.
|
||||
// We keep this file here only for consistency's sake.
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "soc/gdma_periph.h"
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#ifndef _SOC_GDMA_REG_H_
|
||||
#define _SOC_GDMA_REG_H_
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#ifndef _SOC_GDMA_STRUCT_H_
|
||||
#define _SOC_GDMA_STRUCT_H_
|
||||
|
||||
|
||||
@ -1,16 +1,15 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#ifndef _SOC_GDMA_STRUCT_H_
|
||||
#define _SOC_GDMA_STRUCT_H_
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#include "soc.h"
|
||||
|
||||
typedef volatile struct gdma_dev_s {
|
||||
struct {
|
||||
@ -313,11 +312,9 @@ typedef volatile struct gdma_dev_s {
|
||||
} out;
|
||||
} channel[1];
|
||||
} gdma_dev_t;
|
||||
|
||||
extern gdma_dev_t GDMA;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#endif /*_SOC_DMA_STRUCT_H_ */
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
@ -1184,7 +1184,6 @@ components/hal/esp32c3/include/hal/adc_ll.h
|
||||
components/hal/esp32c3/include/hal/aes_ll.h
|
||||
components/hal/esp32c3/include/hal/clk_gate_ll.h
|
||||
components/hal/esp32c3/include/hal/ds_ll.h
|
||||
components/hal/esp32c3/include/hal/gdma_ll.h
|
||||
components/hal/esp32c3/include/hal/gpspi_flash_ll.h
|
||||
components/hal/esp32c3/include/hal/hmac_hal.h
|
||||
components/hal/esp32c3/include/hal/hmac_ll.h
|
||||
@ -1217,7 +1216,6 @@ components/hal/esp32h2/include/hal/adc_ll.h
|
||||
components/hal/esp32h2/include/hal/aes_ll.h
|
||||
components/hal/esp32h2/include/hal/clk_gate_ll.h
|
||||
components/hal/esp32h2/include/hal/ds_ll.h
|
||||
components/hal/esp32h2/include/hal/gdma_ll.h
|
||||
components/hal/esp32h2/include/hal/gpspi_flash_ll.h
|
||||
components/hal/esp32h2/include/hal/hmac_hal.h
|
||||
components/hal/esp32h2/include/hal/hmac_ll.h
|
||||
@ -1291,7 +1289,6 @@ components/hal/esp32s3/include/hal/adc_hal_conf.h
|
||||
components/hal/esp32s3/include/hal/adc_ll.h
|
||||
components/hal/esp32s3/include/hal/aes_ll.h
|
||||
components/hal/esp32s3/include/hal/cpu_ll.h
|
||||
components/hal/esp32s3/include/hal/gdma_ll.h
|
||||
components/hal/esp32s3/include/hal/gpspi_flash_ll.h
|
||||
components/hal/esp32s3/include/hal/i2c_ll.h
|
||||
components/hal/esp32s3/include/hal/interrupt_controller_ll.h
|
||||
@ -1316,7 +1313,6 @@ components/hal/esp32s3/include/hal/uhci_ll.h
|
||||
components/hal/esp32s3/include/hal/usb_ll.h
|
||||
components/hal/esp32s3/include/hal/usb_serial_jtag_ll.h
|
||||
components/hal/esp32s3/interrupt_descriptor_table.c
|
||||
components/hal/gdma_hal.c
|
||||
components/hal/gpio_hal.c
|
||||
components/hal/i2c_hal.c
|
||||
components/hal/i2c_hal_iram.c
|
||||
@ -1327,12 +1323,10 @@ components/hal/include/hal/brownout_hal.h
|
||||
components/hal/include/hal/cpu_types.h
|
||||
components/hal/include/hal/dac_hal.h
|
||||
components/hal/include/hal/dac_types.h
|
||||
components/hal/include/hal/dma_types.h
|
||||
components/hal/include/hal/ds_hal.h
|
||||
components/hal/include/hal/emac_hal.h
|
||||
components/hal/include/hal/esp_flash_err.h
|
||||
components/hal/include/hal/eth_types.h
|
||||
components/hal/include/hal/gdma_hal.h
|
||||
components/hal/include/hal/gpio_hal.h
|
||||
components/hal/include/hal/i2c_hal.h
|
||||
components/hal/include/hal/i2c_types.h
|
||||
@ -1830,7 +1824,6 @@ components/soc/esp32/include/soc/emac_mac_struct.h
|
||||
components/soc/esp32/include/soc/fe_reg.h
|
||||
components/soc/esp32/include/soc/flash_encryption_reg.h
|
||||
components/soc/esp32/include/soc/frc_timer_reg.h
|
||||
components/soc/esp32/include/soc/gdma_channel.h
|
||||
components/soc/esp32/include/soc/gpio_pins.h
|
||||
components/soc/esp32/include/soc/gpio_reg.h
|
||||
components/soc/esp32/include/soc/gpio_sd_reg.h
|
||||
@ -1903,7 +1896,6 @@ components/soc/esp32/spi_periph.c
|
||||
components/soc/esp32/touch_sensor_periph.c
|
||||
components/soc/esp32/uart_periph.c
|
||||
components/soc/esp32c3/adc_periph.c
|
||||
components/soc/esp32c3/gdma_periph.c
|
||||
components/soc/esp32c3/gpio_periph.c
|
||||
components/soc/esp32c3/i2c_bbpll.h
|
||||
components/soc/esp32c3/i2c_periph.c
|
||||
@ -1922,9 +1914,6 @@ components/soc/esp32c3/include/soc/efuse_reg.h
|
||||
components/soc/esp32c3/include/soc/efuse_struct.h
|
||||
components/soc/esp32c3/include/soc/extmem_reg.h
|
||||
components/soc/esp32c3/include/soc/fe_reg.h
|
||||
components/soc/esp32c3/include/soc/gdma_channel.h
|
||||
components/soc/esp32c3/include/soc/gdma_reg.h
|
||||
components/soc/esp32c3/include/soc/gdma_struct.h
|
||||
components/soc/esp32c3/include/soc/gpio_pins.h
|
||||
components/soc/esp32c3/include/soc/gpio_reg.h
|
||||
components/soc/esp32c3/include/soc/gpio_sd_reg.h
|
||||
@ -1986,7 +1975,6 @@ components/soc/esp32c3/sigmadelta_periph.c
|
||||
components/soc/esp32c3/spi_periph.c
|
||||
components/soc/esp32c3/uart_periph.c
|
||||
components/soc/esp32h2/adc_periph.c
|
||||
components/soc/esp32h2/gdma_periph.c
|
||||
components/soc/esp32h2/gpio_periph.c
|
||||
components/soc/esp32h2/i2c_periph.c
|
||||
components/soc/esp32h2/i2s_periph.c
|
||||
@ -2005,9 +1993,6 @@ components/soc/esp32h2/include/soc/efuse_reg.h
|
||||
components/soc/esp32h2/include/soc/efuse_struct.h
|
||||
components/soc/esp32h2/include/soc/extmem_reg.h
|
||||
components/soc/esp32h2/include/soc/fe_reg.h
|
||||
components/soc/esp32h2/include/soc/gdma_channel.h
|
||||
components/soc/esp32h2/include/soc/gdma_reg.h
|
||||
components/soc/esp32h2/include/soc/gdma_struct.h
|
||||
components/soc/esp32h2/include/soc/gpio_pins.h
|
||||
components/soc/esp32h2/include/soc/gpio_reg.h
|
||||
components/soc/esp32h2/include/soc/gpio_sd_reg.h
|
||||
@ -2098,7 +2083,6 @@ components/soc/esp32s2/include/soc/efuse_struct.h
|
||||
components/soc/esp32s2/include/soc/extmem_reg.h
|
||||
components/soc/esp32s2/include/soc/fe_reg.h
|
||||
components/soc/esp32s2/include/soc/frc_timer_reg.h
|
||||
components/soc/esp32s2/include/soc/gdma_channel.h
|
||||
components/soc/esp32s2/include/soc/gpio_pins.h
|
||||
components/soc/esp32s2/include/soc/gpio_reg.h
|
||||
components/soc/esp32s2/include/soc/gpio_sd_reg.h
|
||||
@ -2178,7 +2162,6 @@ components/soc/esp32s2/uart_periph.c
|
||||
components/soc/esp32s2/usb_periph.c
|
||||
components/soc/esp32s3/adc_periph.c
|
||||
components/soc/esp32s3/dedic_gpio_periph.c
|
||||
components/soc/esp32s3/gdma_periph.c
|
||||
components/soc/esp32s3/gpio_periph.c
|
||||
components/soc/esp32s3/i2c_periph.c
|
||||
components/soc/esp32s3/i2s_periph.c
|
||||
@ -2201,9 +2184,6 @@ components/soc/esp32s3/include/soc/efuse_struct.h
|
||||
components/soc/esp32s3/include/soc/extmem_reg.h
|
||||
components/soc/esp32s3/include/soc/extmem_struct.h
|
||||
components/soc/esp32s3/include/soc/fe_reg.h
|
||||
components/soc/esp32s3/include/soc/gdma_channel.h
|
||||
components/soc/esp32s3/include/soc/gdma_reg.h
|
||||
components/soc/esp32s3/include/soc/gdma_struct.h
|
||||
components/soc/esp32s3/include/soc/gpio_caps.h
|
||||
components/soc/esp32s3/include/soc/gpio_pins.h
|
||||
components/soc/esp32s3/include/soc/gpio_reg.h
|
||||
@ -2313,7 +2293,6 @@ components/soc/include/soc/dac_periph.h
|
||||
components/soc/include/soc/dedic_gpio_periph.h
|
||||
components/soc/include/soc/efuse_periph.h
|
||||
components/soc/include/soc/emac_periph.h
|
||||
components/soc/include/soc/gdma_periph.h
|
||||
components/soc/include/soc/gpio_periph.h
|
||||
components/soc/include/soc/hwcrypto_periph.h
|
||||
components/soc/include/soc/i2c_periph.h
|
||||
|
||||
Loading…
Reference in New Issue
Block a user