mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
driver: remove deprecated code
that declared as deprecated in the previous release
This commit is contained in:
morris
parent
819beb4a32
commit
8138f8bb02
@ -18,7 +18,6 @@ extern "C" {
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#define RMT_CHANNEL_FLAGS_AWARE_DFS (1 << 0) /*!< Channel can work during APB clock scaling */
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#define RMT_CHANNEL_FLAGS_INVERT_SIG (1 << 1) /*!< Invert RMT signal */
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#define RMT_CHANNEL_FLAGS_ALWAYS_ON _Pragma ("GCC warning \"'RMT_CHANNEL_FLAGS_ALWAYS_ON' macro is deprecated\"") RMT_CHANNEL_FLAGS_AWARE_DFS
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/**
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* @brief Define memory space of each RMT channel (in words = 4 bytes)
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@ -315,14 +315,6 @@ esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num);
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*/
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esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num);
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/** @brief Clear timer interrupt status, just used in ISR
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*
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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* @param timer_num Timer index.
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*
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*/
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void timer_group_intr_clr_in_isr(timer_group_t group_num, timer_idx_t timer_num) __attribute__((deprecated));
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/** @brief Clear timer interrupt status, just used in ISR
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*
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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@ -367,14 +359,6 @@ void timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t tim
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*/
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void timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en);
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/** @brief Get the masked interrupt status, just used in ISR
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*
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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*
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* @return
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* - Interrupt status
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*/
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timer_intr_t timer_group_intr_get_in_isr(timer_group_t group_num) __attribute__((deprecated));
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/** @brief Get interrupt status, just used in ISR
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*
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@ -384,15 +368,6 @@ timer_intr_t timer_group_intr_get_in_isr(timer_group_t group_num) __attribute__(
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* - Interrupt status
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*/
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uint32_t timer_group_get_intr_status_in_isr(timer_group_t group_num);
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/** @brief Clear the masked interrupt status, just used in ISR
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*
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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* @param intr_mask Masked interrupt.
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*
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*/
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void timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_mask) __attribute__((deprecated));
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/** @brief Get auto reload enable status, just used in ISR
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*
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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@ -404,30 +379,6 @@ void timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_
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*/
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bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num);
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/** @brief Take timer spinlock to enter critical protect
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*
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* @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
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*
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t timer_spinlock_take(timer_group_t group_num) __attribute__ ((deprecated));
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/** @brief Give timer spinlock to exit critical protect
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*
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* @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
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*
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* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t timer_spinlock_give(timer_group_t group_num) __attribute__ ((deprecated));
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#ifdef __cplusplus
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}
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#endif
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@ -16,13 +16,6 @@
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extern "C" {
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#endif
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/**
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* @brief Frequency of the clock on the input of the timer groups
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* @note This macro is not correct for Timer Groups with multiple clock sources (e.g. APB, XTAL)
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* So please don't use it in your application, we keep it here only for backward compatible
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*/
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#define TIMER_BASE_CLK _Pragma ("GCC warning \"'TIMER_BASE_CLK' macro is deprecated\"") APB_CLK_FREQ
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/**
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* @brief Timer-Group ID
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*/
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@ -406,12 +406,6 @@ esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t disable
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return ESP_OK;
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}
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/* This function is deprecated */
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timer_intr_t IRAM_ATTR timer_group_intr_get_in_isr(timer_group_t group_num)
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{
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return timer_ll_get_intr_status(TIMER_LL_GET_HW(group_num));
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}
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uint32_t IRAM_ATTR timer_group_get_intr_status_in_isr(timer_group_t group_num)
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{
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uint32_t intr_status = 0;
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@ -431,12 +425,6 @@ void IRAM_ATTR timer_group_clr_intr_status_in_isr(timer_group_t group_num, timer
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timer_ll_clear_intr_status(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num));
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}
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/* This function is deprecated */
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void IRAM_ATTR timer_group_intr_clr_in_isr(timer_group_t group_num, timer_idx_t timer_num)
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{
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timer_group_clr_intr_status_in_isr(group_num, timer_num);
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}
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void IRAM_ATTR timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_idx_t timer_num)
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{
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timer_ll_enable_alarm(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, true);
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@ -460,35 +448,11 @@ void IRAM_ATTR timer_group_set_counter_enable_in_isr(timer_group_t group_num, ti
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p_timer_obj[group_num][timer_num]->counter_en = counter_en;
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}
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/* This function is deprecated */
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void IRAM_ATTR timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_mask)
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{
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for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
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if (intr_mask & BIT(timer_idx)) {
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timer_group_clr_intr_status_in_isr(group_num, timer_idx);
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}
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}
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}
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bool IRAM_ATTR timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num)
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{
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return p_timer_obj[group_num][timer_num]->auto_reload_en;
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}
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esp_err_t IRAM_ATTR timer_spinlock_take(timer_group_t group_num)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t IRAM_ATTR timer_spinlock_give(timer_group_t group_num)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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/**
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* @brief This function will be called during start up, to check that this legacy timer group driver is not running along with the gptimer driver
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*/
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@ -55,10 +55,7 @@ typedef struct {
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*/
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typedef struct {
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ledc_mode_t speed_mode; /*!< LEDC speed speed_mode, high-speed mode or low-speed mode */
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union {
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ledc_timer_bit_t duty_resolution; /*!< LEDC channel duty resolution */
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ledc_timer_bit_t bit_num __attribute__((deprecated)); /*!< Deprecated in ESP-IDF 3.0. This is an alias to 'duty_resolution' for backward compatibility with ESP-IDF 2.1 */
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};
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ledc_timer_bit_t duty_resolution; /*!< LEDC channel duty resolution */
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ledc_timer_t timer_num; /*!< The timer source of channel (0 - 3) */
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uint32_t freq_hz; /*!< LEDC timer frequency (Hz) */
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ledc_clk_cfg_t clk_cfg; /*!< Configure LEDC source clock from ledc_clk_cfg_t.
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@ -170,16 +170,6 @@ typedef enum {
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MCPWM_BOTH_EDGE = BIT(1) | BIT(0), /*!<Capture both edges*/
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} mcpwm_capture_on_edge_t;
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/**
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* @brief Interrupt masks for MCPWM capture
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*/
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__attribute__ ((deprecated("please use callback function to avoid directly accessing registers")))
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typedef enum {
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MCPWM_LL_INTR_CAP0 = BIT(27), ///< Capture 0 happened
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MCPWM_LL_INTR_CAP1 = BIT(28), ///< Capture 1 happened
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MCPWM_LL_INTR_CAP2 = BIT(29), ///< Capture 2 happened
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} mcpwm_intr_t;
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/**
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* @brief Select type of MCPWM counter
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*/
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@ -739,39 +729,6 @@ esp_err_t mcpwm_fault_set_cyc_mode(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_n
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*/
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esp_err_t mcpwm_fault_deinit(mcpwm_unit_t mcpwm_num, mcpwm_fault_signal_t fault_sig);
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/**
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* @brief Initialize capture submodule
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*
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* @note Enabling capture feature would also enable the capture interrupt event,
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* users have to register an interrupt handler by `mcpwm_isr_register`, and in there, query the capture data.
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* @note The capture timer uses APB_CLK (typically 80MHz) as the count source.
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*
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* @param mcpwm_num set MCPWM unit(0-1)
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* @param cap_edge set capture edge, BIT(0) - negative edge, BIT(1) - positive edge
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* @param cap_sig capture pin, which needs to be enabled
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* @param num_of_pulse Input capture signal prescaling, ranges from 0 to 255, representing prescaling from 1 to 256.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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__attribute__((deprecated("please use mcpwm_capture_enable_channel instead")))
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esp_err_t mcpwm_capture_enable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig, mcpwm_capture_on_edge_t cap_edge,
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uint32_t num_of_pulse);
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/**
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* @brief Disable capture signal
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*
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* @param mcpwm_num set MCPWM unit(0-1)
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* @param cap_sig capture pin, which needs to be disabled
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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__attribute__((deprecated("please use mcpwm_capture_disable_channel instead")))
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esp_err_t mcpwm_capture_disable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);
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/**
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* @brief Enable capture channel
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*
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@ -819,24 +776,6 @@ uint32_t mcpwm_capture_signal_get_value(mcpwm_unit_t mcpwm_num, mcpwm_capture_si
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*/
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uint32_t mcpwm_capture_signal_get_edge(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);
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/**
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* @brief Initialize sync submodule and sets the signal that will cause the timer be loaded with pre-defined value
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*
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* @param mcpwm_num set MCPWM unit(0-1)
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* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
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* @param sync_sig set the synchronization input signal
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* @param phase_val phase value in 1/1000 (for 86.7%, phase_val = 867) which timer moves to on sync signal
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*
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* @note Count direction is undefined within this API
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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__attribute__((deprecated("please use mcpwm_sync_configure() instead")))
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esp_err_t mcpwm_sync_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_sync_signal_t sync_sig,
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uint32_t phase_val);
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/**
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* @brief Initialize sync submodule and sets the signal that will cause the timer be loaded with pre-defined value
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*
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@ -905,26 +844,6 @@ esp_err_t mcpwm_timer_trigger_soft_sync(mcpwm_unit_t mcpwm_num, mcpwm_timer_t ti
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*/
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esp_err_t mcpwm_sync_invert_gpio_synchro(mcpwm_unit_t mcpwm_num, mcpwm_sync_signal_t sync_sig, bool invert);
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/**
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* @brief Register MCPWM interrupt handler, the handler is an ISR.
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* the handler will be attached to the same CPU core that this function is running on.
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*
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* @param mcpwm_num set MCPWM unit(0-1)
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* @param fn interrupt handler function.
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* @param arg user-supplied argument passed to the handler function.
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* @param intr_alloc_flags flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. see esp_intr_alloc.h for more info.
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* @param handle pointer to return handle. If non-NULL, a handle for the interrupt will
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* be returned here.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Function pointer error.
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*/
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__attribute__((deprecated("interrupt events are handled by driver, please use callback")))
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esp_err_t mcpwm_isr_register(mcpwm_unit_t mcpwm_num, void (*fn)(void *), void *arg, int intr_alloc_flags,
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intr_handle_t *handle);
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#ifdef __cplusplus
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}
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#endif
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@ -26,7 +26,7 @@ extern "C" {
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*/
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bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num);
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#define RTC_GPIO_IS_VALID_GPIO(gpio_num) rtc_gpio_is_valid_gpio(gpio_num) // Deprecated, use rtc_gpio_is_valid_gpio()
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#define RTC_GPIO_IS_VALID_GPIO(gpio_num) rtc_gpio_is_valid_gpio(gpio_num)
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#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
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/**
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@ -259,26 +259,6 @@ esp_err_t sdmmc_host_io_int_wait(int slot, TickType_t timeout_ticks);
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*/
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esp_err_t sdmmc_host_deinit(void);
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/**
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* @brief Enable the pull-ups of sd pins.
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*
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* This function is deprecated. Please set SDMMC_SLOT_FLAG_INTERNAL_PULLUP flag in
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* sdmmc_slot_config_t::flags instead.
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*
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* @note You should always place actual pullups on the lines instead of using
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* this function. Internal pullup resistance are high and not sufficient, may
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* cause instability in products. This is for debug or examples only.
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*
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* @param slot Slot to use, normally set it to 1.
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* @param width Bit width of your configuration, 1 or 4.
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*
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* @return
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* - ESP_OK: if success
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* - ESP_ERR_INVALID_ARG: if configured width larger than maximum the slot can
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* support
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*/
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esp_err_t sdmmc_host_pullup_en(int slot, int width) __attribute__((deprecated));
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#ifdef __cplusplus
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}
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#endif
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@ -331,21 +331,6 @@ esp_err_t spi_device_acquire_bus(spi_device_handle_t device, TickType_t wait);
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*/
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void spi_device_release_bus(spi_device_handle_t dev);
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/**
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* @brief Calculate the working frequency that is most close to desired frequency, and also the register value.
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*
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* @param fapb The frequency of apb clock, should be ``APB_CLK_FREQ``.
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* @param hz Desired working frequency
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* @param duty_cycle Duty cycle of the spi clock
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* @param reg_o Output of value to be set in clock register, or NULL if not needed.
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*
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* @deprecated The app shouldn't care about the register. Call ``spi_get_actual_clock`` instead.
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*
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* @return Actual working frequency that most fit.
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*/
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int spi_cal_clock(int fapb, int hz, int duty_cycle, uint32_t *reg_o) __attribute__((deprecated));
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/**
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* @brief Calculate the working frequency that is most close to desired frequency.
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*
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@ -362,7 +347,7 @@ int spi_get_actual_clock(int fapb, int hz, int duty_cycle);
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*
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* @param gpio_is_used True if using GPIO matrix, or False if iomux pins are used.
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* @param input_delay_ns Input delay from SCLK launch edge to MISO data valid.
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* @param eff_clk Effective clock frequency (in Hz) from spi_cal_clock.
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* @param eff_clk Effective clock frequency (in Hz) from `spi_get_actual_clock()`.
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* @param dummy_o Address of dummy bits used output. Set to NULL if not needed.
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* @param cycles_remain_o Address of cycles remaining (after dummy bits are used) output.
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* - -1 If too many cycles remaining, suggest to compensate half a clock.
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@ -579,31 +579,6 @@ esp_err_t uart_get_buffered_data_len(uart_port_t uart_num, size_t* size);
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*/
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esp_err_t uart_disable_pattern_det_intr(uart_port_t uart_num);
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#if CONFIG_IDF_TARGET_ESP32
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/**
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* @brief UART enable pattern detect function.
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* Designed for applications like 'AT commands'.
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* When the hardware detect a series of one same character, the interrupt will be triggered.
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* @note This function only works for esp32. And this function is deprecated, please use
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* uart_enable_pattern_det_baud_intr instead.
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*
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* @param uart_num UART port number.
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* @param pattern_chr character of the pattern.
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* @param chr_num number of the character, 8bit value.
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* @param chr_tout timeout of the interval between each pattern characters, 24bit value, unit is APB (80Mhz) clock cycle.
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* When the duration is less than this value, it will not take this data as at_cmd char.
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* @param post_idle idle time after the last pattern character, 24bit value, unit is APB (80Mhz) clock cycle.
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* When the duration is less than this value, it will not take the previous data as the last at_cmd char
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* @param pre_idle idle time before the first pattern character, 24bit value, unit is APB (80Mhz) clock cycle.
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* When the duration is less than this value, it will not take this data as the first at_cmd char.
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*
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* @return
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* - ESP_OK Success
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* - ESP_FAIL Parameter error
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*/
|
||||
esp_err_t uart_enable_pattern_det_intr(uart_port_t uart_num, char pattern_chr, uint8_t chr_num, int chr_tout, int post_idle, int pre_idle) __attribute__((deprecated));
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART enable pattern detect function.
|
||||
* Designed for applications like 'AT commands'.
|
||||
@ -768,8 +743,7 @@ esp_err_t uart_get_collision_flag(uart_port_t uart_num, bool* collision_flag);
|
||||
* be obtained from UART FIFO). Depending on the baud rate, a few characters
|
||||
* after that will also not be received. Note that when the chip enters and exits
|
||||
* light sleep mode, APB frequency will be changing. To make sure that UART has
|
||||
* correct baud rate all the time, select REF_TICK as UART clock source,
|
||||
* by setting use_ref_tick field in uart_config_t to true.
|
||||
* correct baud rate all the time, select UART_SCLK_REF_TICK or UART_SCLK_XTAL as UART clock source in uart_config_t::source_clk.
|
||||
*
|
||||
* @note in ESP32, the wakeup signal can only be input via IO_MUX (i.e.
|
||||
* GPIO3 should be configured as function_1 to wake up UART0,
|
||||
|
||||
@ -761,47 +761,6 @@ static void MCPWM_ISR_ATTR mcpwm_default_isr_handler(void *arg) {
|
||||
}
|
||||
}
|
||||
|
||||
esp_err_t mcpwm_capture_enable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig, mcpwm_capture_on_edge_t cap_edge,
|
||||
uint32_t num_of_pulse)
|
||||
{
|
||||
ESP_RETURN_ON_FALSE(mcpwm_num < SOC_MCPWM_GROUPS, ESP_ERR_INVALID_ARG, TAG, MCPWM_GROUP_NUM_ERROR);
|
||||
ESP_RETURN_ON_FALSE(num_of_pulse <= MCPWM_LL_MAX_CAPTURE_PRESCALE, ESP_ERR_INVALID_ARG, TAG, MCPWM_PRESCALE_ERROR);
|
||||
ESP_RETURN_ON_FALSE(cap_sig < SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER, ESP_ERR_INVALID_ARG, TAG, MCPWM_CAPTURE_ERROR);
|
||||
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
|
||||
// enable MCPWM module incase user don't use `mcpwm_init` at all
|
||||
periph_module_enable(mcpwm_periph_signals.groups[mcpwm_num].module);
|
||||
mcpwm_hal_init_config_t init_config = {
|
||||
.host_id = mcpwm_num,
|
||||
};
|
||||
mcpwm_critical_enter(mcpwm_num);
|
||||
mcpwm_hal_init(hal, &init_config);
|
||||
mcpwm_ll_group_set_clock_prescale(hal->dev, context[mcpwm_num].group_pre_scale);
|
||||
mcpwm_ll_capture_enable_timer(hal->dev, true);
|
||||
mcpwm_ll_capture_enable_channel(hal->dev, cap_sig, true);
|
||||
mcpwm_ll_capture_enable_negedge(hal->dev, cap_sig, cap_edge & MCPWM_NEG_EDGE);
|
||||
mcpwm_ll_capture_enable_posedge(hal->dev, cap_sig, cap_edge & MCPWM_POS_EDGE);
|
||||
mcpwm_ll_capture_set_prescale(hal->dev, cap_sig, num_of_pulse + 1);
|
||||
// capture feature should be used with interupt, so enable it by default
|
||||
mcpwm_ll_intr_enable_capture(hal->dev, cap_sig, true);
|
||||
mcpwm_ll_intr_clear_capture_status(hal->dev, 1 << cap_sig);
|
||||
mcpwm_critical_exit(mcpwm_num);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t mcpwm_capture_disable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig)
|
||||
{
|
||||
ESP_RETURN_ON_FALSE(mcpwm_num < SOC_MCPWM_GROUPS, ESP_ERR_INVALID_ARG, TAG, MCPWM_GROUP_NUM_ERROR);
|
||||
ESP_RETURN_ON_FALSE(cap_sig < SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER, ESP_ERR_INVALID_ARG, TAG, MCPWM_CAPTURE_ERROR);
|
||||
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
|
||||
|
||||
mcpwm_critical_enter(mcpwm_num);
|
||||
mcpwm_ll_capture_enable_channel(hal->dev, cap_sig, false);
|
||||
mcpwm_ll_intr_enable_capture(hal->dev, cap_sig, false);
|
||||
mcpwm_critical_exit(mcpwm_num);
|
||||
periph_module_disable(mcpwm_periph_signals.groups[mcpwm_num].module);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t mcpwm_capture_enable_channel(mcpwm_unit_t mcpwm_num, mcpwm_capture_channel_id_t cap_channel, const mcpwm_capture_config_t *cap_conf)
|
||||
{
|
||||
ESP_RETURN_ON_FALSE(mcpwm_num < SOC_MCPWM_GROUPS, ESP_ERR_INVALID_ARG, TAG, MCPWM_GROUP_NUM_ERROR);
|
||||
@ -897,29 +856,6 @@ uint32_t MCPWM_ISR_ATTR mcpwm_capture_signal_get_edge(mcpwm_unit_t mcpwm_num, mc
|
||||
return mcpwm_ll_capture_is_negedge(hal->dev, cap_sig) ? 2 : 1;
|
||||
}
|
||||
|
||||
esp_err_t mcpwm_sync_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_sync_signal_t sync_sig,
|
||||
uint32_t phase_val)
|
||||
{
|
||||
MCPWM_TIMER_CHECK(mcpwm_num, timer_num);
|
||||
ESP_RETURN_ON_FALSE(sync_sig <= MCPWM_SELECT_GPIO_SYNC2, ESP_ERR_INVALID_ARG, TAG, "invalid sync_sig");
|
||||
ESP_RETURN_ON_FALSE(phase_val < 1000, ESP_ERR_INVALID_ARG, TAG, "phase_val must within 0~999");
|
||||
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
|
||||
|
||||
mcpwm_critical_enter(mcpwm_num);
|
||||
uint32_t set_phase = mcpwm_ll_timer_get_peak(hal->dev, timer_num, false) * phase_val / 1000;
|
||||
mcpwm_ll_timer_set_sync_phase_value(hal->dev, timer_num, set_phase);
|
||||
if (sync_sig == MCPWM_SELECT_NO_INPUT) {
|
||||
mcpwm_ll_timer_set_soft_synchro(hal->dev, timer_num);
|
||||
} else if (sync_sig <= MCPWM_SELECT_TIMER2_SYNC) {
|
||||
mcpwm_ll_timer_set_timer_synchro(hal->dev, timer_num, sync_sig - MCPWM_SELECT_TIMER0_SYNC);
|
||||
} else {
|
||||
mcpwm_ll_timer_set_gpio_synchro(hal->dev, timer_num, sync_sig - MCPWM_SELECT_GPIO_SYNC0);
|
||||
}
|
||||
mcpwm_ll_timer_enable_sync_input(hal->dev, timer_num, true);
|
||||
mcpwm_critical_exit(mcpwm_num);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t mcpwm_sync_configure(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpwm_sync_config_t *sync_conf)
|
||||
{
|
||||
MCPWM_TIMER_CHECK(mcpwm_num, timer_num);
|
||||
@ -1003,12 +939,3 @@ esp_err_t mcpwm_set_timer_sync_output(mcpwm_unit_t mcpwm_num, mcpwm_timer_t time
|
||||
mcpwm_critical_exit(mcpwm_num);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t mcpwm_isr_register(mcpwm_unit_t mcpwm_num, void (*fn)(void *), void *arg, int intr_alloc_flags, intr_handle_t *handle)
|
||||
{
|
||||
esp_err_t ret;
|
||||
ESP_RETURN_ON_FALSE(mcpwm_num < SOC_MCPWM_GROUPS, ESP_ERR_INVALID_ARG, TAG, MCPWM_GROUP_NUM_ERROR);
|
||||
ESP_RETURN_ON_FALSE(fn, ESP_ERR_INVALID_ARG, TAG, MCPWM_PARAM_ADDR_ERROR);
|
||||
ret = esp_intr_alloc(mcpwm_periph_signals.groups[mcpwm_num].irq_id, intr_alloc_flags, fn, arg, handle);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -718,6 +718,3 @@ static esp_err_t sdmmc_host_pullup_en_internal(int slot, int width)
|
||||
}
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
/* Deprecared public function */
|
||||
esp_err_t sdmmc_host_pullup_en(int slot, int width) __attribute__((alias("sdmmc_host_pullup_en_internal")));
|
||||
|
||||
@ -456,11 +456,6 @@ esp_err_t spi_bus_remove_device(spi_device_handle_t handle)
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
int spi_cal_clock(int fapb, int hz, int duty_cycle, uint32_t *reg_o)
|
||||
{
|
||||
return spi_ll_master_cal_clock(fapb, hz, duty_cycle, reg_o);
|
||||
}
|
||||
|
||||
int spi_get_actual_clock(int fapb, int hz, int duty_cycle)
|
||||
{
|
||||
return spi_hal_master_cal_clock(fapb, hz, duty_cycle);
|
||||
|
||||
@ -76,16 +76,6 @@ typedef enum {
|
||||
/// Use the highest speed that is available for the clock source picked by clk_flags
|
||||
#define I2C_CLK_FREQ_MAX (-1)
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
typedef enum{
|
||||
I2C_CMD_RESTART = 0, /*!<I2C restart command */
|
||||
I2C_CMD_WRITE, /*!<I2C write command */
|
||||
I2C_CMD_READ, /*!<I2C read command */
|
||||
I2C_CMD_STOP, /*!<I2C stop command */
|
||||
I2C_CMD_END /*!<I2C end command */
|
||||
} i2c_opmode_t __attribute__((deprecated));
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -124,10 +124,7 @@ typedef struct {
|
||||
uart_stop_bits_t stop_bits; /*!< UART stop bits*/
|
||||
uart_hw_flowcontrol_t flow_ctrl; /*!< UART HW flow control mode (cts/rts)*/
|
||||
uint8_t rx_flow_ctrl_thresh; /*!< UART HW RTS threshold*/
|
||||
union {
|
||||
uart_sclk_t source_clk; /*!< UART source clock selection */
|
||||
bool use_ref_tick __attribute__((deprecated)); /*!< Deprecated method to select ref tick clock source, set source_clk field instead */
|
||||
};
|
||||
uart_sclk_t source_clk; /*!< UART source clock selection */
|
||||
} uart_config_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -100,7 +100,7 @@ When DFS is enabled, the APB frequency can be changed multiple times within a si
|
||||
|
||||
The following peripherals work normally even when the APB frequency is changing:
|
||||
|
||||
- **UART**: if REF_TICK is used as a clock source. See cpp:member:`uart_config_t::use_ref_tick`.
|
||||
- **UART**: if REF_TICK or XTAL is used as a clock source. See :cpp:member:`uart_config_t::source_clk`.
|
||||
- **LEDC**: if REF_TICK is used as a clock source. See :cpp:func:`ledc_timer_config` function.
|
||||
- **RMT**: if REF_TICK or XTAL is used as a clock source. See :cpp:member:`rmt_config_t::flags` and macro `RMT_CHANNEL_FLAGS_AWARE_DFS`.
|
||||
- **GPTimer**: if APB is used as the clock source. See :cpp:member:`gptimer_config_t::clk_src`.
|
||||
|
||||
@ -75,12 +75,60 @@ Breaking Changes in Usage
|
||||
UART
|
||||
----
|
||||
|
||||
- ``uart_isr_register`` and ``uart_isr_free`` have been removed as the UART interrupt handling is closely related to the driver implementation.
|
||||
+-----------------------------------------------+-----------------------------------------------+----------------------------------------------------------+
|
||||
| Removed/Deprecated items | Replacement | Remarks |
|
||||
+===============================================+===============================================+==========================================================+
|
||||
| ``uart_isr_register()`` | None | UART interrupt handling is implemented by driver itself. |
|
||||
+-----------------------------------------------+-----------------------------------------------+----------------------------------------------------------+
|
||||
| ``uart_isr_free()`` | None | UART interrupt handling is implemented by driver itself. |
|
||||
+-----------------------------------------------+-----------------------------------------------+----------------------------------------------------------+
|
||||
| ``use_ref_tick`` in :cpp:type:`uart_config_t` | :cpp:member:`uart_config_t::source_clk` | Select the clock source. |
|
||||
+-----------------------------------------------+-----------------------------------------------+----------------------------------------------------------+
|
||||
| ``uart_enable_pattern_det_intr()`` | :cpp:func:`uart_enable_pattern_det_baud_intr` | Enable pattern detection interrupt. |
|
||||
+-----------------------------------------------+-----------------------------------------------+----------------------------------------------------------+
|
||||
|
||||
I2C
|
||||
---
|
||||
|
||||
- ``i2c_isr_register`` and ``i2c_isr_free`` have been removed as the I2C interrupt handling is closely related to the driver implementation.
|
||||
+--------------------------+-------------+---------------------------------------------------------+
|
||||
| Removed/Deprecated items | Replacement | Remarks |
|
||||
+==========================+=============+=========================================================+
|
||||
| ``i2c_isr_register()`` | None | I2C interrupt handling is implemented by driver itself. |
|
||||
+--------------------------+-------------+---------------------------------------------------------+
|
||||
| ``i2c_isr_register()`` | None | I2C interrupt handling is implemented by driver itself. |
|
||||
+--------------------------+-------------+---------------------------------------------------------+
|
||||
| ``i2c_opmode_t`` | None | It's not used anywhere in esp-idf. |
|
||||
+--------------------------+-------------+---------------------------------------------------------+
|
||||
|
||||
SPI
|
||||
---
|
||||
|
||||
+--------------------------+----------------------------------+---------------------------------+
|
||||
| Removed/Deprecated items | Replacement | Remarks |
|
||||
+==========================+==================================+=================================+
|
||||
| ``spi_cal_clock()`` | :cpp:func:`spi_get_actual_clock` | Get SPI real working frequency. |
|
||||
+--------------------------+----------------------------------+---------------------------------+
|
||||
|
||||
.. only:: SOC_SDMMC_HOST_SUPPORTED
|
||||
|
||||
SDMMC
|
||||
-----
|
||||
|
||||
+----------------------------+----------------------------------------------+--------------------------+
|
||||
| Removed/Deprecated items | Replacement | Remarks |
|
||||
+============================+==============================================+==========================+
|
||||
| ``sdmmc_host_pullup_en()`` | set ``SDMMC_SLOT_FLAG_INTERNAL_PULLUP`` flag | Enable internal pull up. |
|
||||
| | in :cpp:member:`sdmmc_slot_config_t::flags` | |
|
||||
+----------------------------+----------------------------------------------+--------------------------+
|
||||
|
||||
LEDC
|
||||
-----
|
||||
|
||||
+------------------------------------------------+----------------------------------------------------+-----------------------------------+
|
||||
| Removed/Deprecated items | Replacement | Remarks |
|
||||
+================================================+====================================================+===================================+
|
||||
| ``bit_num`` in :cpp:type:`ledc_timer_config_t` | :cpp:member:`ledc_timer_config_t::duty_resolution` | Set resolution of the duty cycle. |
|
||||
+------------------------------------------------+----------------------------------------------------+-----------------------------------+
|
||||
|
||||
.. only:: SOC_PCNT_SUPPORTED
|
||||
|
||||
@ -189,3 +237,21 @@ LCD
|
||||
|
||||
- The LCD panel initialization flow is slightly changed. Now the :cpp:func:`esp_lcd_panel_init` won't turn on the display automatically. User needs to call :cpp:func:`esp_lcd_panel_disp_on_off` to manually turn on the display. Note, this is different from turning on backlight. With this breaking change, user can flush a predefined pattern to the screen before turning on the screen. This can help avoid random noise on the screen after a power on reset.
|
||||
- :cpp:func:`esp_lcd_panel_disp_off` is deprecated, please use :cpp:func:`esp_lcd_panel_disp_on_off` instead.
|
||||
|
||||
.. only:: SOC_MCPWM_SUPPORTED
|
||||
|
||||
MCPWM
|
||||
-----
|
||||
|
||||
+---------------------------+---------------------------------------------------+-----------------------------------------------------------+
|
||||
| Removed/Deprecated items | Replacement | Remarks |
|
||||
+===========================+===================================================+===========================================================+
|
||||
| ``mcpwm_capture_enable`` | :cpp:func:`mcpwm_capture_enable_channel` | Enable capture channel. |
|
||||
+---------------------------+---------------------------------------------------+-----------------------------------------------------------+
|
||||
| ``mcpwm_capture_disable`` | :cpp:func:`mcpwm_capture_capture_disable_channel` | Disable capture channel. |
|
||||
+---------------------------+---------------------------------------------------+-----------------------------------------------------------+
|
||||
| ``mcpwm_sync_enable`` | :cpp:func:`mcpwm_sync_configure` | Configure synchronization. |
|
||||
+---------------------------+---------------------------------------------------+-----------------------------------------------------------+
|
||||
| ``mcpwm_isr_register`` | By registering event callbacks, e.g. | MCPWM interrupt handling is implemented by driver itself. |
|
||||
| | :cpp:member:`mcpwm_capture_config_t::capture_cb` | |
|
||||
+---------------------------+---------------------------------------------------+-----------------------------------------------------------+
|
||||
|
||||
@ -100,7 +100,7 @@ ESP-IDF 中集成的电源管理算法可以根据应用程序组件的需求，
|
||||
|
||||
以下外设不受 APB 频率变更的影响：
|
||||
|
||||
- **UART**：如果 REF_TICK 用作时钟源，则 UART 不受 APB 频率变更影响。请查看 :cpp:member:`uart_config_t::use_ref_tick`。
|
||||
- **UART**：如果 REF_TICK 或者 XTAL 用作时钟源，则 UART 不受 APB 频率变更影响。请查看 :cpp:member:`uart_config_t::source_clk`。
|
||||
- **LEDC**：如果 REF_TICK 用作时钟源，则 LEDC 不受 APB 频率变更影响。请查看 :cpp:func:`ledc_timer_config` 函数。
|
||||
- **RMT**：如果 REF_TICK 或者 XTAL 被用作时钟源，则 RMT 不受 APB 频率变更影响。请查看 :cpp:member:`rmt_config_t::flags` 以及 `RMT_CHANNEL_FLAGS_AWARE_DFS` 宏。
|
||||
- **GPTimer**：如果 XTAL 用作时钟源，则 GPTimer 不受 APB 频率变更影响。请查看 :cpp:member:`gptimer_config_t::clk_src`。
|
||||
|
||||
Loading…
Reference in New Issue
Block a user