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esp_eth: ESP32 EMAC to use common DMA busrt size for both Tx and Rx

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This commit is contained in:
David Cermak 2022-01-14 09:29:08 +01:00 committed by David Čermák
parent 2553fb5845
commit 1dc60730ee
4 changed files with 25 additions and 19 deletions
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24
components/esp_eth/include/esp_eth_mac.h
View File

@ -361,21 +361,24 @@ typedef union {
* @brief Options of EMAC DMA burst len
*/
typedef enum {
ETH_DMA_RX_BURST_LEN_32,
ETH_DMA_RX_BURST_LEN_16,
ETH_DMA_RX_BURST_LEN_8,
} eth_mac_dma_rx_burst_len_t;
ETH_DMA_BURST_LEN_32,
ETH_DMA_BURST_LEN_16,
ETH_DMA_BURST_LEN_8,
ETH_DMA_BURST_LEN_4,
ETH_DMA_BURST_LEN_2,
ETH_DMA_BURST_LEN_1,
} eth_mac_dma_burst_len_t;
/**
* @brief EMAC specific configuration (sub-struct of Ethernet MAC config)
*
*/
typedef struct {
int smi_mdc_gpio_num; /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
int smi_mdio_gpio_num; /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
eth_data_interface_t interface; /*!< EMAC Data interface to PHY (MII/RMII) */
eth_mac_clock_config_t clock_config; /*!< EMAC Interface clock configuration */
eth_mac_dma_rx_burst_len_t dma_rx_burst_len; /*!< EMAC DMA Rx burst len configuration */
int smi_mdc_gpio_num; /*!< SMI MDC GPIO number, set to -1 could bypass the SMI GPIO configuration */
int smi_mdio_gpio_num; /*!< SMI MDIO GPIO number, set to -1 could bypass the SMI GPIO configuration */
eth_data_interface_t interface; /*!< EMAC Data interface to PHY (MII/RMII) */
eth_mac_clock_config_t clock_config; /*!< EMAC Interface clock configuration */
eth_mac_dma_burst_len_t dma_burst_len; /*!< EMAC DMA burst length for both Tx and Rx */
} eth_esp32_emac_t;
/**
@ -422,7 +425,8 @@ typedef struct {
.clock_mode = EMAC_CLK_DEFAULT, \
.clock_gpio = EMAC_CLK_IN_GPIO \
} \
} \
}, \
.dma_burst_len = ETH_DMA_BURST_LEN_32 \
} \
}

11
components/esp_eth/src/esp_eth_mac_esp.c
View File

@ -61,7 +61,7 @@ typedef struct {
#ifdef CONFIG_PM_ENABLE
esp_pm_lock_handle_t pm_lock;
#endif
eth_mac_dma_rx_burst_len_t dma_rx_burst_len;
eth_mac_dma_burst_len_t dma_burst_len;
} emac_esp32_t;
static esp_err_t esp_emac_alloc_driver_obj(const eth_mac_config_t *config, emac_esp32_t **emac_out_hdl, void **out_descriptors);
@ -345,8 +345,11 @@ static esp_err_t emac_esp32_init(esp_eth_mac_t *mac)
emac_hal_init_mac_default(&emac->hal);
/* init dma registers by default with selected EMAC_RX_DMA_BURST */
emac_hal_init_dma_default(&emac->hal,
emac->dma_rx_burst_len == ETH_DMA_RX_BURST_LEN_8 ? EMAC_LL_DMA_BURST_LENGTH_8BEAT :
emac->dma_rx_burst_len == ETH_DMA_RX_BURST_LEN_16 ? EMAC_LL_DMA_BURST_LENGTH_16BEAT :
emac->dma_burst_len == ETH_DMA_BURST_LEN_1 ? EMAC_LL_DMA_BURST_LENGTH_1BEAT :
emac->dma_burst_len == ETH_DMA_BURST_LEN_2 ? EMAC_LL_DMA_BURST_LENGTH_2BEAT :
emac->dma_burst_len == ETH_DMA_BURST_LEN_4 ? EMAC_LL_DMA_BURST_LENGTH_4BEAT :
emac->dma_burst_len == ETH_DMA_BURST_LEN_8 ? EMAC_LL_DMA_BURST_LENGTH_8BEAT :
emac->dma_burst_len == ETH_DMA_BURST_LEN_16 ? EMAC_LL_DMA_BURST_LENGTH_16BEAT :
EMAC_LL_DMA_BURST_LENGTH_32BEAT);
/* get emac address from efuse */
ESP_GOTO_ON_ERROR(esp_read_mac(emac->addr, ESP_MAC_ETH), err, TAG, "fetch ethernet mac address failed");
@ -466,7 +469,7 @@ static esp_err_t esp_emac_alloc_driver_obj(const eth_mac_config_t *config, emac_
emac = calloc(1, sizeof(emac_esp32_t));
}
ESP_GOTO_ON_FALSE(emac, ESP_ERR_NO_MEM, err, TAG, "no mem for esp emac object");
emac->dma_rx_burst_len = config->esp32_emac.dma_rx_burst_len;
emac->dma_burst_len = config->esp32_emac.dma_burst_len;
/* alloc memory for ethernet dma descriptor */
uint32_t desc_size = CONFIG_ETH_DMA_RX_BUFFER_NUM * sizeof(eth_dma_rx_descriptor_t) +
CONFIG_ETH_DMA_TX_BUFFER_NUM * sizeof(eth_dma_tx_descriptor_t);

7
components/hal/emac_hal.c
View File

@ -265,7 +265,7 @@ void emac_hal_enable_flow_ctrl(emac_hal_context_t *hal, bool enable)
}
}
void emac_hal_init_dma_default(emac_hal_context_t *hal, uint32_t dma_rx_burst_len)
void emac_hal_init_dma_default(emac_hal_context_t *hal, uint32_t dma_burst_len)
{
/* DMAOMR Configuration */
/* Enable Dropping of TCP/IP Checksum Error Frames */
@ -295,10 +295,9 @@ void emac_hal_init_dma_default(emac_hal_context_t *hal, uint32_t dma_rx_burst_le
/* Enable Address Aligned Beates */
emac_ll_addr_align_enable(hal->dma_regs, true);
/* Use Separate PBL */
emac_ll_use_separate_pbl_enable(hal->dma_regs, true);
emac_ll_use_separate_pbl_enable(hal->dma_regs, false);
/* Set Rx/Tx DMA Burst Length */
emac_ll_set_rx_dma_pbl(hal->dma_regs, dma_rx_burst_len);
emac_ll_set_prog_burst_len(hal->dma_regs, EMAC_LL_DMA_BURST_LENGTH_32BEAT);
emac_ll_set_prog_burst_len(hal->dma_regs, dma_burst_len);
/* Enable Enhanced Descriptor,8 Words(32 Bytes) */
emac_ll_enhance_desc_enable(hal->dma_regs, true);
/* Specifies the number of word to skip between two unchained descriptors (Ring mode) */

2
components/hal/include/hal/emac_hal.h
View File

@ -189,7 +189,7 @@ void emac_hal_set_csr_clock_range(emac_hal_context_t *hal, int freq);
void emac_hal_init_mac_default(emac_hal_context_t *hal);
void emac_hal_init_dma_default(emac_hal_context_t *hal, uint32_t dma_rx_burst_len);
void emac_hal_init_dma_default(emac_hal_context_t *hal, uint32_t dma_burst_len);
void emac_hal_set_speed(emac_hal_context_t *hal, uint32_t speed);