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spi: refactor spi_common dma allocator

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This commit is contained in:
Armando 2021-02-03 15:14:17 +08:00 committed by bot
parent c8d9ed1f3d
commit db3bf8b544
15 changed files with 233 additions and 334 deletions
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21
components/driver/include/driver/spi_common.h
View File

@ -29,6 +29,8 @@ extern "C"
//Maximum amount of bytes that can be put in one DMA descriptor
#define SPI_MAX_DMA_LEN (4096-4)
//Set the ``dma_chan`` to this, then driver will auto-alloc a DMA channel
#define DMA_AUTO_CHAN (-2)
/**
* Transform unsigned integer of length <= 32 bits to the format which can be
@ -103,13 +105,15 @@ typedef struct {
*
* @warning For now, only supports HSPI and VSPI.
*
* @param host_id SPI peripheral that controls this bus
* @param bus_config Pointer to a spi_bus_config_t struct specifying how the host should be initialized
* @param dma_chan -1: auto dma allocate mode; 0: non-dma mode; 1 or 2: assign a specific DMA channel;
* Selecting a DMA channel for an SPI bus allows transfers on the bus to have sizes only
* limited by the amount of internal memory. Selecting no DMA channel (by passing the
* value 0) limits the amount of bytes transfered to a maximum of 64. Set to 0 if only
* the SPI flash uses this bus. Set -1 to let the driver to allocate the DMA channel.
* @param host_id SPI peripheral that controls this bus
* @param bus_config Pointer to a spi_bus_config_t struct specifying how the host should be initialized
* @param dma_chan - DMA_AUTO_CHAN: allocate a free channel automatically;
* - 1 or 2: assign a specific DMA channel;
* - 0: non-dma mode;
* Selecting a DMA channel for an SPI bus allows transfers on the bus to have sizes only
* limited by the amount of internal memory. Selecting no DMA channel (by passing the
* value 0) limits the amount of bytes transfered to a maximum of 64. Set to 0 if only
* the SPI flash uses this bus. Set to DMA_AUTO_CHAN to let the driver to allocate the DMA channel.
*
* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
* DMA-capable memory.
@ -120,7 +124,8 @@ typedef struct {
*
* @return
* - ESP_ERR_INVALID_ARG if configuration is invalid
* - ESP_ERR_INVALID_STATE if host already is in use or DMA channel is not available
* - ESP_ERR_INVALID_STATE if host already is in use
* - ESP_ERR_NOT_FOUND if there is no available DMA channel
* - ESP_ERR_NO_MEM if out of memory
* - ESP_OK on success
*/

22
components/driver/include/driver/spi_common_internal.h
View File

@ -118,41 +118,29 @@ bool spicommon_periph_in_use(spi_host_device_t host);
bool spicommon_periph_free(spi_host_device_t host);
/**
* @brief Check whether the spi DMA channel is in use.
*
* @param dma_chan DMA channel to check.
*
* @note This public API is deprecated.
*
* @return True if in use, otherwise false.
*/
bool spicommon_dma_chan_in_use(int dma_chan);
/**
* @brief Configure DMA for SPI Slave
* @brief Alloc DMA for SPI Slave
*
* @param host_id SPI host ID
* @param dma_chan -1: auto dma allocate mode; 0: non-dma mode; 1 or 2: assign a specific DMA channel;
* @param dma_chan DMA_AUTO_CHAN: auto dma allocate mode; 0: non-dma mode; 1 or 2: assign a specific DMA channel;
* @param[out] out_actual_tx_dma_chan Actual TX DMA channel (if you choose to assign a specific DMA channel, this will be the channel you assigned before)
* @param[out] out_actual_rx_dma_chan Actual RX DMA channel (if you choose to assign a specific DMA channel, this will be the channel you assigned before)
*
* @return
* - ESP_OK: On success
* - ESP_ERR_NO_MEM: No enough memory
* - ESP_ERR_INVALID_STATE: Driver invalid state, check the log message for details
* - ESP_ERR_NOT_FOUND: There is no available DMA channel
*/
esp_err_t spicommon_slave_alloc_dma(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
/**
* @brief Free DMA for SPI Slave
*
* @param host_id SPI host ID
* @param dma_chan Actual used DMA channel
*
* @return
* - ESP_OK: On success
*/
esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id, int dma_chan);
esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id);
/**
* @brief Connect a SPI peripheral to GPIO pins

21
components/driver/include/driver/spi_slave.h
View File

@ -90,14 +90,16 @@ struct spi_slave_transaction_t {
*
* @warning For now, only supports HSPI and VSPI.
*
* @param host SPI peripheral to use as a SPI slave interface
* @param bus_config Pointer to a spi_bus_config_t struct specifying how the host should be initialized
* @param slave_config Pointer to a spi_slave_interface_config_t struct specifying the details for the slave interface
* @param dma_chan -1: auto dma allocate mode; 0: non-dma mode; 1 or 2: assign a specific DMA channel;
* Selecting a DMA channel for an SPI bus allows transfers on the bus to have sizes only
* limited by the amount of internal memory. Selecting no DMA channel (by passing the
* value 0) limits the amount of bytes transfered to a maximum of 64. Set to 0 if only
* the SPI flash uses this bus. Set -1 to let the driver to allocate the DMA channel.
* @param host SPI peripheral to use as a SPI slave interface
* @param bus_config Pointer to a spi_bus_config_t struct specifying how the host should be initialized
* @param slave_config Pointer to a spi_slave_interface_config_t struct specifying the details for the slave interface
* @param dma_chan - DMA_AUTO_CHAN: allocate a free channel automatically;
* - 1 or 2: assign a specific DMA channel;
* - 0: non-dma mode;
* Selecting a DMA channel for an SPI bus allows transfers on the bus to have sizes only
* limited by the amount of internal memory. Selecting no DMA channel (by passing the
* value 0) limits the amount of bytes transfered to a maximum of 64. Set to 0 if only
* the SPI flash uses this bus. Set to DMA_AUTO_CHAN to let the driver to allocate the DMA channel.
*
* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
* DMA-capable memory.
@ -108,7 +110,8 @@ struct spi_slave_transaction_t {
*
* @return
* - ESP_ERR_INVALID_ARG if configuration is invalid
* - ESP_ERR_INVALID_STATE if host already is in use or DMA channel is not available
* - ESP_ERR_INVALID_STATE if host already is in use
* - ESP_ERR_NOT_FOUND if there is no available DMA channel
* - ESP_ERR_NO_MEM if out of memory
* - ESP_OK on success
*/

13
components/driver/include/driver/spi_slave_hd.h
View File

@ -86,7 +86,11 @@ typedef struct {
uint32_t address_bits; ///< address field bits, multiples of 8 and at least 8.
uint32_t dummy_bits; ///< dummy field bits, multiples of 8 and at least 8.
uint32_t queue_size; ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_slave_hd_queue_trans but not yet finished using spi_slave_hd_get_trans_result) at the same time
int dma_chan; ///< DMA channel used. -1: auto dma allocate mode; 0: non-dma mode; 1 or 2: assign a specific DMA channel;
int dma_chan; /**< DMA channel to used.
* - DMA_AUTO_CHAN: allocate a free channel automatically;
* - 1 or 2: assign a specific DMA channel;
* - 0: non-dma mode;
*/
spi_slave_hd_callback_config_t cb_config; ///< Callback configuration
} spi_slave_hd_slot_config_t;
@ -97,10 +101,11 @@ typedef struct {
* @param bus_config Bus configuration for the bus used
* @param config Configuration for the SPI Slave HD driver
* @return
* - ESP_OK: on success
* - ESP_ERR_INVALID_ARG: invalid argument given
* - ESP_OK: on success
* - ESP_ERR_INVALID_ARG: invalid argument given
* - ESP_ERR_INVALID_STATE: function called in invalid state, may be some resources are already in use
* - ESP_ERR_NO_MEM: memory allocation failed
* - ESP_ERR_NOT_FOUND if there is no available DMA channel
* - ESP_ERR_NO_MEM: memory allocation failed
* - or other return value from `esp_intr_alloc`
*/
esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *bus_config,

237
components/driver/spi_common.c
View File

@ -31,22 +31,11 @@
#include "stdatomic.h"
#include "hal/spi_hal.h"
#include "esp_rom_gpio.h"
#if CONFIG_IDF_TARGET_ESP32
#include "soc/dport_reg.h"
#endif
//This GDMA related part will be introduced by GDMA dedicated APIs in the future. Here we temporarily use macros.
#if SOC_GDMA_SUPPORTED
#include "esp_private/gdma.h"
#include "hal/gdma_ll.h"
#include "soc/gdma_channel.h"
#include "soc/spi_caps.h"
#define spi_dma_set_rx_channel_priority(gdma_chan, priority) gdma_ll_rx_set_priority(&GDMA, gdma_chan, priority);
#define spi_dma_set_tx_channel_priority(gdma_chan, priority) gdma_ll_tx_set_priority(&GDMA, gdma_chan, priority);
#define spi_dma_connect_rx_channel_to_periph(gdma_chan, periph_id) gdma_ll_rx_connect_to_periph(&GDMA, gdma_chan, periph_id);
#define spi_dma_connect_tx_channel_to_periph(gdma_chan, periph_id) gdma_ll_tx_connect_to_periph(&GDMA, gdma_chan, periph_id);
#endif
static const char *SPI_TAG = "spi";
@ -64,12 +53,18 @@ static const char *SPI_TAG = "spi";
SPI_CHECK(GPIO_IS_VALID_GPIO(pin_num), pin_name" not valid", ESP_ERR_INVALID_ARG); \
}
typedef struct spi_device_t spi_device_t;
#define MAIN_BUS_DEFAULT() { \
.host_id = 0, \
.bus_attr = { \
.tx_dma_chan = 0, \
.rx_dma_chan = 0, \
.max_transfer_sz = SOC_SPI_MAXIMUM_BUFFER_SIZE, \
.dma_desc_num= 0, \
}, \
}
#define FUNC_GPIO PIN_FUNC_GPIO
#define DMA_CHANNEL_ENABLED(dma_chan) (BIT(dma_chan-1))
typedef struct {
int host_id;
@ -82,39 +77,35 @@ typedef struct {
#endif
} spicommon_bus_context_t;
#define MAIN_BUS_DEFAULT() { \
.host_id = 0, \
.bus_attr = { \
.tx_dma_chan = 0, \
.rx_dma_chan = 0, \
.max_transfer_sz = SOC_SPI_MAXIMUM_BUFFER_SIZE, \
.dma_desc_num= 0, \
}, \
}
//Periph 1 is 'claimed' by SPI flash code.
static atomic_bool spi_periph_claimed[SOC_SPI_PERIPH_NUM] = { ATOMIC_VAR_INIT(true), ATOMIC_VAR_INIT(false),
#if (SOC_SPI_PERIPH_NUM >= 3)
ATOMIC_VAR_INIT(false),
#endif
#if (SOC_SPI_PERIPH_NUM >= 4)
ATOMIC_VAR_INIT(false),
ATOMIC_VAR_INIT(false),
#endif
};
static const char* spi_claiming_func[3] = {NULL, NULL, NULL};
#if !SOC_GDMA_SUPPORTED
static uint8_t spi_dma_chan_enabled = 0;
static portMUX_TYPE spi_dma_spinlock = portMUX_INITIALIZER_UNLOCKED;
#endif
static const char* spi_claiming_func[3] = {NULL, NULL, NULL};
static spicommon_bus_context_t s_mainbus = MAIN_BUS_DEFAULT();
static spicommon_bus_context_t* bus_ctx[SOC_SPI_PERIPH_NUM] = {&s_mainbus};
#if CONFIG_IDF_TARGET_ESP32
//ESP32S2 does not support DMA channel auto-allocation
//Each bit stands for 1 dma channel, used for auto-alloc dma channel
static uint32_t spi_dma_channel_code;
#if !SOC_GDMA_SUPPORTED
//Each bit stands for 1 dma channel, BIT(0) should be used for SPI1
static uint8_t spi_dma_chan_enabled = 0;
static portMUX_TYPE spi_dma_spinlock = portMUX_INITIALIZER_UNLOCKED;
#endif //#if !SOC_GDMA_SUPPORTED
static inline bool is_valid_host(spi_host_device_t host)
{
#if (SOC_SPI_PERIPH_NUM == 2)
return host >= SPI1_HOST && host <= SPI2_HOST;
#elif (SOC_SPI_PERIPH_NUM == 3)
return host >= SPI1_HOST && host <= SPI3_HOST;
#endif
}
//----------------------------------------------------------alloc spi periph-------------------------------------------------------//
//Returns true if this peripheral is successfully claimed, false if otherwise.
@ -155,37 +146,38 @@ int spicommon_irqdma_source_for_host(spi_host_device_t host)
return spi_periph_signal[host].irq_dma;
}
//----------------------------------------------------------esp32/s2 dma periph-------------------------------------------------------//
//----------------------------------------------------------alloc dma periph-------------------------------------------------------//
#if !SOC_GDMA_SUPPORTED
static inline periph_module_t get_dma_periph(int dma_chan)
{
assert(dma_chan >= 1 && dma_chan <= SOC_SPI_DMA_CHAN_NUM);
#if CONFIG_IDF_TARGET_ESP32S2
if (dma_chan == 1) {
return PERIPH_SPI2_DMA_MODULE;
} else if (dma_chan==2) {
} else if (dma_chan == 2) {
return PERIPH_SPI3_DMA_MODULE;
} else {
abort();
return -1;
}
#elif CONFIG_IDF_TARGET_ESP32
return PERIPH_SPI_DMA_MODULE;
#endif
}
static bool spicommon_dma_chan_claim(int dma_chan)
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
static bool spicommon_dma_chan_claim(int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
bool ret = false;
assert(dma_chan >= 1 && dma_chan <= SOC_SPI_DMA_CHAN_NUM);
portENTER_CRITICAL(&spi_dma_spinlock);
if ( !(spi_dma_chan_enabled & DMA_CHANNEL_ENABLED(dma_chan)) ) {
// get the channel only when it's not claimed yet.
spi_dma_chan_enabled |= DMA_CHANNEL_ENABLED(dma_chan);
bool is_used = (BIT(dma_chan) & spi_dma_chan_enabled);
if (!is_used) {
spi_dma_chan_enabled |= BIT(dma_chan);
periph_module_enable(get_dma_periph(dma_chan));
*out_actual_tx_dma_chan = dma_chan;
*out_actual_rx_dma_chan = dma_chan;
ret = true;
}
periph_module_enable(get_dma_periph(dma_chan));
portEXIT_CRITICAL(&spi_dma_spinlock);
return ret;
@ -200,65 +192,53 @@ static void spicommon_connect_spi_and_dma(spi_host_device_t host, int dma_chan)
#endif
}
#endif //#if !SOC_GDMA_SUPPORTED
bool spicommon_dma_chan_in_use(int dma_chan)
static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
#if !SOC_GDMA_SUPPORTED
assert(dma_chan ==1 || dma_chan == 2);
return spi_dma_chan_enabled & DMA_CHANNEL_ENABLED(dma_chan);
#endif
return true;
}
//----------------------------------------------------------alloc dma periph-------------------------------------------------------//
static esp_err_t spicommon_alloc_dma(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
uint32_t actual_tx_dma_chan = 0;
uint32_t actual_rx_dma_chan = 0;
esp_err_t ret = ESP_OK;
#if !SOC_GDMA_SUPPORTED
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
if (dma_chan < 0) {
assert(is_valid_host(host_id));
#if CONFIG_IDF_TARGET_ESP32
for (int i = 0; i < SOC_SPI_DMA_CHAN_NUM; i++) {
bool is_used = BIT(i) & spi_dma_channel_code;
if (!is_used) {
spi_dma_channel_code |= BIT(i);
actual_tx_dma_chan = i+1;
actual_rx_dma_chan = i+1;
assert((dma_chan > 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN);
#elif CONFIG_IDF_TARGET_ESP32S2
assert(dma_chan == host_id || dma_chan == DMA_AUTO_CHAN);
#endif
esp_err_t ret = ESP_OK;
bool success = false;
if (dma_chan == DMA_AUTO_CHAN) {
#if CONFIG_IDF_TARGET_ESP32
for (int i = 1; i < SOC_SPI_DMA_CHAN_NUM+1; i++) {
success = spicommon_dma_chan_claim(i, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
if (success) {
break;
}
}
if (!actual_tx_dma_chan) {
SPI_CHECK(false, "no available dma channel", ESP_ERR_INVALID_STATE);
}
#elif CONFIG_IDF_TARGET_ESP32S2
//On ESP32S2, each SPI controller has its own DMA channel. So DMA channel auto-allocation is not supported
SPI_CHECK(false, "ESP32S2 does not support auto-alloc dma channel", ESP_ERR_INVALID_STATE);
//On ESP32S2, each SPI controller has its own DMA channel
success = spicommon_dma_chan_claim(host_id, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
#endif //#if CONFIG_IDF_TARGET_XXX
} else if (dma_chan > 0) {
actual_tx_dma_chan = dma_chan;
actual_rx_dma_chan = dma_chan;
} else { //dma_chan == 0
// Program won't reach here
abort();
success = spicommon_dma_chan_claim(dma_chan, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
}
bool dma_chan_claimed = spicommon_dma_chan_claim(actual_tx_dma_chan);
if (!dma_chan_claimed) {
spicommon_periph_free(host_id);
SPI_CHECK(false, "dma channel already in use", ESP_ERR_INVALID_STATE);
if (!success) {
SPI_CHECK(false, "no available dma channel", ESP_ERR_NOT_FOUND);
}
spicommon_connect_spi_and_dma(host_id, actual_tx_dma_chan);
spicommon_connect_spi_and_dma(host_id, *out_actual_tx_dma_chan);
return ret;
}
#else //SOC_GDMA_SUPPORTED
static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
assert(is_valid_host(host_id));
assert(dma_chan == DMA_AUTO_CHAN);
esp_err_t ret = ESP_OK;
spicommon_bus_context_t *ctx = bus_ctx[host_id];
if (dma_chan < 0) {
if (dma_chan == DMA_AUTO_CHAN) {
gdma_channel_alloc_config_t tx_alloc_config = {
.flags.reserve_sibling = 1,
.direction = GDMA_CHANNEL_DIRECTION_TX,
@ -277,41 +257,32 @@ static esp_err_t spicommon_alloc_dma(spi_host_device_t host_id, int dma_chan, ui
return ret;
}
if (host_id == SPI1_HOST) {
SPI_CHECK(false, "SPI1 does not support DMA mode", ESP_ERR_INVALID_STATE);
}
#if (SOC_SPI_PERIPH_NUM >= 2)
else if (host_id == SPI2_HOST) {
if (host_id == SPI2_HOST) {
gdma_connect(ctx->rx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 2));
gdma_connect(ctx->tx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 2));
}
#endif
#if (SOC_SPI_PERIPH_NUM >= 3)
else {
//host_id == SPI3_HOST
else if (host_id == SPI3_HOST) {
gdma_connect(ctx->rx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 3));
gdma_connect(ctx->tx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 3));
}
#endif
gdma_get_channel_id(ctx->tx_channel, (int *)&actual_tx_dma_chan);
gdma_get_channel_id(ctx->rx_channel, (int *)&actual_rx_dma_chan);
} else if (dma_chan > 0) {
SPI_CHECK(false, "specifying a DMA channel is not supported, please use dma auto-alloc mode", ESP_ERR_INVALID_STATE);
} else { //dma_chan == 0
// Program won't reach here
gdma_get_channel_id(ctx->tx_channel, (int *)out_actual_tx_dma_chan);
gdma_get_channel_id(ctx->rx_channel, (int *)out_actual_rx_dma_chan);
}
#endif
*out_actual_tx_dma_chan = actual_tx_dma_chan;
*out_actual_rx_dma_chan = actual_rx_dma_chan;
return ret;
}
#endif //#if !SOC_GDMA_SUPPORTED
esp_err_t spicommon_slave_alloc_dma(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
assert(is_valid_host(host_id));
assert((dma_chan == 1 || dma_chan == 2 || dma_chan == DMA_AUTO_CHAN));
esp_err_t ret = ESP_OK;
uint32_t actual_tx_dma_chan = 0;
uint32_t actual_rx_dma_chan = 0;
spicommon_bus_context_t *ctx = (spicommon_bus_context_t *)calloc(1, sizeof(spicommon_bus_context_t));
if (!ctx) {
ret = ESP_ERR_NO_MEM;
@ -320,11 +291,15 @@ esp_err_t spicommon_slave_alloc_dma(spi_host_device_t host_id, int dma_chan, uin
bus_ctx[host_id] = ctx;
ctx->host_id = host_id;
ret = spicommon_alloc_dma(host_id, dma_chan, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
ret = spicommon_dma_chan_alloc(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
if (ret != ESP_OK) {
goto cleanup;
}
ctx->bus_attr.tx_dma_chan = actual_tx_dma_chan;
ctx->bus_attr.rx_dma_chan = actual_rx_dma_chan;
*out_actual_tx_dma_chan = actual_tx_dma_chan;
*out_actual_rx_dma_chan = actual_rx_dma_chan;
return ret;
cleanup:
@ -334,19 +309,22 @@ cleanup:
}
//----------------------------------------------------------free dma periph-------------------------------------------------------//
static esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id, int dma_chan)
static esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id)
{
assert(is_valid_host(host_id));
spicommon_bus_context_t *ctx = bus_ctx[host_id];
#if !SOC_GDMA_SUPPORTED
assert( dma_chan == 1 || dma_chan == 2 );
assert( spi_dma_chan_enabled & DMA_CHANNEL_ENABLED(dma_chan) );
//On ESP32S2, each SPI controller has its own DMA channel
int dma_chan = ctx->bus_attr.tx_dma_chan;
assert(spi_dma_chan_enabled & BIT(dma_chan));
portENTER_CRITICAL(&spi_dma_spinlock);
spi_dma_chan_enabled &= ~DMA_CHANNEL_ENABLED(dma_chan);
spi_dma_chan_enabled &= ~BIT(dma_chan);
periph_module_disable(get_dma_periph(dma_chan));
portEXIT_CRITICAL(&spi_dma_spinlock);
#else //SOC_GDMA_SUPPORTED
spicommon_bus_context_t *ctx = bus_ctx[host_id];
if (ctx->rx_channel) {
gdma_disconnect(ctx->rx_channel);
gdma_del_channel(ctx->rx_channel);
@ -360,10 +338,11 @@ static esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id, int dma_chan
return ESP_OK;
}
esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id, int dma_chan)
esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id)
{
esp_err_t ret = spicommon_dma_chan_free(host_id, dma_chan);
assert(is_valid_host(host_id));
esp_err_t ret = spicommon_dma_chan_free(host_id);
free(bus_ctx[host_id]);
bus_ctx[host_id] = NULL;
@ -628,11 +607,6 @@ spi_bus_lock_handle_t spi_bus_lock_get_by_id(spi_host_device_t host_id)
return bus_ctx[host_id]->bus_attr.lock;
}
static inline bool is_valid_host(spi_host_device_t host)
{
return host >= SPI1_HOST && host <= SPI3_HOST;
}
//----------------------------------------------------------master bus init-------------------------------------------------------//
esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, int dma_chan)
{
@ -645,11 +619,11 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
SPI_CHECK(is_valid_host(host_id), "invalid host_id", ESP_ERR_INVALID_ARG);
SPI_CHECK(bus_ctx[host_id] == NULL, "SPI bus already initialized.", ESP_ERR_INVALID_STATE);
#ifdef CONFIG_IDF_TARGET_ESP32
SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == -1, "invalid dma channel", ESP_ERR_INVALID_ARG );
SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif CONFIG_IDF_TARGET_ESP32S2
SPI_CHECK( dma_chan == 0 || dma_chan == host_id, "invalid dma channel", ESP_ERR_INVALID_ARG );
SPI_CHECK( dma_chan == 0 || dma_chan == host_id || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif SOC_GDMA_SUPPORTED
SPI_CHECK( dma_chan == 0 || dma_chan == -1, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
SPI_CHECK( dma_chan == 0 || dma_chan == DMA_AUTO_CHAN, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
#endif
SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG);
#ifndef CONFIG_SPI_MASTER_ISR_IN_IRAM
@ -673,7 +647,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
if (dma_chan != 0) {
bus_attr->dma_enabled = 1;
err = spicommon_alloc_dma(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
err = spicommon_dma_chan_alloc(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
if (err != ESP_OK) {
goto cleanup;
}
@ -731,10 +705,10 @@ cleanup:
}
free(bus_attr->dmadesc_tx);
free(bus_attr->dmadesc_rx);
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
bus_attr->dmadesc_tx = NULL;
bus_attr->dmadesc_rx = NULL;
if (bus_attr->dma_enabled) {
spicommon_dma_chan_free(host_id, actual_tx_dma_chan);
spicommon_dma_chan_free(host_id);
}
}
spicommon_periph_free(host_id);
@ -766,17 +740,14 @@ esp_err_t spi_bus_free(spi_host_device_t host_id)
esp_pm_lock_delete(bus_attr->pm_lock);
#endif
spi_bus_deinit_lock(bus_attr->lock);
free(bus_attr->dmadesc_rx);
free(bus_attr->dmadesc_tx);
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
bus_attr->dmadesc_tx = NULL;
bus_attr->dmadesc_rx = NULL;
if (bus_attr->dma_enabled > 0) {
spicommon_dma_chan_free (host_id, bus_attr->tx_dma_chan);
spicommon_dma_chan_free(host_id);
}
spicommon_periph_free(host_id);
free(ctx);
bus_ctx[host_id] = NULL;
return err;

6
components/driver/spi_master.c
View File

@ -188,10 +188,12 @@ static esp_err_t spi_master_deinit_driver(void* arg);
static inline bool is_valid_host(spi_host_device_t host)
{
//SPI1 can be used as GPSPI only on ESP32
#if CONFIG_IDF_TARGET_ESP32
return host >= SPI1_HOST && host <= SPI3_HOST;
#else
// SPI_HOST (SPI1_HOST) is not supported by the SPI Master driver on ESP32-S2 and later
#elif (SOC_SPI_PERIPH_NUM == 2)
return host == SPI2_HOST;
#elif (SOC_SPI_PERIPH_NUM == 3)
return host >= SPI2_HOST && host <= SPI3_HOST;
#endif
}

20
components/driver/spi_slave.c
View File

@ -81,10 +81,12 @@ static void IRAM_ATTR spi_intr(void *arg);
static inline bool is_valid_host(spi_host_device_t host)
{
//SPI1 can be used as GPSPI only on ESP32
#if CONFIG_IDF_TARGET_ESP32
return host >= SPI1_HOST && host <= SPI3_HOST;
#else
// SPI_HOST (SPI1_HOST) is not supported by the SPI Slave driver on ESP32-S2 & later
#elif (SOC_SPI_PERIPH_NUM == 2)
return host == SPI2_HOST;
#elif (SOC_SPI_PERIPH_NUM == 3)
return host >= SPI2_HOST && host <= SPI3_HOST;
#endif
}
@ -120,11 +122,11 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
//We only support HSPI/VSPI, period.
SPI_CHECK(is_valid_host(host), "invalid host", ESP_ERR_INVALID_ARG);
#ifdef CONFIG_IDF_TARGET_ESP32
SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == -1, "invalid dma channel", ESP_ERR_INVALID_ARG );
SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif CONFIG_IDF_TARGET_ESP32S2
SPI_CHECK( dma_chan == 0 || dma_chan == host, "invalid dma channel", ESP_ERR_INVALID_ARG );
SPI_CHECK( dma_chan == 0 || dma_chan == host || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif SOC_GDMA_SUPPORTED
SPI_CHECK( dma_chan == 0 || dma_chan == -1, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
SPI_CHECK( dma_chan == 0 || dma_chan == DMA_AUTO_CHAN, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
#endif
SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG);
#ifndef CONFIG_SPI_SLAVE_ISR_IN_IRAM
@ -147,7 +149,7 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
bool use_dma = (dma_chan != 0);
spihost[host]->dma_enabled = use_dma;
if (use_dma) {
ret = spicommon_slave_alloc_dma(host, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
ret = spicommon_slave_dma_chan_alloc(host, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
if (ret != ESP_OK) {
goto cleanup;
}
@ -246,9 +248,8 @@ cleanup:
#endif
}
spi_slave_hal_deinit(&spihost[host]->hal);
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
if (spihost[host]->dma_enabled) {
spicommon_slave_free_dma(host, actual_tx_dma_chan);
spicommon_slave_free_dma(host);
}
free(spihost[host]);
@ -265,8 +266,7 @@ esp_err_t spi_slave_free(spi_host_device_t host)
if (spihost[host]->trans_queue) vQueueDelete(spihost[host]->trans_queue);
if (spihost[host]->ret_queue) vQueueDelete(spihost[host]->ret_queue);
if (spihost[host]->dma_enabled) {
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
spicommon_slave_free_dma(host, spihost[host]->tx_dma_chan);
spicommon_slave_free_dma(host);
}
free(spihost[host]->hal.dmadesc_tx);
free(spihost[host]->hal.dmadesc_rx);

25
components/driver/spi_slave_hd.c
View File

@ -23,14 +23,15 @@
#include "hal/spi_slave_hd_hal.h"
//SPI1 can never be used as the slave
#define VALID_HOST(x) (x>SPI_HOST && x<=HSPI_HOST)
#if (SOC_SPI_PERIPH_NUM == 2)
#define VALID_HOST(x) ((x) == SPI2_HOST)
#elif (SOC_SPI_PERIPH_NUM == 3)
#define VALID_HOST(x) ((x) >= SPI2_HOST && (x) <= SPI3_HOST)
#endif
#define SPIHD_CHECK(cond,warn,ret) do{if(!(cond)){ESP_LOGE(TAG, warn); return ret;}} while(0)
typedef struct {
bool dma_enabled;
uint32_t tx_dma_chan;
uint32_t rx_dma_chan;
int max_transfer_sz;
uint32_t flags;
portMUX_TYPE int_spinlock;
@ -74,9 +75,9 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b
SPIHD_CHECK(VALID_HOST(host_id), "invalid host", ESP_ERR_INVALID_ARG);
#if CONFIG_IDF_TARGET_ESP32S2
SPIHD_CHECK(config->dma_chan == 0 || config->dma_chan == host_id, "invalid dma channel", ESP_ERR_INVALID_ARG);
SPIHD_CHECK(config->dma_chan == 0 || config->dma_chan == host_id || config->dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG);
#elif SOC_GDMA_SUPPORTED
SPIHD_CHECK(config->dma_chan == 0 || config->dma_chan == -1, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG);
SPIHD_CHECK(config->dma_chan == 0 || config->dma_chan == DMA_AUTO_CHAN, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG);
#endif
#if !CONFIG_IDF_TARGET_ESP32S2
//Append mode is only supported on ESP32S2 now
@ -97,15 +98,12 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b
host->dma_enabled = (config->dma_chan != 0);
if (host->dma_enabled) {
ret = spicommon_slave_alloc_dma(host_id, config->dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
ret = spicommon_slave_dma_chan_alloc(host_id, config->dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
if (ret != ESP_OK) {
goto cleanup;
}
}
host->tx_dma_chan = actual_tx_dma_chan;
host->rx_dma_chan = actual_rx_dma_chan;
ret = spicommon_bus_initialize_io(host_id, bus_config, SPICOMMON_BUSFLAG_SLAVE | bus_config->flags, &host->flags);
if (ret != ESP_OK) {
goto cleanup;
@ -120,8 +118,8 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b
.dma_in = SPI_LL_GET_HW(host_id),
.dma_out = SPI_LL_GET_HW(host_id),
.dma_enabled = host->dma_enabled,
.tx_dma_chan = host->tx_dma_chan,
.rx_dma_chan = host->rx_dma_chan,
.tx_dma_chan = actual_tx_dma_chan,
.rx_dma_chan = actual_rx_dma_chan,
.append_mode = append_mode,
.mode = config->mode,
.tx_lsbfirst = (config->flags & SPI_SLAVE_HD_RXBIT_LSBFIRST),
@ -252,8 +250,7 @@ esp_err_t spi_slave_hd_deinit(spi_host_device_t host_id)
spicommon_periph_free(host_id);
if (host->dma_enabled) {
//On ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
spicommon_slave_free_dma(host_id, host->tx_dma_chan);
spicommon_slave_free_dma(host_id);
}
free(host);
spihost[host_id] = NULL;

61
components/driver/test/test_spi_master.c
View File

@ -74,11 +74,7 @@ TEST_CASE("SPI Master clockdiv calculation routines", "[spi]")
.quadhd_io_num=-1
};
esp_err_t ret;
#if !SOC_GDMA_SUPPORTED
ret = spi_bus_initialize(TEST_SPI_HOST, &buscfg, 1);
#else
ret = spi_bus_initialize(TEST_SPI_HOST, &buscfg, -1);
#endif
ret = spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN);
TEST_ASSERT(ret==ESP_OK);
check_spi_pre_n_for(26000000, 1, 3);
@ -116,11 +112,7 @@ static spi_device_handle_t setup_spi_bus_loopback(int clkspeed, bool dma) {
};
spi_device_handle_t handle;
#if !SOC_GDMA_SUPPORTED
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, dma ? 1 : 0));
#else
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, dma ? -1 : 0));
#endif
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, dma ? DMA_AUTO_CHAN : 0));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &handle));
//connect MOSI to two devices breaks the output, fix it.
spitest_gpio_output_sel(PIN_NUM_MOSI, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
@ -281,11 +273,7 @@ static esp_err_t test_master_pins(int mosi, int miso, int sclk, int cs)
spi_device_interface_config_t master_cfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
master_cfg.spics_io_num = cs;
#if !SOC_GDMA_SUPPORTED
ret = spi_bus_initialize(TEST_SPI_HOST, &cfg, 1);
#else
ret = spi_bus_initialize(TEST_SPI_HOST, &cfg, -1);
#endif
ret = spi_bus_initialize(TEST_SPI_HOST, &cfg, DMA_AUTO_CHAN);
if (ret != ESP_OK) {
return ret;
}
@ -312,11 +300,7 @@ static esp_err_t test_slave_pins(int mosi, int miso, int sclk, int cs)
spi_slave_interface_config_t slave_cfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
slave_cfg.spics_io_num = cs;
#if !SOC_GDMA_SUPPORTED
ret = spi_slave_initialize(TEST_SLAVE_HOST, &cfg, &slave_cfg, TEST_DMA_CHAN_SLAVE);
#else
ret = spi_slave_initialize(TEST_SLAVE_HOST, &cfg, &slave_cfg, -1);
#endif
ret = spi_slave_initialize(TEST_SLAVE_HOST, &cfg, &slave_cfg, DMA_AUTO_CHAN);
if (ret != ESP_OK) {
return ret;
}
@ -523,11 +507,7 @@ TEST_CASE("SPI Master no response when switch from host1 (HSPI) to host2 (VSPI)"
//initialize for first host
host = TEST_SPI_HOST;
#if !SOC_GDMA_SUPPORTED
TEST_ESP_OK(spi_bus_initialize(host, &bus_config, host));
#else
TEST_ESP_OK(spi_bus_initialize(host, &bus_config, -1));
#endif
TEST_ESP_OK(spi_bus_initialize(host, &bus_config, DMA_AUTO_CHAN));
TEST_ESP_OK(spi_bus_add_device(host, &device_config, &spi));
printf("before first xmit\n");
@ -539,12 +519,7 @@ TEST_CASE("SPI Master no response when switch from host1 (HSPI) to host2 (VSPI)"
//for second host and failed before
host = TEST_SLAVE_HOST;
#if !SOC_GDMA_SUPPORTED
TEST_ESP_OK(spi_bus_initialize(host, &bus_config, host));
#else
TEST_ESP_OK(spi_bus_initialize(host, &bus_config, -1));
#endif
TEST_ESP_OK(spi_bus_initialize(host, &bus_config, DMA_AUTO_CHAN));
TEST_ESP_OK(spi_bus_add_device(host, &device_config, &spi));
printf("before second xmit\n");
@ -612,11 +587,7 @@ TEST_CASE("SPI Master DMA test, TX and RX in different regions", "[spi]")
spi_device_interface_config_t devcfg=SPI_DEVICE_TEST_DEFAULT_CONFIG();
//Initialize the SPI bus
#if !SOC_GDMA_SUPPORTED
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, 1));
#else
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, -1));
#endif
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN));
//Attach the LCD to the SPI bus
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &spi));
//connect MOSI to two devices breaks the output, fix it.
@ -700,11 +671,7 @@ TEST_CASE("SPI Master DMA test: length, start, not aligned", "[spi]")
.pre_cb=NULL,
};
//Initialize the SPI bus
#if !SOC_GDMA_SUPPORTED
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, 1));
#else
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, -1));
#endif
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN));
//Attach the LCD to the SPI bus
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &spi));
@ -773,11 +740,7 @@ void test_cmd_addr(spi_slave_task_context_t *slave_context, bool lsb_first)
//initial master, mode 0, 1MHz
spi_bus_config_t buscfg=SPI_BUS_TEST_DEFAULT_CONFIG();
buscfg.quadhd_io_num = UNCONNECTED_PIN;
#if !SOC_GDMA_SUPPORTED
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, 1));
#else
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, -1));
#endif
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN));
spi_device_interface_config_t devcfg=SPI_DEVICE_TEST_DEFAULT_CONFIG();
devcfg.clock_speed_hz = 1*1000*1000;
if (lsb_first) devcfg.flags |= SPI_DEVICE_BIT_LSBFIRST;
@ -1112,11 +1075,7 @@ static void speed_setup(spi_device_handle_t* spi, bool use_dma)
devcfg.queue_size=8; //We want to be able to queue 7 transactions at a time
//Initialize the SPI bus and the device to test
#if !SOC_GDMA_SUPPORTED
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, (use_dma? GET_DMA_CHAN(TEST_SPI_HOST): 0)));
#else
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, (use_dma? -1 : 0)));
#endif
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, (use_dma ? DMA_AUTO_CHAN : 0)));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi));
}

77
components/driver/test/test_spi_param.c
View File

@ -97,24 +97,15 @@ static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_p
//slave config
slvcfg.mode = pset->mode;
slave_pull_up(&buscfg, slvcfg.spics_io_num);
#if !SOC_GDMA_SUPPORTED
int dma_chan = pset->master_dma_chan;
#else
int dma_chan = (pset->master_dma_chan == 0) ? 0 : -1;
#endif
int dma_chan = (pset->master_dma_chan == 0) ? 0 : DMA_AUTO_CHAN;
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, dma_chan));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi));
//slave automatically use iomux pins if pins are on VSPI_* pins
buscfg.quadhd_io_num = -1;
#if !SOC_GDMA_SUPPORTED
int slave_dma_chan = pset->slave_dma_chan;
#else
int slave_dma_chan = (pset->slave_dma_chan == 0) ? 0 : -1;
#endif
int slave_dma_chan = (pset->slave_dma_chan == 0) ? 0 : DMA_AUTO_CHAN;
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, slave_dma_chan));
//initialize master and slave on the same pins break some of the output configs, fix them
@ -402,7 +393,7 @@ static spitest_param_set_t mode_pgroup[] = {
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 0,
.slave_dma_chan = 2,
.slave_dma_chan = DMA_AUTO_CHAN,
.master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT,
@ -414,7 +405,7 @@ static spitest_param_set_t mode_pgroup[] = {
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 1,
.slave_dma_chan = 2,
.slave_dma_chan = DMA_AUTO_CHAN,
.master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT,
@ -425,7 +416,7 @@ static spitest_param_set_t mode_pgroup[] = {
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 2,
.slave_dma_chan = 2,
.slave_dma_chan = DMA_AUTO_CHAN,
.master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT,
@ -437,7 +428,7 @@ static spitest_param_set_t mode_pgroup[] = {
.master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX,
.mode = 3,
.slave_dma_chan = 2,
.slave_dma_chan = DMA_AUTO_CHAN,
.master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT,
@ -480,7 +471,7 @@ static spitest_param_set_t mode_pgroup[] = {
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 0,
.slave_dma_chan = 2,
.slave_dma_chan = DMA_AUTO_CHAN,
.master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT+SLAVE_EXTRA_DELAY_DMA,
@ -490,7 +481,7 @@ static spitest_param_set_t mode_pgroup[] = {
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 1,
.slave_dma_chan = 2,
.slave_dma_chan = DMA_AUTO_CHAN,
.master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT,
@ -500,7 +491,7 @@ static spitest_param_set_t mode_pgroup[] = {
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 2,
.slave_dma_chan = 2,
.slave_dma_chan = DMA_AUTO_CHAN,
.master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT+SLAVE_EXTRA_DELAY_DMA,
@ -510,7 +501,7 @@ static spitest_param_set_t mode_pgroup[] = {
.freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO,
.mode = 3,
.slave_dma_chan = 2,
.slave_dma_chan = DMA_AUTO_CHAN,
.master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT,
@ -555,7 +546,7 @@ TEST_CASE("Slave receive correct data", "[spi]")
.master_iomux = false,
.slave_iomux = false,
.master_dma_chan = 0,
.slave_dma_chan = (dma_chan? TEST_DMA_CHAN_SLAVE: 0),
.slave_dma_chan = (dma_chan ? DMA_AUTO_CHAN: 0),
};
ESP_LOGI(SLAVE_TAG, "Test slave recv @ mode %d, dma enabled=%d", spi_mode, dma_chan);
@ -713,13 +704,7 @@ static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_
devpset.clock_speed_hz = freq;
if (pset->master_limit != 0 && freq > pset->master_limit) devpset.flags |= SPI_DEVICE_NO_DUMMY;
#if !SOC_GDMA_SUPPORTED
int dma_chan = pset->master_dma_chan;
#else
int dma_chan = (pset->master_dma_chan == 0) ? 0 : -1;
#endif
int dma_chan = (pset->master_dma_chan == 0) ? 0 : DMA_AUTO_CHAN;
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buspset, dma_chan));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devpset, spi));
@ -840,11 +825,7 @@ static void timing_slave_start(int speed, const spitest_param_set_t* pset, spite
//Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
slave_pull_up(&slv_buscfg, slvcfg.spics_io_num);
#if !SOC_GDMA_SUPPORTED
int slave_dma_chan = pset->slave_dma_chan;
#else
int slave_dma_chan = (pset->slave_dma_chan == 0) ? 0 : -1;
#endif
int slave_dma_chan = (pset->slave_dma_chan == 0) ? 0 : DMA_AUTO_CHAN;
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &slv_buscfg, &slvcfg, slave_dma_chan));
//prepare data for the master
@ -1105,8 +1086,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true,
.slave_tv_ns = DELAY_HCLK_UNTIL_7M,
.mode = 0,
.master_dma_chan = 1,
.slave_dma_chan = 1,
.master_dma_chan = DMA_AUTO_CHAN,
.slave_dma_chan = DMA_AUTO_CHAN,
.length_aligned = true,
},
{ .pset_name = "mode 1, DMA",
@ -1117,8 +1098,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 1,
.master_dma_chan = 1,
.slave_dma_chan = 1,
.master_dma_chan = DMA_AUTO_CHAN,
.slave_dma_chan = DMA_AUTO_CHAN,
.length_aligned = true,
},
{ .pset_name = "mode 2, DMA",
@ -1129,8 +1110,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true,
.slave_tv_ns = DELAY_HCLK_UNTIL_7M,
.mode = 2,
.master_dma_chan = 1,
.slave_dma_chan = 1,
.master_dma_chan = DMA_AUTO_CHAN,
.slave_dma_chan = DMA_AUTO_CHAN,
.length_aligned = true,
},
{ .pset_name = "mode 3, DMA",
@ -1141,8 +1122,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 3,
.master_dma_chan = 1,
.slave_dma_chan = 1,
.master_dma_chan = DMA_AUTO_CHAN,
.slave_dma_chan = DMA_AUTO_CHAN,
.length_aligned = true,
},
//the master can only read to 16MHz, use half-duplex mode to read at 20.
@ -1153,8 +1134,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 0,
.master_dma_chan = 1,
.slave_dma_chan = 1,
.master_dma_chan = DMA_AUTO_CHAN,
.slave_dma_chan = DMA_AUTO_CHAN,
},
{ .pset_name = "mode 1, DMA, 20M",
.freq_list = test_freq_20M_only,
@ -1163,8 +1144,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 1,
.master_dma_chan = 1,
.slave_dma_chan = 1,
.master_dma_chan = DMA_AUTO_CHAN,
.slave_dma_chan = DMA_AUTO_CHAN,
},
{ .pset_name = "mode 2, DMA, 20M",
.freq_list = test_freq_20M_only,
@ -1173,8 +1154,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 2,
.master_dma_chan = 1,
.slave_dma_chan = 1,
.master_dma_chan = DMA_AUTO_CHAN,
.slave_dma_chan = DMA_AUTO_CHAN,
},
{ .pset_name = "mode 3, DMA, 20M",
.freq_list = test_freq_20M_only,
@ -1183,8 +1164,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 3,
.master_dma_chan = 1,
.slave_dma_chan = 1,
.master_dma_chan = DMA_AUTO_CHAN,
.slave_dma_chan = DMA_AUTO_CHAN,
},
};
TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "")

10
components/driver/test/test_spi_slave.c
View File

@ -48,7 +48,7 @@ static void master_init_nodma( spi_device_handle_t* spi)
.cs_ena_pretrans=1,
};
//Initialize the SPI bus
ret=spi_bus_initialize(TEST_SPI_HOST, &buscfg, 0);
ret=spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN);
TEST_ASSERT(ret==ESP_OK);
//Attach the LCD to the SPI bus
ret=spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi);
@ -74,12 +74,8 @@ static void slave_init(void)
gpio_set_pull_mode(PIN_NUM_MOSI, GPIO_PULLUP_ONLY);
gpio_set_pull_mode(PIN_NUM_CLK, GPIO_PULLUP_ONLY);
gpio_set_pull_mode(PIN_NUM_CS, GPIO_PULLUP_ONLY);
#if !SOC_GDMA_SUPPORTED
//Initialize SPI slave interface
TEST_ESP_OK( spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, 2) );
#else
TEST_ESP_OK( spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, -1) );
#endif
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, DMA_AUTO_CHAN));
}
TEST_CASE("test slave send unaligned","[spi]")
@ -224,7 +220,7 @@ static void unaligned_test_slave(void)
{
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, TEST_SLAVE_HOST));
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, DMA_AUTO_CHAN));
uint8_t *slave_send_buf = heap_caps_malloc(BUF_SIZE, MALLOC_CAP_DMA);
uint8_t *slave_recv_buf = heap_caps_calloc(BUF_SIZE, 1, MALLOC_CAP_DMA);

12
components/driver/test/test_spi_slave_hd.c
View File

@ -99,11 +99,7 @@ static void init_master_hd(spi_device_handle_t* spi, const spitest_param_set_t*
bus_cfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
#endif
#if !SOC_GDMA_SUPPORTED
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &bus_cfg, TEST_SPI_HOST));
#else
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &bus_cfg, -1));
#endif
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &bus_cfg, DMA_AUTO_CHAN));
spi_device_interface_config_t dev_cfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
dev_cfg.flags = SPI_DEVICE_HALFDUPLEX;
dev_cfg.command_bits = 8;
@ -126,11 +122,7 @@ static void init_slave_hd(int mode, bool append_mode, const spi_slave_hd_callbac
#endif
spi_slave_hd_slot_config_t slave_hd_cfg = SPI_SLOT_TEST_DEFAULT_CONFIG();
slave_hd_cfg.mode = mode;
#if !SOC_GDMA_SUPPORTED
slave_hd_cfg.dma_chan = TEST_SLAVE_HOST;
#else
slave_hd_cfg.dma_chan = -1;
#endif
slave_hd_cfg.dma_chan = DMA_AUTO_CHAN;
if (append_mode) {
slave_hd_cfg.flags |= SPI_SLAVE_HD_APPEND_MODE;
}

20
components/hal/esp32/include/hal/spi_ll.h
View File

@ -947,7 +947,7 @@ static inline void spi_ll_enable_int(spi_dev_t *hw)
* Reset RX DMA which stores the data received from a peripheral into RAM.
*
* @param dma_in Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
*/
static inline void spi_dma_ll_rx_reset(spi_dma_dev_t *dma_in, uint32_t channel)
{
@ -960,7 +960,7 @@ static inline void spi_dma_ll_rx_reset(spi_dma_dev_t *dma_in, uint32_t channel)
* Start RX DMA.
*
* @param dma_in Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param addr Address of the beginning DMA descriptor.
*/
static inline void spi_dma_ll_rx_start(spi_dma_dev_t *dma_in, uint32_t channel, lldesc_t *addr)
@ -973,7 +973,7 @@ static inline void spi_dma_ll_rx_start(spi_dma_dev_t *dma_in, uint32_t channel,
* Enable DMA RX channel burst for data
*
* @param dma_in Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_rx_enable_burst_data(spi_dma_dev_t *dma_in, uint32_t channel, bool enable)
@ -985,7 +985,7 @@ static inline void spi_dma_ll_rx_enable_burst_data(spi_dma_dev_t *dma_in, uint32
* Enable DMA RX channel burst for descriptor
*
* @param dma_in Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_rx_enable_burst_desc(spi_dma_dev_t *dma_in, uint32_t channel, bool enable)
@ -997,7 +997,7 @@ static inline void spi_dma_ll_rx_enable_burst_desc(spi_dma_dev_t *dma_in, uint32
* Reset TX DMA which transmits the data from RAM to a peripheral.
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
*/
static inline void spi_dma_ll_tx_reset(spi_dma_dev_t *dma_out, uint32_t channel)
{
@ -1010,7 +1010,7 @@ static inline void spi_dma_ll_tx_reset(spi_dma_dev_t *dma_out, uint32_t channel)
* Start TX DMA.
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param addr Address of the beginning DMA descriptor.
*/
static inline void spi_dma_ll_tx_start(spi_dma_dev_t *dma_out, uint32_t channel, lldesc_t *addr)
@ -1023,7 +1023,7 @@ static inline void spi_dma_ll_tx_start(spi_dma_dev_t *dma_out, uint32_t channel,
* Enable DMA TX channel burst for data
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_tx_enable_burst_data(spi_dma_dev_t *dma_out, uint32_t channel, bool enable)
@ -1035,7 +1035,7 @@ static inline void spi_dma_ll_tx_enable_burst_data(spi_dma_dev_t *dma_out, uint3
* Enable DMA TX channel burst for descriptor
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_tx_enable_burst_desc(spi_dma_dev_t *dma_out, uint32_t channel, bool enable)
@ -1047,7 +1047,7 @@ static inline void spi_dma_ll_tx_enable_burst_desc(spi_dma_dev_t *dma_out, uint3
* Configuration of OUT EOF flag generation way
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable 1: when dma pop all data from fifo 0:when ahb push all data to fifo.
*/
static inline void spi_dma_ll_set_out_eof_generation(spi_dma_dev_t *dma_out, uint32_t channel, bool enable)
@ -1059,7 +1059,7 @@ static inline void spi_dma_ll_set_out_eof_generation(spi_dma_dev_t *dma_out, uin
* Enable automatic outlink-writeback
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_enable_out_auto_wrback(spi_dma_dev_t *dma_out, uint32_t channel, bool enable)

20
components/hal/esp32s2/include/hal/spi_ll.h
View File

@ -1081,7 +1081,7 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t* hw)
* Reset RX DMA which stores the data received from a peripheral into RAM.
*
* @param dma_in Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
*/
static inline void spi_dma_ll_rx_reset(spi_dma_dev_t *dma_in, uint32_t channel)
{
@ -1097,7 +1097,7 @@ static inline void spi_dma_ll_rx_reset(spi_dma_dev_t *dma_in, uint32_t channel)
* Start RX DMA.
*
* @param dma_in Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param addr Address of the beginning DMA descriptor.
*/
static inline void spi_dma_ll_rx_start(spi_dma_dev_t *dma_in, uint32_t channel, lldesc_t *addr)
@ -1110,7 +1110,7 @@ static inline void spi_dma_ll_rx_start(spi_dma_dev_t *dma_in, uint32_t channel,
* Enable DMA RX channel burst for data
*
* @param dma_in Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_rx_enable_burst_data(spi_dma_dev_t *dma_in, uint32_t channel, bool enable)
@ -1122,7 +1122,7 @@ static inline void spi_dma_ll_rx_enable_burst_data(spi_dma_dev_t *dma_in, uint32
* Enable DMA TX channel burst for descriptor
*
* @param dma_in Beginning address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_rx_enable_burst_desc(spi_dma_dev_t *dma_in, uint32_t channel, bool enable)
@ -1134,7 +1134,7 @@ static inline void spi_dma_ll_rx_enable_burst_desc(spi_dma_dev_t *dma_in, uint32
* Reset TX DMA which transmits the data from RAM to a peripheral.
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
*/
static inline void spi_dma_ll_tx_reset(spi_dma_dev_t *dma_out, uint32_t channel)
{
@ -1147,7 +1147,7 @@ static inline void spi_dma_ll_tx_reset(spi_dma_dev_t *dma_out, uint32_t channel)
* Start TX DMA.
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param addr Address of the beginning DMA descriptor.
*/
static inline void spi_dma_ll_tx_start(spi_dma_dev_t *dma_out, uint32_t channel, lldesc_t *addr)
@ -1160,7 +1160,7 @@ static inline void spi_dma_ll_tx_start(spi_dma_dev_t *dma_out, uint32_t channel,
* Enable DMA TX channel burst for data
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_tx_enable_burst_data(spi_dma_dev_t *dma_out, uint32_t channel, bool enable)
@ -1172,7 +1172,7 @@ static inline void spi_dma_ll_tx_enable_burst_data(spi_dma_dev_t *dma_out, uint3
* Enable DMA TX channel burst for descriptor
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_tx_enable_burst_desc(spi_dma_dev_t *dma_out, uint32_t channel, bool enable)
@ -1184,7 +1184,7 @@ static inline void spi_dma_ll_tx_enable_burst_desc(spi_dma_dev_t *dma_out, uint3
* Configuration of OUT EOF flag generation way
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable 1: when dma pop all data from fifo 0:when ahb push all data to fifo.
*/
static inline void spi_dma_ll_set_out_eof_generation(spi_dma_dev_t *dma_out, uint32_t channel, bool enable)
@ -1196,7 +1196,7 @@ static inline void spi_dma_ll_set_out_eof_generation(spi_dma_dev_t *dma_out, uin
* Enable automatic outlink-writeback
*
* @param dma_out Beginning address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
* @param channel DMA channel
* @param channel DMA channel, for chip version compatibility, not used.
* @param enable True to enable, false to disable
*/
static inline void spi_dma_ll_enable_out_auto_wrback(spi_dma_dev_t *dma_out, uint32_t channel, bool enable)

2
components/hal/include/hal/spi_types.h
View File

@ -23,7 +23,7 @@
* @brief Enum with the three SPI peripherals that are software-accessible in it
*/
typedef enum {
// SPI_HOST (SPI1_HOST) is not supported by the SPI Master and SPI Slave driver on ESP32-S2
//SPI1 can be used as GPSPI only on ESP32
SPI1_HOST=0, ///< SPI1
SPI2_HOST=1, ///< SPI2
SPI3_HOST=2, ///< SPI3