mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Fixed ESP32 EMAC driver insufficient TX buffer size
which could followed esp_eth_stop and esp_eth_start sequence
This commit is contained in:
parent
5fdbd40404
commit
1150a11c56
@ -321,6 +321,13 @@ esp_err_t esp_eth_transmit(esp_eth_handle_t hdl, void *buf, size_t length)
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{
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esp_err_t ret = ESP_OK;
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esp_eth_driver_t *eth_driver = (esp_eth_driver_t *)hdl;
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if (atomic_load(ð_driver->fsm) != ESP_ETH_FSM_START) {
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ret = ESP_ERR_INVALID_STATE;
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ESP_LOGD(TAG, "Ethernet is not started");
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goto err;
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}
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ESP_GOTO_ON_FALSE(buf, ESP_ERR_INVALID_ARG, err, TAG, "can't set buf to null");
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ESP_GOTO_ON_FALSE(length, ESP_ERR_INVALID_ARG, err, TAG, "buf length can't be zero");
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ESP_GOTO_ON_FALSE(eth_driver, ESP_ERR_INVALID_ARG, err, TAG, "ethernet driver handle can't be null");
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@ -33,6 +33,7 @@
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static const char *TAG = "esp.emac";
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#define PHY_OPERATION_TIMEOUT_US (1000)
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#define MAC_STOP_TIMEOUT_MS (100)
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#define FLOW_CONTROL_LOW_WATER_MARK (CONFIG_ETH_DMA_RX_BUFFER_NUM / 3)
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#define FLOW_CONTROL_HIGH_WATER_MARK (FLOW_CONTROL_LOW_WATER_MARK * 2)
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@ -381,6 +382,7 @@ static esp_err_t emac_esp32_deinit(esp_eth_mac_t *mac)
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static esp_err_t emac_esp32_start(esp_eth_mac_t *mac)
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{
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emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent);
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emac_hal_reset_desc_chain(&emac->hal);
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emac_hal_start(&emac->hal);
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return ESP_OK;
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}
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@ -388,8 +390,16 @@ static esp_err_t emac_esp32_start(esp_eth_mac_t *mac)
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static esp_err_t emac_esp32_stop(esp_eth_mac_t *mac)
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{
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emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent);
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emac_hal_stop(&emac->hal);
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return ESP_OK;
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esp_err_t ret = ESP_OK;
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int32_t to = 0;
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do {
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if ((ret = emac_hal_stop(&emac->hal)) == ESP_OK) {
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break;
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}
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to += 20;
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vTaskDelay(pdMS_TO_TICKS(20));
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} while (to < MAC_STOP_TIMEOUT_MS);
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return ret;
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}
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static esp_err_t emac_esp32_del(esp_eth_mac_t *mac)
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@ -335,12 +335,15 @@ void emac_hal_start(emac_hal_context_t *hal)
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/* Enable Ethernet MAC and DMA Interrupt */
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emac_ll_enable_corresponding_intr(hal->dma_regs, EMAC_LL_CONFIG_ENABLE_INTR_MASK);
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/* Flush Transmit FIFO */
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emac_ll_flush_trans_fifo_enable(hal->dma_regs, true);
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/* Flush Receive FIFO */
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emac_ll_flush_recv_frame_enable(hal->dma_regs, true);
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/* Enable transmit state machine of the MAC for transmission on the MII */
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emac_ll_transmit_enable(hal->mac_regs, true);
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/* Enable receive state machine of the MAC for reception from the MII */
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emac_ll_receive_enable(hal->mac_regs, true);
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/* Flush Transmit FIFO */
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emac_ll_flush_trans_fifo_enable(hal->dma_regs, true);
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/* Start DMA transmission */
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emac_ll_start_stop_dma_transmit(hal->dma_regs, true);
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/* Start DMA reception */
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@ -350,14 +353,18 @@ void emac_hal_start(emac_hal_context_t *hal)
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emac_ll_clear_all_pending_intr(hal->dma_regs);
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}
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void emac_hal_stop(emac_hal_context_t *hal)
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esp_err_t emac_hal_stop(emac_hal_context_t *hal)
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{
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/* Flush Transmit FIFO */
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emac_ll_flush_trans_fifo_enable(hal->dma_regs, true);
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/* Stop DMA transmission */
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emac_ll_start_stop_dma_transmit(hal->dma_regs, false);
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/* Stop DMA reception */
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emac_ll_start_stop_dma_receive(hal->dma_regs, false);
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if (emac_ll_transmit_frame_ctrl_status(hal->mac_regs) != 0x0) {
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/* Previous transmit in progress */
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return ESP_ERR_INVALID_STATE;
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}
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/* Disable receive state machine of the MAC for reception from the MII */
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emac_ll_transmit_enable(hal->mac_regs, false);
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/* Disable transmit state machine of the MAC for transmission on the MII */
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@ -365,6 +372,8 @@ void emac_hal_stop(emac_hal_context_t *hal)
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/* Disable Ethernet MAC and DMA Interrupt */
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emac_ll_disable_all_intr(hal->dma_regs);
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return ESP_OK;
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}
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uint32_t emac_hal_get_tx_desc_owner(emac_hal_context_t *hal)
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@ -1,16 +1,8 @@
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*******************************************************************************
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* NOTICE
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@ -344,6 +336,12 @@ static inline void emac_ll_clear(emac_mac_dev_t *mac_regs)
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mac_regs->gmacfc.val = 0;
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}
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/* emacdebug */
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static inline uint32_t emac_ll_transmit_frame_ctrl_status(emac_mac_dev_t *mac_regs)
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{
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return mac_regs->emacdebug.mactfcs;
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}
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/* emacmiidata */
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static inline void emac_ll_set_phy_data(emac_mac_dev_t *mac_regs, uint32_t data)
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{
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@ -1,16 +1,8 @@
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// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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@ -220,9 +212,23 @@ uint32_t emac_hal_get_phy_data(emac_hal_context_t *hal);
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void emac_hal_set_address(emac_hal_context_t *hal, uint8_t *mac_addr);
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/**
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* @brief Starts EMAC Transmission & Reception
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*
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* @param hal EMAC HAL context infostructure
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*/
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void emac_hal_start(emac_hal_context_t *hal);
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void emac_hal_stop(emac_hal_context_t *hal);
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/**
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* @brief Stops EMAC Transmission & Reception
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*
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* @param hal EMAC HAL context infostructure
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* @return
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* - ESP_OK: succeed
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* - ESP_ERR_INVALID_STATE: previous frame transmission is not completed. When this error occurs,
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* wait and reapeat the EMAC stop again.
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*/
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esp_err_t emac_hal_stop(emac_hal_context_t *hal);
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uint32_t emac_hal_get_tx_desc_owner(emac_hal_context_t *hal);
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@ -982,7 +982,6 @@ components/hal/esp32/include/hal/can_types.h
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components/hal/esp32/include/hal/clk_gate_ll.h
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components/hal/esp32/include/hal/cpu_ll.h
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components/hal/esp32/include/hal/dac_ll.h
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components/hal/esp32/include/hal/emac_ll.h
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components/hal/esp32/include/hal/i2c_ll.h
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components/hal/esp32/include/hal/i2s_ll.h
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components/hal/esp32/include/hal/interrupt_controller_ll.h
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@ -1132,7 +1131,6 @@ components/hal/include/hal/cpu_types.h
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components/hal/include/hal/dac_hal.h
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components/hal/include/hal/dac_types.h
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components/hal/include/hal/ds_hal.h
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components/hal/include/hal/emac_hal.h
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components/hal/include/hal/esp_flash_err.h
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components/hal/include/hal/gpio_hal.h
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components/hal/include/hal/i2c_hal.h
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