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431 Commits

Author SHA1 Message Date
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
Michael (XIAO Xufeng)
f2aa736c7b esp32c2: put v2.0 back to development stage 2022-11-03 08:36:23 +00:00
KonstantinKondrashov
1f9260d790 all: Apply new version logic (major * 100 + minor) 2022-11-03 08:36:23 +00:00
Armando
260ee86c37 rtc: united sar peripheral control 2022-10-27 16:51:25 +08:00
Aditya Patwardhan
f9565fd31d soc/esp_ds.h: Unify esp_ds error codes for all targets 2022-10-27 11:09:25 +05:30
Aditya Patwardhan
c8a788ca24 esp_hw_support: Merge HMAC source files into one 2022-10-27 10:59:54 +05:30
wuzhenghui
6b96534c68 bugfix: esprv_intc_int_set_type() should not use bitmap parameter 2022-10-14 11:31:22 +08:00
cje
4dddb6d8e8 fix system not stable bug when dbias storing in efuse is bigger than 27 2022-09-30 19:24:51 +08:00
wuzhenghui
23e37393a7 esp32c6: add esp_hw_support 2022-09-26 20:32:13 +08:00
jingli
05a2fbe810 esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 03:03:25 +00:00
Michael (XIAO Xufeng)
e7dbfd65cb Merge branch 'feature/support_7.2.8_soc/pvt-dig' into 'master' 
rtc: auto adjust LDO voltage based on pvt-dig saved in efuse

Closes IDF-4873

See merge request espressif/esp-idf!16365
 2022-08-22 11:43:07 +08:00
songruojing
304a8f142d esp32c6: introduce the target 
Add esp32c6 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32c6`
 2022-08-19 11:13:02 +08:00
zlq
80c821a9aa 1.add ldo parameters in efuse table; 2.set ldo based on pvt-efuse; 3.ldo voltage is changed based on cpu freq 2022-08-15 18:03:55 +08:00
jingli
c70094f64a esp32c2/clk_cali: fix rtc slow clk cali logic 2022-08-15 16:31:54 +08:00
Jing Li
c25c254666 Merge branch 'feature/further_support_esp32c2_sleep' into 'master' 
esp32c2/sleep: further support sleep for esp32c2 with 26MHz XTAL

Closes IDF-5544

See merge request espressif/esp-idf!19017
 2022-08-08 13:26:15 +08:00
jingli
ee3423834e kconfig: refactor xtal freq kconfig to common configuration item 2022-08-05 19:12:29 +08:00
zlq
7d8f10423e 1.add ldo parameters in efuse table; 2.set ldo dbias based on pvt-efuse; 3.add pll cali stop function; 4. add efuse_ocode 2022-08-05 14:24:51 +08:00
Song Ruo Jing
842efaf753 Merge branch 'bugfix/rtc_fastmem_lpu_c3_h2' into 'master' 
sleep: fix wrong register access to set/clear rtc fast mem low power mode on c3 and h2

Closes IDF-5746

See merge request espressif/esp-idf!19361
 2022-08-03 19:52:24 +08:00
morris
307d26659e Merge branch 'bugfix/rmt_hw_issue' into 'master' 
rmt: only use register to control the IDLE state (hardware issue workaround)

See merge request espressif/esp-idf!19344
 2022-08-03 17:01:44 +08:00
songruojing
e8915e14e7 esp_hw_support: fix wrong register access to set/clear rtc fast mem low power mode on c3 and h2 2022-08-03 14:33:13 +08:00
morris
45524408df coverity: fix uninit variable issue in driver 
Related CID:
389832, 389838, 389880, 286743, 286752, 395156, 291011, 396001, 396002
 2022-08-03 10:46:50 +08:00
morris
031adc01c4 gpio: add test with -O0 2022-08-02 23:07:06 +08:00
Armando
5e6a16380a esp_adc: move adc common hw related code into esp_hw_support 2022-07-28 03:49:48 +00:00
morris
5e50ec1d66 systimer: add helper functions to convert between tick and us 2022-07-25 16:08:52 +08:00
Guillaume Souchere
0bac33ed41 esp_system: Remove deprecate section from esp_cpu.h 
- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.
 2022-07-22 00:06:06 +08:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces 
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
 2022-07-22 00:06:06 +08:00
Mahavir Jain
20e21fb29d Merge branch 'refactor/remove_rom_deps' into 'master' 
RFC: remove dependency to target-specific ROM headers

Closes IDF-1968

See merge request espressif/esp-idf!18206
 2022-07-13 16:44:44 +08:00
Jiang Jiang Jian
b610b47a83 Merge branch 'feature/esp32s3_memprot_additional_improvements' into 'master' 
[System/Security] Memprot after-merge improvements (v5.0)

Closes IDF-5263 and IDF-5208

See merge request espressif/esp-idf!18893
 2022-07-13 15:48:20 +08:00
Jakob Hasse
33a3616635 refactor (bootloader_support, efuse)!: remove target-specific rom includes 
The following two functions in bootloader_support are private now:
* esp_secure_boot_verify_sbv2_signature_block()
* esp_secure_boot_verify_rsa_signature_block()
They have been moved into private header files
inside bootloader_private/

* Removed bootloader_reset_reason.h and
  bootloader_common_get_reset_reason() completely.
  Alternative in ROM component is available.

* made esp_efuse.h independent of target-specific rom header
 2022-07-13 10:29:02 +08:00
songruojing
ef813b23fa rtc: esp32c2 support 26MHz xtal in startup code and rtc_clk.c 2022-07-11 12:24:58 +08:00
Martin Vychodil
0c87ae2a91 System/Security: Memprot API unified (ESP32S3) 
Added missing features and improvements
 2022-07-09 22:57:51 +02:00
Ivan Grokhotkov
672e70a023 esp_hw_support: add 26 MHz XTAL option for esp32c2 
Some esp32c2 boards will be produced with a 26 MHz XTAL. This commit
adds the basic Kconfig option for this type of hardware.
Support for CONFIG_ESP32C2_XTAL_FREQ_26 in other areas of IDF will be
implemented in subsequent commits.
 2022-07-08 15:04:17 +08:00
Michael (XIAO Xufeng)
a58362a429 Merge branch 'feature/efuse_rev_major_minor' into 'master' 
efuse: Adds major and minor versions

See merge request espressif/esp-idf!18255
 2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master' 
support c2 26M/32M xtal for bbpll

Closes IDF-5485

See merge request espressif/esp-idf!18769
 2022-07-06 21:17:52 +08:00
cje
e16165f263 support c2 26M/32M xtal for bbpll 2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Martin Vychodil
29c0703d7e Merge branch 'bugfix/esp32s3_memprot_wrong_check_unicore' into 'master' 
System/Security: fix missing checks for CPU-count sensitive Memprot APIs (ESP32S3)

Closes IDF-5401

See merge request espressif/esp-idf!18834
 2022-07-04 16:41:45 +08:00
Omar Chebib
7e42038c86 Merge branch 'refactor/move_regi2c_headers' into 'master' 
Refactor: move regi2c_*.h header files from esp_hw_support to soc component

See merge request espressif/esp-idf!18676
 2022-07-04 11:32:30 +08:00
Martin Vychodil
ee9aa9a302 System/Security: fix missing checks for CPU-count sensitive Memprot APIs (ESP32S3) 
Some of the Memory Protection (internal) API functions dealing with per-CPU operations were missing appropriate handling of the CPU count actually configured by CONFIG_FREERTOS_UNICORE. The flaw was fixed across all the places found in the code as the issue was of general type
 2022-07-02 20:12:56 +00:00
Cao Sen Miao
a690a87829 spi_flash: Remove legacy spi_flash drivers 2022-07-01 11:01:34 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component 
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
 2022-06-30 09:40:44 +00:00
morris
7fd9a91034 dma: move from driver to hw_support 2022-06-28 14:17:12 +08:00
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation 
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
 2022-06-20 11:34:20 +00:00
Martin Vychodil
339fcbf14d System/Security: Memprot API unified (ESP32S3) 
Unified Memory protection API for all PMS-aware chips - ESP32S3 port
 2022-06-20 02:36:44 +00:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master' 
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
 2022-06-16 11:53:39 +08:00
Armando (Dou Yiwen)
0b80546f8e Merge branch 'feature/new_esp_psram_component' into 'master' 
esp_psram: new esp psram component

Closes IDF-4318, IDF-4382, IDF-4841, and IDFGH-7192

See merge request espressif/esp-idf!18050
 2022-06-15 19:16:56 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master' 
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
 2022-06-14 21:11:30 +08:00
Armando
cdad8a02fe esp_psram: remove g_spiram_ok 2022-06-14 15:44:27 +08:00
Armando
38e5043ae8 esp_psram: new psram component 2022-06-14 15:44:27 +08:00
Omar Chebib
2fd784c97a G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h" 2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer 
G0 doesn't depend on any G1+ layer for RISC-V based targets
 2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API 
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
 2022-06-14 14:30:58 +08:00
Darian Leung
556ec30457 esp_hw_support: Rename cpu_util.c to cpu.c 2022-06-14 14:30:57 +08:00
songruojing
03477a59db rtc_clk: Fix rtc8m calibration failure after cpu/core reset 
1. make sure 8md256 clk is enabled before calibration
2. improve bootloader and application startup 8m, 8md256 enable logic
 2022-06-13 17:47:51 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
Armando
44f771c713 psram: support s3 copy flash to psram 2022-06-10 10:39:29 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
Michael (XIAO Xufeng)
773715d900 Merge branch 'feature/support_refresh_brownout_v1' into 'master' 
spi_flash: send reset when brownout detected on XMC flash

Closes IDF-3882

See merge request espressif/esp-idf!16873
 2022-06-06 16:27:58 +08:00
Michael (XIAO Xufeng)
d798662421 Merge branch 'bugfix/s3_sleep_voltage' into 'master' 
esp32s3: fixed dangerous power parameters in sleep modes

See merge request espressif/esp-idf!18168
 2022-06-04 00:47:32 +08:00
Cao Sen Miao
6a2d3509dc spi_flash: Making XMC flash works more stable when brownout detected 2022-06-02 10:38:55 +08:00
chaijie
e624206ca6 modify voltage param to fit all mode of S3 2022-06-01 21:03:54 +08:00
Michael (XIAO Xufeng)
ab69df3ea7 esp32s3: fixed dangerous power parameters in sleep modes 2022-06-01 21:03:54 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Anton Maklakov
3c8a1390a0 Merge branch 'bugfix/esp-system-warnings' into 'master' 
system: minor fixes of warnings

See merge request espressif/esp-idf!18310
 2022-05-30 19:33:01 +08:00
Anton Maklakov
afde2434e8 memprot: fix type casting to avoid suspesious address arithmetic 2022-05-30 14:48:12 +07:00
jingli
9eec740a16 enable external 32k osc for esp32c2 2022-05-27 19:29:29 +08:00
Song Ruo Jing
cf32e49aeb Merge branch 'refactor/cleanup_rtc_h' into 'master' 
clk_tree: Prework2 of introducing clock subsystem control

Closes IDF-4934

See merge request espressif/esp-idf!17861
 2022-05-26 09:16:47 +08:00
Sachin Parekh
9a763f4ff2 esp32c2: Enable IRAM/DRAM split using PMP 2022-05-24 21:36:06 +05:30
songruojing
74c99a8a07 rtc_clk: Add alias for the clock tree related enum and macros for backwards compatibility 2022-05-24 22:59:51 +08:00
songruojing
729d70129a clk_tree: add initial docs for clock tree 2022-05-24 22:59:51 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in 
soc/clk_tree_defs.h
 2022-05-24 22:59:41 +08:00
Marius Vikhammer
0687daf2c8 kconfig: move remaining kconfig options out of target component 
The kconfig options are moved to the component where they are used,
mostly esp_hw_support and esp_system.
 2022-05-23 17:57:45 +08:00
songruojing
436085de51 rtc_clk: fix potential "division by zero" in rtc_clk_cpu_freq_mhz_to_config (found by coverity scan) 2022-05-23 13:38:41 +08:00
songruojing
87b917c04a rtc_clk: Remove the ck8m fpu logic when setting rtc slow clock source, ck8m fpu in sleep logic is now completely handled in sleep_modes.c 2022-05-21 13:13:52 +00:00
Konstantin Kondrashov
8429ec2553 Merge branch 'feature/adds_check_32k_xtal_stopped' into 'master' 
esp_hw_support: Adds a msg when 32k xtal was stopped

See merge request espressif/esp-idf!17581
 2022-05-19 16:48:20 +08:00
Michael (XIAO Xufeng)
0adb814af3 Merge branch 'bugfix/fix_memory_miss_bug_esp32c3_esp32s3' into 'master' 
ESP32C3/ESP32S3: Fix cpu crash bug  when wakeup from lightsleep for memory data miss

Closes IDF-162 and IDF-4923

See merge request espressif/esp-idf!17823
 2022-05-18 12:05:08 +08:00
Michael (XIAO Xufeng)
adcdcbaa0e Merge branch 'feat/pm_dbias_refactoring' into 'master' 
pm: refactoring dbias related code

See merge request espressif/esp-idf!17994
 2022-05-17 14:42:16 +08:00
chaijie
cc0a5a4edb solve memory error bug when in lightsleep mode 2022-05-16 11:43:00 +08:00
Michael (XIAO Xufeng)
6f507d527c rtc: fixed 8MD256 can't be used as RTC slow src on ESP32 
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
 2022-05-14 22:35:41 +08:00
Michael (XIAO Xufeng)
234628b3ea pm: putting dbias and pd_cur code into same function 2022-05-14 02:35:11 +08:00
Jing Li
ac0d16cdc8 Merge branch 'bugfix/fix_cannot_lslp_again_after_ulp_wakeup' into 'master' 
sleep: fix cannot lightsleep again after a wakeup from ULP

Closes IDFGH-4396

See merge request espressif/esp-idf!17970
 2022-05-13 22:25:23 +08:00
jingli
abb6bb1181 esp_hw_support/sleep: fix cannot enable sleep reject in some cases 
When enable sleep reject before this fix, we have two limitations:
1. it must be light sleep
2. RTC GPIO wakeup source must be set

We require light sleep because `esp_deep_sleep_start` function has
been declared with "noreturn" attribute, So developers don't expect
that this function may return (due to an error or a sleep reject).
But the requirement for RTC GPIO wakeup source is not reasonable for
all chips. This requirement exists because ESP32 only supports RTC GPIO
and SDIO sleep reject sources. But later chips support all sleep reject
sources.

This fix brings the following changes:
for ESP32: RTC GPIO and SDIO sleep reject sources can be enabled
           when corresponding wakeup source is set.

for later chips: all sleep reject sources can be enabled when
                 corresponding wakeup source is set.
 2022-05-12 19:09:57 +08:00
KonstantinKondrashov
c8cd3e3da3 esp_hw_support: Adds a msg when 32k xtal was stopped 2022-05-12 06:28:52 +00:00
morris
334126315f esp32c2: level up from preview targets 2022-05-12 05:18:57 +00:00
Michael (XIAO Xufeng)
36074b9812 pm: add powerdown for int_8m on ESP32-C2 and ESP32-H2 
Also move the xtal fpu logic to sleep_modes.c
 2022-05-11 11:36:34 +08:00
Michael (XIAO Xufeng)
2905cbbe03 pm: fixed RTC8M domain power issues 
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
 2022-05-11 11:30:47 +08:00
zlq
6336f8191e C2 rtc code 2022-05-09 17:50:54 +08:00
wuzhenghui
d4757a329e add todo 2022-05-05 17:41:12 +08:00
Jiang Jiang Jian
e30e664519 Merge branch 'bugfix/fix_esp32c3_brownout_under_deepsleep' into 'master' 
rtc: fix c3 brownout bug after deepsleep

Closes IDF-4875

See merge request espressif/esp-idf!16654
 2022-05-01 17:28:54 +08:00
sly
117c30e835 fix S3 bbpll calibrate fail bug in high temperature 2022-04-25 16:41:04 +08:00
Marius Vikhammer
45c1d1cba2 Merge branch 'feature/move_target_kconfig_2' into 'master' 
system: move kconfig options out of target component

See merge request espressif/esp-idf!17321
 2022-04-24 13:29:43 +08:00
jingli
252a4eceb4 fix rtc mem load err(since the voltage of rtc regulator is too low) 2022-04-21 23:38:16 +08:00
Marius Vikhammer
d2872095f9 soc: moved kconfig options out of the target component. 
Moved the following kconfig options out of the target component:
 * CONFIG_ESP*_DEFAULT_CPU_FREQ* -> esp_system
 * ESP*_REV_MIN -> esp_hw_support
 * ESP*_TIME_SYSCALL -> newlib
 * ESP*_RTC_* -> esp_hw_support

Where applicable these target specific konfig names were merged into
a single common config, e.g;
CONFIG_ESP*_DEFAULT_CPU_FREQ -> CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
 2022-04-21 12:09:43 +08:00
Armando (Dou Yiwen)
5bb59b00e7 Merge branch 'feature/support_bss_on_psram' into 'master' 
psram: support .bss on psram on esp32s3

Closes IDF-4814, IDF-4396, IDFGH-7148, and IDFGH-7153

See merge request espressif/esp-idf!17557
 2022-04-20 11:16:28 +08:00
Armando
f8249550f8 psram: support .bss on psram on esp32s3 2022-04-19 19:48:00 +08:00
songruo
cd83f4f307 rtc_clk: fix esp32 unreachable code in rtc_clk_xtal_freq_estimate 2022-04-11 12:13:00 +08:00
songruo
60bb5c913d clk_tree: prework of introducing clk subsystem control 
1. Clean up clk usage in IDF, replace rtc_clk_xtal/apb_freq_get with
   upper level API esp_clk_xtal/apb_freq
2. Fix small errors and wrong comments related to clock
3. Add clk_tree_defs.h to provide an unified clock id for each chip
   Modify the NGed drivers to adopt new clock ids
 2022-04-11 12:09:06 +08:00
Ivan Grokhotkov
c70a69b1dd Merge branch 'bugfix/remove_ref_non_ex_options' into 'master' 
config: removed references to non-existing kconfig options

See merge request espressif/esp-idf!17495
 2022-03-25 18:02:54 +08:00
Anton Maklakov
68e5d9d585 Remove IRAM_ATTR from any function declarations 
IRAM_ATTR expands to a unique section attribute. Applying it to both
declaration and definition results in a section conflict.
 2022-03-22 09:58:50 +00:00
Mahavir Jain
f7fc3e2d88 esp_hw_support: cleanup crypto lock APIs for ESP32-C2 2022-03-22 02:06:30 +00:00
Marius Vikhammer
0fbae992dd config: removed references to non-existing kconfig options 2022-03-15 18:32:22 +08:00
Michael (XIAO Xufeng)
aab535fe4a Merge branch 'bugfix/regi2c_ctrl_spinlock_s2' into 'master' 
hw_support: fixed regi2c not protected by lock on ESP32S2

See merge request espressif/esp-idf!16653
 2022-03-13 02:47:53 +08:00
Michael (XIAO Xufeng)
d5bdf95580 hw_support: fixed regi2c not protected by lock on ESP32S2 2022-03-13 00:24:08 +08:00
Armando (Dou Yiwen)
6ed3ffbbf1 Merge branch 'refactor/remove_redundant_rom_cache_dependency' into 'master' 
cache: remove redundant rom cache dependency in bootloader

Closes IDF-4523

See merge request espressif/esp-idf!17077
 2022-03-12 10:11:39 +08:00
Armando
c1cbd7bbf6 cache/mmu: implememnt cache and mmu hal APIs in bootloader 2022-03-11 22:43:11 +08:00
laokaiyao
93b162c767 touch: fix the touch sensor wait cycle on s3 2022-03-08 09:11:14 +00:00
Sudeep Mohanty
a9fda54d39 esp_hw_support/esp_system: Re-evaluate header inclusions and include directories 
This commit updates the visibility of various header files and cleans up
some unnecessary inclusions. Also, this commit removes certain header
include paths which were maintained for backward compatibility.
 2022-03-07 11:18:08 +05:30
Armando (Dou Yiwen)
48daa38a63 Merge branch 'bugfix/fix_adc_calibration_light_sleep_issue' into 'master' 
adc: fix calibration error when waking up from light sleep

Closes IDF-4406, IDF-4605, IDFGH-6252, and IDFGH-6651

See merge request espressif/esp-idf!16259
 2022-03-04 23:05:09 +08:00
morris
a0283234cd Merge branch 'feature/support_esp32h2_gpio' into 'master' 
esp32h2: support GPIO peripheral, IO_MUX, GPIO matrix

Closes IDF-4232 and IDF-3439

See merge request espressif/esp-idf!16609
 2022-03-04 18:22:28 +08:00
Armando
494b996ecc sleep: restore analog calibration registers after waking up from light sleep 
Closes https://github.com/espressif/esp-idf/issues/8287
Closes https://github.com/espressif/esp-idf/issues/7921
 2022-03-04 12:10:20 +08:00
songruojing
c8c137f2b7 esp32h2: support GPIO peripheral, IO_MUX, GPIO matrix. 
Generic GPIO example is supported as well.
 2022-03-04 11:25:05 +08:00
Omar Chebib
dbba26643f RTC WDT: refactor code to remove duplicated code 2022-03-03 13:47:22 +08:00
KonstantinKondrashov
9605f3eb1a soc: Adds efuse hal 
Replaced eFuse ROM funcs with hal layer
 2022-02-24 22:20:09 +08:00
morris
ef00bd59dc esp_rom: extract int matrix route and cpu ticks getter 2022-02-09 13:52:20 +08:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Armando
7240ad2b3a psram: refactor spiram.c on esp32s2 2022-01-13 11:07:57 +08:00
laokaiyao
cd10bb7fa2 esp32h2: fix apb freq bug 2022-01-10 12:43:31 +08:00
morris
869bed1bb5 soc: don't expose unstable soc header files in public api 2022-01-06 23:10:22 +08:00
zlq
ef88625583 fix c3 brownout bug after deepsleep 2022-01-05 17:06:18 +08:00
Sudeep Mohanty
6a2a6e4220 Merge branch 'feature/remove-depricated-cpu-util-functions' into 'master' 
esp_hw_support: Removed deprecated CPU util functions

Closes IDF-2868

See merge request espressif/esp-idf!16391
 2021-12-29 16:44:17 +00:00
laokaiyao
4f28b33bbc apll: add lock for apll 2021-12-29 10:13:13 +08:00
laokaiyao
af4e448928 i2s: impove the clock division calculation 
Reported from: https://esp32.com/viewtopic.php?f=25&t=24542&p=87595#p87595
 2021-12-29 10:13:13 +08:00
Sudeep Mohanty
e22b4007d3 esp_hw_support: Removed deprecated CPU util functions 
The following files were deleted:
- components/esp_hw_support/include/soc/cpu.h
- components/soc/esp32s3/include/soc/cpu.h

The following functions are deprecated:
- get_sp()

The following functions declared in soc/cpu.h are now moved to esp_cpu.h:
- esp_cpu_configure_region_protection()

The following functions declared in soc/cpu.h are now moved to components/xtensa/include/esp_cpu_utils.h:
- esp_cpu_process_stack_pc()

All files with soc/cpu.h inclusion are updated to include esp_cpu.h instead.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
 2021-12-28 16:58:37 +05:30
Mahavir Jain
355e8bba76 Merge branch 'feature/s3_rng' into 'master' 
Bootloader add rng sampling

Closes IDF-1878 and IDF-4417

See merge request espressif/esp-idf!15737
 2021-12-28 04:24:12 +00:00
Jakob Hasse
64a355eba8 feat (bootloader): added rng sampling 
Set maximum RNG query frequency to save value known from tests
 2021-12-27 13:59:20 +08:00
Ivan Grokhotkov
6a37b41df8 memprot: fix debug mode check 
Regression from dd938eb9, the fault injection check was always failing
in debug mode.
 2021-12-23 16:39:12 +01:00
Martin Vychodil
dd938eb952 System/Security: Memprot API unified (ESP32C3) 
Unified Memory protection API for all PMS-aware chips (ESP32C3)

Closes JIRA IDF-3849
 2021-12-21 01:50:36 +01:00
Cao Sen Miao
e3d14858c7 rtc_clk: change clock source from xtal to pll on real board(ESP8684) 2021-12-15 12:21:11 +08:00
Michael (XIAO Xufeng)
b23ed0ee81 Merge branch 'feature/update_adc_cali_due_to_efuse_version_change' into 'master' 
adc: update s3 adc calibration efuse version

Closes IDF-4069

See merge request espressif/esp-idf!15843
 2021-12-14 07:27:35 +00:00
Armando
9a6f894046 psram: add octal psram ECC feature 2021-12-13 20:24:52 +08:00
Armando
021e8817cf psram: make psram wrap mode unavailable 2021-12-13 20:19:32 +08:00
Armando
bfb2a264c6 adc: update adc calibration efuse version 
ADC calibration scheme and algorithm are not changed. Only the eFuse bit BLOCK1_VERSION is changed. This MR updated the logic to recognize the adc efuse version
 2021-12-13 13:00:13 +08:00
Cao Sen Miao
463cf2cf1c ESP8684: Clean up ESP8684 code, remove useless code, update headers 2021-12-09 18:36:39 +08:00
Simon
6f9b89f619 Merge branch 'bugfix/usb_no_rom_log' into 'master' 
USB_SERIAL_JTAG: Fix the issue that there is no rom/bootloader log when restarting

Closes IDF-4173

See merge request espressif/esp-idf!16057
 2021-12-07 08:16:10 +00:00
Cao Sen Miao
17ea9d7faf USB_SERIAL_JTAG: Fix the issue that there is no rom log when restarting 2021-11-29 20:26:09 +08:00
jingli
0ea1825f64 reduce bootup time when using usb-serial-jtag 2021-11-29 17:21:11 +08:00
wuzhenghui
388615add0 update esp32h2beta2 chip_id to 14 2021-11-24 12:30:43 +08:00
wuzhenghui
968c42d88c 822 FPGA rnv init 2021-11-24 12:30:17 +08:00
morris
207891ef6c clk: fix esp32h2 print wrong CPU frequency 2021-11-15 17:40:51 +08:00
Cao Sen Miao
ce1ee3d8ae psram: add ESP32-D0WD-R2-V3 support 2021-11-12 13:52:24 +08:00
morris
16677b0d3c global: make periph enable/disable APIs private 
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
 2021-11-08 10:37:47 +08:00
Cao Sen Miao
3934e24d22 ESP8684: add spi_flash, efuse, hw_support support 2021-11-06 17:33:44 +08:00
Armando
c331c85318 mspi: make cpu clock source switch safe 
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
 2021-10-19 21:47:27 +08:00
wuzhenghui
5000aa877f fix rtc_clk_cal: Wait for timeout in a loop instead of just judge once 2021-10-19 12:07:34 +08:00
wuzhenghui
ab9df9945f fix stuck in rtc_clk_cal 2021-10-14 16:25:54 +08:00
Li Shuai
73829221f5 esp_hw_support: force power down wifi and bt power domain when rtc module init 2021-10-14 10:51:10 +08:00
Armando
16a91399f1 psram: put opiram_psram and spiram_psram in internal ram 
External memory is accessed via SPI0. When modifying the SPI0 registers,
should put the code in internal RAM. Otherwise when there is an ongoing
SPI0 transaction, CPU changes the SPI0 registers. This is dangerous.
Besides, modifying SPI0 registers may lead external memory to an
unstable state. Therefore putting these code in internal RAM is
necessary.
 2021-10-08 17:39:41 +08:00
Armando
7ff9332243 rtc: fix mspi timing issue when self-calibrate ocode 
When doing OCode self-calibration in rtc_init.c, it will change the
system clock from PLL to XTAL, which is in a lower frequency, and MSPI
timing tuning is not needed. Therefore we should modify the timing
configurations accordingly, and set it back after the calibration.

This is a temporary fix
 2021-10-08 15:59:57 +08:00
Armando
4cafdbd83b mspi: fix psram cs timing register setting not in iram bug 2021-10-08 15:59:57 +08:00
Armando
2655a506c9 mspi: support auto detect octal flash vendor 2021-10-08 15:59:57 +08:00
Martin Vychodil
5344de34c3 System/Memprot: fixed voltage glitching detection logic 
When the application is being debugged it should check the call result (esp_cpu_in_ocd_debug_mode())
is not given volt.glitch attack - so the result is triple-checked by ESP_FAULT_ASSERT macro. In case
the check fails, the system is reset immediately

IDF-4014
 2021-10-04 09:21:07 +02:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master' 
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
 2021-09-27 04:02:29 +00:00
Jiang Jiang Jian
a015123a1d Merge branch 'feature/rename_apbctrl_to_syscon' into 'master' 
rename apbctrl to syscon

See merge request espressif/esp-idf!14524
 2021-09-16 12:58:07 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
Armando (Dou Yiwen)
b9ea273e78 Merge branch 'feature/suppport_self_icode_calibration_on_s3' into 'master' 
adc: support self calibration icode on s3

Closes IDF-3913

See merge request espressif/esp-idf!15195
 2021-09-16 11:14:58 +00:00
Armando
ddd0235783 adc: support adc self-calibration on esp32s3 2021-09-16 15:17:29 +08:00
Li Shuai
b3e27403f3 esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep 2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22 Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep 2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-16 14:40:46 +08:00
Li Shuai
b59902f4d1 Merge branch 'bugfix/esp32s3_lightsleep_psram_leakage_current' into 'master' 
fix SPIRAM leakage when its CS pin has no hardware pullup

See merge request espressif/esp-idf!14730
 2021-09-16 04:07:58 +00:00
Armando
ea10dacf68 mspi: add octal psram get_cs_io function 2021-09-15 20:34:18 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
Sachin Parekh
0e6b03f343 esp32s2/hmac: Release HMAC lock in downstream mode incase of failure 2021-09-06 11:21:39 +05:30
Sachin Parekh
fd5a7df404 esp32h2: Replicated HMAC JTAG downstream enable mode implementation 2021-09-06 11:06:50 +05:30
Sachin Parekh
fa2707f1f3 hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3 
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
 2021-09-06 11:06:50 +05:30
Sachin Billore
f80d6f8c21 Digital Signature support for S3 
Closes IDF-1791
 2021-09-02 11:59:24 +05:30
Marius Vikhammer
bdf3a8ff29 Merge branch 'feature/xtwdt' into 'master' 
WDT: Add support for XTAL32K Watchdog timer

Closes IDF-2575

See merge request espressif/esp-idf!15000
 2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
Armando (Dou Yiwen)
5f38b766a8 Merge branch 'feature/support_120mhz_quad_psram_quad_flash' into 'master' 
mspi: support 120MHz clock freq on QSPI flash/psram on ESP32-S3

Closes IDF-3711

See merge request espressif/esp-idf!14849
 2021-09-01 02:46:05 +00:00
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
Marius Vikhammer
2e0cab6f94 himem: reverse error check logic in himem 2021-08-31 08:46:27 +08:00
SalimTerryLi
55a5c444b5
rtc_io, esp_himem: replace XXX_CHECK with ESP_RETURN_ON_FALSE 2021-08-30 11:18:34 +08:00
Martin Vychodil
58aed7df98 ESP32S2: No assert()/abort() in Memprot API, use esp_err_t instead 
JIRA IDF-3634
 2021-08-26 09:20:00 +02:00
Shu Chen
f8f9e545e8 Merge branch 'feature/support_esp32h2_hw_support' into 'master' 
Feature/support esp32h2 hw support

Closes IDF-3378 and IDF-3396

See merge request espressif/esp-idf!14545
 2021-08-26 06:00:27 +00:00
sly
11dfd802e0 esp32h2: add rtc clock support 2021-08-26 11:25:39 +08:00
morris
a861575d05 Merge branch 'bugfix/fix_esp32c3_auto_adjust_volt' into 'master' 
system: fix esp32c3 auto adjust voltage bug

See merge request espressif/esp-idf!14725
 2021-08-26 02:53:22 +00:00
sly
b342b49823 fix esp32c3 auto adjust voltage bug 2021-08-25 17:08:26 +08:00
Wu Zheng Hui
3128a2544b Adjust the variable name & 
Add mapping support for different sizes of spi ram
 2021-08-25 16:06:28 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support 
brownout init fixed
 2021-08-25 11:02:47 +08:00
Marius Vikhammer
53975c444c Merge branch 'update_copyright_notice_esp_hw_support_5' into 'master' 
esp_hw_support: update copyright notice 5

See merge request espressif/esp-idf!14729
 2021-08-13 08:40:47 +00:00
Marius Vikhammer
465830312b Merge branch 'update_copyright_notice_esp_hw_support_4' into 'master' 
esp_hw_support: update copyright notice 4

See merge request espressif/esp-idf!14728
 2021-08-13 08:40:15 +00:00
Jakob Hasse
1c3be690ed [esp_hw_support]: HMAC upstream support for S3 2021-08-13 12:01:06 +08:00
Jan Brudný
5195b6a237 esp_hw_support: update copyright notice 5 2021-08-10 13:32:08 +02:00
Jan Brudný
f51e20d814 esp_hw_support: update copyright notice 4 2021-08-10 13:31:53 +02:00
Jan Brudný
7f50818a99 esp_hw_support: update copyright notice 3 2021-08-10 13:30:57 +02:00
Jan Brudný
562ce4d009 esp32s2, esp32s3: update copyright notice 2021-08-05 15:01:26 +02:00
Armando (Dou Yiwen)
03fb3973a2 Merge branch 'feature/support_quad_flash_octal_psram_on_esp32s3' into 'master' 
mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3

Closes IDF-3603

See merge request espressif/esp-idf!14346
 2021-08-04 03:57:16 +00:00
Armando
0f91a01a46 mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3 2021-08-03 16:54:00 +08:00
Konstantin Kondrashov
4972605b16 esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt 2021-08-03 14:35:29 +08:00
Armando (Dou Yiwen)
0dad76329f Merge branch 'feature/support_noinit_section_in_psram_on_esp32' into 'master' 
memory: support noinit section in psram on esp32

Closes IDFGH-2621

See merge request espressif/esp-idf!14088
 2021-07-31 09:58:59 +00:00
morris
21067a0455 spiram: add getter function to check psram initialization state 2021-07-30 11:23:26 +08:00
Armando
ad8e1a395c memory: port SPIRAM noinit segment support to master 2021-07-29 10:28:39 +08:00
Devan Lai
b85011c15f esp32: Add support for noinit variables in SPIRAM 
Add Kconfig option SPIRAM_ALLOW_NOINIT_EXTERNAL_MEMORY
When enabled, a new linker script rule (from esp32.extram.noinit.ld)
places any variables in the .ext_ram.noinit section in SPIRAM.

This section is exempted from the startup SPIRAM memory test and is
not zero-initialized or added to the malloc pool, making it usable
for noinit variables that persist across reset.

The EXT_RAM_NOINIT_ATTR macro places variables in this section.
 2021-07-29 10:28:38 +08:00
Alex Henrie
f88a2f10c2 Fix memory leak on error path in esp_ds_start_sign 2021-07-23 17:48:45 +05:30
Jiang Jiang Jian
af9cb85e00 Merge branch 'feature/support_esp32s3_rtc_hw_support' into 'master' 
esp_hw_support: add rtc module support for esp32s3

See merge request espressif/esp-idf!14368
 2021-07-20 03:23:10 +00:00
sly
d6762a9fb7 esp_hw_support: add rtc module support for esp32s3 2021-07-19 11:17:48 +08:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master' 
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
 2021-07-18 08:06:38 +00:00
Michael (XIAO Xufeng)
59195b6fb3 Merge branch 'bugfix/update_gdma_soc' into 'master' 
gdma: alignment setting for PSRAM transfer

Closes IDF-1524

See merge request espressif/esp-idf!13976
 2021-07-17 14:04:03 +00:00