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coverity: fix uninit variable issue in driver

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Related CID:
389832, 389838, 389880, 286743, 286752, 395156, 291011, 396001, 396002
This commit is contained in:
morris 2022-07-28 11:15:36 +08:00
parent f332790af5
commit 45524408df
5 changed files with 17 additions and 10 deletions
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3
components/esp_gdbstub/src/packet.c
View File

@ -4,6 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <assert.h>
#include "esp_gdbstub_common.h"
// GDB command input buffer
@ -45,6 +46,8 @@ void esp_gdbstub_send_str(const char *c)
// 'bits'/4 dictates the number of hex chars sent.
void esp_gdbstub_send_hex(int val, int bits)
{
// sanity check, in case the following (i - 4) is a negative value
assert(bits >= 4);
const char *hex_chars = "0123456789abcdef";
for (int i = bits; i > 0; i -= 4) {
esp_gdbstub_send_char(hex_chars[(val >> (i - 4)) & 0xf]);

4
components/esp_hw_support/port/esp32h2/systimer.c
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@ -7,8 +7,8 @@
#include "esp_private/systimer.h"
/**
* @brief systimer's clock source is fixed to XTAL (40MHz), and has a fixed fractional divider (2.5).
* So the resolution of the systimer is 40MHz/2.5 = 16MHz.
* @brief systimer's clock source is fixed to XTAL (32MHz), and has a fixed fractional divider (2.0).
* So the resolution of the systimer is 32MHz/2.0 = 16MHz.
*/
uint64_t systimer_ticks_to_us(uint64_t ticks)

10
components/esp_hw_support/rtc_wdt.c
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@ -78,7 +78,7 @@ static uint32_t get_addr_reg(rtc_wdt_stage_t stage)
} else if (stage == RTC_WDT_STAGE2) {
reg = RTC_CNTL_WDTCONFIG3_REG;
} else {
reg = RTC_CNTL_WDTCONFIG4_REG;
reg = RTC_CNTL_WDTCONFIG4_REG;
}
return reg;
}
@ -98,14 +98,18 @@ esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms)
return ESP_OK;
}
esp_err_t rtc_wdt_get_timeout(rtc_wdt_stage_t stage, unsigned int* timeout_ms)
esp_err_t rtc_wdt_get_timeout(rtc_wdt_stage_t stage, unsigned int *timeout_ms)
{
if (stage > 3) {
return ESP_ERR_INVALID_ARG;
}
uint32_t time_tick;
uint32_t rtc_slow_freq = rtc_clk_slow_freq_get_hz();
if (rtc_slow_freq == 0) {
return ESP_ERR_INVALID_STATE;
}
time_tick = READ_PERI_REG(get_addr_reg(stage));
*timeout_ms = time_tick * 1000 / rtc_clk_slow_freq_get_hz();
*timeout_ms = time_tick * 1000 / rtc_slow_freq;
return ESP_OK;
}

4
components/esp_ringbuf/ringbuf.c
View File

@ -782,7 +782,7 @@ static BaseType_t prvReceiveGeneric(Ringbuffer_t *pxRingbuffer,
portENTER_CRITICAL(&pxRingbuffer->mux);
if (prvCheckItemAvail(pxRingbuffer) == pdTRUE) {
//Item is available for retrieval
BaseType_t xIsSplit;
BaseType_t xIsSplit = pdFALSE;
if (pxRingbuffer->uxRingbufferFlags & rbBYTE_BUFFER_FLAG) {
//Second argument (pxIsSplit) is unused for byte buffers
*pvItem1 = pxRingbuffer->pvGetItem(pxRingbuffer, NULL, xMaxSize, xItemSize1);
@ -836,7 +836,7 @@ static BaseType_t prvReceiveGenericFromISR(Ringbuffer_t *pxRingbuffer,
portENTER_CRITICAL_ISR(&pxRingbuffer->mux);
if(prvCheckItemAvail(pxRingbuffer) == pdTRUE) {
BaseType_t xIsSplit;
BaseType_t xIsSplit = pdFALSE;
if (pxRingbuffer->uxRingbufferFlags & rbBYTE_BUFFER_FLAG) {
//Second argument (pxIsSplit) is unused for byte buffers
*pvItem1 = pxRingbuffer->pvGetItem(pxRingbuffer, NULL, xMaxSize, xItemSize1);

6
components/esp_serial_slave_link/essl_sdio.c
View File

@ -133,7 +133,7 @@ esp_err_t essl_sdio_init(void *arg, uint32_t wait_ms)
{
essl_sdio_context_t* ctx = arg;
esp_err_t err;
uint8_t ioe;
uint8_t ioe = 0;
sdmmc_card_t* card = ctx->card;
err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_FN_ENABLE, &ioe);
@ -159,7 +159,7 @@ esp_err_t essl_sdio_init(void *arg, uint32_t wait_ms)
}
// get interrupt status
uint8_t ie;
uint8_t ie = 0;
err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_INT_ENABLE, &ie);
if (err != ESP_OK) return err;
ESP_LOGD(TAG,"IE: 0x%02x", ie);
@ -171,7 +171,7 @@ esp_err_t essl_sdio_init(void *arg, uint32_t wait_ms)
ESP_LOGD(TAG, "IE: 0x%02x", ie);
// get bus width register
uint8_t bus_width;
uint8_t bus_width = 0;
err = sdmmc_io_read_byte(card, 0, SD_IO_CCCR_BUS_WIDTH, &bus_width);
if (err != ESP_OK) return err;
ESP_LOGD(TAG,"BUS_WIDTH: 0x%02x", bus_width);