Omar Chebib 5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer ... G0 doesn't depend on any G1+ layer for RISC-V based targets		2022-06-14 15:00:53 +08:00
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esp32	spi_flash: Making XMC flash works more stable when brownout detected	2022-06-02 10:38:55 +08:00
esp32c2	G0: RISC-V targets have now an independent G0 layer	2022-06-14 15:00:53 +08:00
esp32c3	G0: RISC-V targets have now an independent G0 layer	2022-06-14 15:00:53 +08:00
esp32h2	G0: RISC-V targets have now an independent G0 layer	2022-06-14 15:00:53 +08:00
esp32s2	MMU: Add configurable mmu page size support on ESP32C2	2022-06-08 19:34:31 +08:00
esp32s3	MMU: Add configurable mmu page size support on ESP32C2	2022-06-08 19:34:31 +08:00
include	esp_hw_support/esp_system: Re-evaluate header inclusions and include directories	2022-03-07 11:18:08 +05:30
async_memcpy_impl_gdma.c	global: make periph enable/disable APIs private	2021-11-08 10:37:47 +08:00
esp_memprot_conv.c	System/Security: Memprot API unified (ESP32C3)	2021-12-21 01:50:36 +01:00