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rtc_clk: fix esp32 unreachable code in rtc_clk_xtal_freq_estimate
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@ -135,6 +135,7 @@ static rtc_xtal_freq_t rtc_clk_xtal_freq_estimate(void)
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#if CONFIG_IDF_ENV_FPGA
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return RTC_XTAL_FREQ_40M;
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#endif // CONFIG_IDF_ENV_FPGA
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rtc_xtal_freq_t xtal_freq;
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/* Enable 8M/256 clock if needed */
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const bool clk_8m_enabled = rtc_clk_8m_enabled();
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const bool clk_8md256_enabled = rtc_clk_8md256_enabled();
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@ -151,20 +152,26 @@ static rtc_xtal_freq_t rtc_clk_xtal_freq_estimate(void)
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/* Guess the XTAL type. For now, only 40 and 26MHz are supported.
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*/
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switch (freq_mhz) {
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case 21 ... 31:
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return RTC_XTAL_FREQ_26M;
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case 32 ... 33:
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ESP_HW_LOGW(TAG, "Potentially bogus XTAL frequency: %d MHz, guessing 26 MHz", freq_mhz);
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return RTC_XTAL_FREQ_26M;
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case 34 ... 35:
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ESP_HW_LOGW(TAG, "Potentially bogus XTAL frequency: %d MHz, guessing 40 MHz", freq_mhz);
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return RTC_XTAL_FREQ_40M;
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case 36 ... 45:
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return RTC_XTAL_FREQ_40M;
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default:
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ESP_HW_LOGW(TAG, "Bogus XTAL frequency: %d MHz", freq_mhz);
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return RTC_XTAL_FREQ_AUTO;
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case 21 ... 31:
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xtal_freq = RTC_XTAL_FREQ_26M;
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break;
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case 32 ... 33:
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ESP_HW_LOGW(TAG, "Potentially bogus XTAL frequency: %d MHz, guessing 26 MHz", freq_mhz);
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xtal_freq = RTC_XTAL_FREQ_26M;
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break;
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case 34 ... 35:
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ESP_HW_LOGW(TAG, "Potentially bogus XTAL frequency: %d MHz, guessing 40 MHz", freq_mhz);
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xtal_freq = RTC_XTAL_FREQ_40M;
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break;
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case 36 ... 45:
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xtal_freq = RTC_XTAL_FREQ_40M;
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break;
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default:
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ESP_HW_LOGW(TAG, "Bogus XTAL frequency: %d MHz", freq_mhz);
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xtal_freq = RTC_XTAL_FREQ_AUTO;
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break;
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}
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/* Restore 8M and 8md256 clocks to original state */
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rtc_clk_8m_enable(clk_8m_enabled, clk_8md256_enabled);
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return xtal_freq;
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}
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