zlq
3dc89437cc
support auto adjust LDO voltage based on pvt-dig
2022-08-17 17:25:59 +08:00
cje
7243032123
set fosc div to 1 to make chip run stablly for C2
2022-08-17 10:58:14 +08:00
Sudeep Mohanty
56c78fbbf7
rtci2c: Corrected the register base addr reference for RTC I2C on esp32s3
...
This commit corrects the register base address reference for RTC I2C on
esp32s3.
2022-08-15 14:50:04 +02:00
jingli
8cd7c30bc7
kconfig: refactor xtal freq kconfig to common configuration item
2022-08-08 13:53:02 +08:00
Wan Lei
1265a2db9d
Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master'
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Fix check_public_headers violations for soc component
Closes IDF-5397
See merge request espressif/esp-idf!19158
2022-08-01 10:14:04 +08:00
wuzhenghui
7cb9304b65
Clean IRAM and DRAM address space conversion macros
2022-07-29 17:07:39 +08:00
wanlei
bb5a95f1aa
soc: fix register header files not self-contain
2022-07-29 11:18:06 +08:00
wuzhenghui
31183270fb
bugfix: fix SOC_ROM_STACK_START defines
2022-07-29 10:51:47 +08:00
wuzhenghui
21a4eda4d4
Use the entire sharedbuffer space as the heap of the D/IRAM attribute
2022-07-29 10:51:47 +08:00
morris
d94432fea8
systimer: refactor hal to accomodate more xtal choices
2022-07-25 16:08:52 +08:00
morris
c4e84751a5
driver: fix public header exceptions for driver
2022-07-22 00:12:36 +00:00
morris
741b031e83
soc: added SOC_TOUCH_SENSE_SUPPORTED macro
2022-07-22 00:12:36 +00:00
laokaiyao
edee3ee3cd
i2s: add slot sequence table
...
Closes: https://github.com/espressif/esp-idf/issues/9208
When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
2022-07-21 15:52:39 +08:00
laokaiyao
90866e99fb
i2s: add basic examples for STD/TDM/PDM mode
2022-07-21 15:52:39 +08:00
morris
4154eaec93
sdm: clean up soc/hal/ll code
2022-07-20 14:59:50 +08:00
morris
bec44ca2e9
gptimer: test on c2 with xtal 26mhz
2022-07-20 04:40:28 +00:00
Song Ruo Jing
4734b1433b
Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master'
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gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report
Closes IDF-4901
See merge request espressif/esp-idf!18805
2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen)
9f6f61345b
Merge branch 'feature/adc_driver_ng' into 'master'
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ADC Driver NG
Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979
See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5
I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2
2022-07-19 11:41:42 +08:00
Armando
5b523a3313
esp_adc: new esp_adc component and adc drivers
2022-07-15 18:31:00 +08:00
songruojing
145454356b
gpio: Fix ESP32S3 GPIO48 does not support hold function bug
...
GPIO_HOLD_MASK array was missing the last item
Add __Static_assert to check array sizes for all gpio_periph.c files to prevent same mistake in the future.
2022-07-15 16:51:25 +08:00
Jiang Jiang Jian
b610b47a83
Merge branch 'feature/esp32s3_memprot_additional_improvements' into 'master'
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[System/Security] Memprot after-merge improvements (v5.0)
Closes IDF-5263 and IDF-5208
See merge request espressif/esp-idf!18893
2022-07-13 15:48:20 +08:00
Jiang Jiang Jian
3630713e5f
Merge branch 'docs/esp32c2_sys_feature_api_guides' into 'master'
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docs: update system API-guides for ESP32-C2
Closes IDF-4202, IDF-4213, and IDF-4222
See merge request espressif/esp-idf!18979
2022-07-12 10:59:12 +08:00
Marius Vikhammer
d62421619c
docs: update system API-guides for ESP32-C2
2022-07-12 09:32:43 +08:00
Song Ruo Jing
ea97cc93ea
Merge branch 'feature/c2_systimer_26mhz' into 'master'
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esp32c2: 26 MHz XTAL support: Kconfig option, systimer support
Closes IDF-5412 and IDF-5413
See merge request espressif/esp-idf!18835
2022-07-11 16:17:25 +08:00
songruojing
b3d8db3ae2
bootloader, esp_system: esp32c2 console uart to support 26MHz xtal
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Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
2022-07-11 12:24:58 +08:00
songruojing
ef813b23fa
rtc: esp32c2 support 26MHz xtal in startup code and rtc_clk.c
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
2e37218ce5
soc, hal: remove XTAL_CLK_FREQ
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XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4
esp_timer, hal: add support for non-integer systimer frequency
...
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:
1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.
For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.
This introduced two possible issues:
1. Overflow when multiplying systimer counter by 5
- Should not be an issue, since systimer counter is 52-bit, so
counter * 5 is no more than 55-bit.
2. The code needs to perform:
- divide by 5: when converting from microseconds to ticks
- divide by 52: when converting from ticks to microseconds
The latter potentially introduces a performance issue for the
esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Martin Vychodil
0c87ae2a91
System/Security: Memprot API unified (ESP32S3)
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Added missing features and improvements
2022-07-09 22:57:51 +02:00
Jiang Jiang Jian
a7bf3af687
Merge branch 'bugfix/reset_ble_hw_on_inititalization' into 'master'
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component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
Closes BT-2402
See merge request espressif/esp-idf!18831
2022-07-08 16:21:41 +08:00
morris
75bd6fc2d9
Merge branch 'contrib/github_pr_9302' into 'master'
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ESP32S3 USB external PHY pinout (GitHub PR)
Closes IDFGH-7761
See merge request espressif/esp-idf!18909
2022-07-07 16:17:26 +08:00
morris
b0e228f756
soc: update copyright for usb phy pins
2022-07-07 11:50:06 +08:00
Michael (XIAO Xufeng)
a58362a429
Merge branch 'feature/efuse_rev_major_minor' into 'master'
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efuse: Adds major and minor versions
See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f
Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
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support c2 26M/32M xtal for bbpll
Closes IDF-5485
See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
lsita
9ceff23c6d
USB external PHY pinout set as in Reference Manual Figure 29-3.
2022-07-06 14:54:35 +02:00
wangmengyang
f86efb2bc2
fix licence copyright for header file syscon_reg.h on ESP32C3 and ESP32S3
2022-07-06 16:24:03 +08:00
wangmengyang
1d55f12c2d
component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
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1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
2022-07-06 16:23:48 +08:00
morris
627b171a3c
Merge branch 'feature/enable_rpa_modem_reset_function_in_esp32h2' into 'master'
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Enable rpa_moudle reset function
See merge request espressif/esp-idf!18891
2022-07-06 14:47:37 +08:00
GengYuchao
d145c337e0
Enable rpa_moudle reset function
2022-07-05 20:50:31 +08:00
cje
e16165f263
support c2 26M/32M xtal for bbpll
2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
Jakob Hasse
f8b5ed5d6c
refactor (soc, esp_rom)!: removed target-specific ROM dependencies
2022-07-05 13:57:58 +08:00
morris
7863c1bc45
Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
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Bugfix/fix rtc freq err for h2 beta1
See merge request espressif/esp-idf!18682
2022-07-04 16:46:17 +08:00
Omar Chebib
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
GengYuchao
10fd1daa10
Add ETM clk gate defines for h2
2022-06-30 17:02:00 +08:00
Armando (Dou Yiwen)
e13d7f8351
Merge branch 'bugfix/s2_ap64_psram_crash_issue' into 'master'
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psram: fix esp32s2 module with APS6404 PSRAM crash issue
Closes IDF-5361
See merge request espressif/esp-idf!18699
2022-06-29 11:19:17 +08:00
Armando
31b3f31ef4
ext_mem: make memory region check strict
2022-06-28 14:17:44 +08:00
morris
7fd9a91034
dma: move from driver to hw_support
2022-06-28 14:17:12 +08:00
Mahavir Jain
c619e2162d
Merge branch 'feature/memprot_settings_to_soc_caps' into 'master'
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esp_system: move MEMPROT related configuration to soc capability header
Closes IDF-4506
See merge request espressif/esp-idf!18645
2022-06-24 18:08:19 +08:00
Mahavir Jain
dd24639215
Merge branch 'esp32h2/enable_ecc_accelerator' into 'master'
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esp32h2: Enable ECC accelerator
Closes IDF-3397
See merge request espressif/esp-idf!18647
2022-06-23 20:06:26 +08:00
Cao Sen Miao
3a820462ac
temperature_sensor: Add temperature sensor support for ESP32-C2
2022-06-23 15:36:43 +08:00
Sachin Parekh
6cfc9c365f
esp32h2: Enable ECC accelerator
2022-06-23 12:59:13 +05:30
Marius Vikhammer
7e60e07a0a
Merge branch 'feature/esp8684_sha' into 'master'
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mbedtls: enable hw support for SHA on C2
Closes IDF-3830 and IDF-5141
See merge request espressif/esp-idf!18531
2022-06-23 14:18:49 +08:00
Mahavir Jain
0a12eab32e
esp_system: move MEMPROT related configuration to soc capability header
...
Closes IDF-4506
2022-06-23 10:29:42 +05:30
Marius Vikhammer
f4c79687f8
SHA: added hardware support for SHA on C2.
2022-06-23 11:01:16 +08:00
Zim Kalinowski
136c873364
Merge branch 'refactor/g0_for_xtensa' into 'master'
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G0: Support Xtensa targets for G0-only compilation
Closes IDF-3087
See merge request espressif/esp-idf!18538
2022-06-23 07:28:37 +08:00
muhaidong
96f86e0bb4
esp_wifi: esp32c2 does not support wifi mesh
2022-06-21 16:48:52 +08:00
muhaidong
b48b9beace
esp_wifi: esp32c2 does not support csi.
2022-06-20 21:47:51 +08:00
muhaidong
9a25d06b5f
esp_wifi: esp32s2 esp32c3 and esp32s3 support ftm
2022-06-20 21:47:51 +08:00
morris
865937fba3
Merge branch 'bugfix/fix_esp32c2_dose_not_support_wapi' into 'master'
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esp_wifi: esp32c2 does not support wapi
Closes IDF-4216
See merge request espressif/esp-idf!18573
2022-06-20 21:31:54 +08:00
muhaidong
2ccce0ca41
esp_wifi: update comments of WI-FI CAPS in soc_caps.h
2022-06-20 19:43:16 +08:00
Omar Chebib
8fae0f0753
G0: Support Xtensa targets for G0-only compilation
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G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Martin Vychodil
692b9980b5
Merge branch 'feature/memprot_api_unified_s3_2' into 'master'
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System/Security: Memprot API unified (ESP32S3)
See merge request espressif/esp-idf!16169
2022-06-20 17:34:22 +08:00
muhaidong
6ca2804107
esp_wifi: esp32c2 does not support wapi.
2022-06-20 11:42:12 +08:00
Martin Vychodil
339fcbf14d
System/Security: Memprot API unified (ESP32S3)
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Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
Ivan Grokhotkov
3973db7664
soc: make register access macros compatible with C++20
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In C++20, using the result of an assignment to a 'volatile' value is
deprecated.
Breaking change: register "setter" or modification macros can no
longer be used as expressions.
Closes https://github.com/espressif/esp-idf/issues/9170
2022-06-17 18:09:22 +02:00
morris
381b4cb26f
Merge branch 'bugfix/undefined_dport_lvl_def' into 'master'
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soc(esp32): Expose SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL for all ECO versions
Closes IDFGH-7606
See merge request espressif/esp-idf!18520
2022-06-16 15:00:24 +08:00
Omar Chebib
752026a174
Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
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G0: RISC-V targets have now an independent G0 layer
See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
KonstantinKondrashov
f428a241c6
soc(esp32): Expose SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL for all ECO versions
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It fixes a build issue when ESP32_ECO3_CACHE_LOCK_FIX=y
Closes https://github.com/espressif/esp-idf/issues/9160
2022-06-15 17:42:21 +08:00
laokaiyao
28b8fc6a7e
i2s: update documents for driver-NG
2022-06-15 10:30:04 +08:00
Darian
e213e66ba3
Merge branch 'refactor/esp_hw_support_cpu' into 'master'
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esp_hw_support: Add new esp_cpu.h abstraction
Closes IDF-4769
See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
morris
919344547b
Merge branch 'bugfix/rmt_register_file_s3' into 'master'
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rmt: update register file after fixing csv of RMT peripheral (esp32s2/s3)
Closes IDFGH-7537
See merge request espressif/esp-idf!18392
2022-06-14 18:24:28 +08:00
Michael (XIAO Xufeng)
7b8e5888ca
Merge branch 'refactor/add_clk_tree_ll' into 'master'
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clk_tree: Stage3 - HAL for clock subsystem
Closes IDF-4334
See merge request espressif/esp-idf!18270
2022-06-14 17:16:29 +08:00
Omar Chebib
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
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G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b
esp_hw_support: Add esp_cpu.h abstraction and API
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This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:
- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)
Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Konstantin Kondrashov
7d942e0a5d
Merge branch 'feature/efuse_rst_is_treated_as_poweron_rst' into 'master'
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reset_reasons: EFUSE_RST is treated as POWERON_RST + checks errors of eFuse BLOCK0
Closes IDF-3702
See merge request espressif/esp-idf!14742
2022-06-13 21:26:13 +08:00
songruojing
c8752cee6a
clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem
2022-06-13 17:47:50 +08:00
morris
4094f13fd3
rmt: fix error in rmt register file
...
Closes https://github.com/espressif/esp-idf/issues/9100
2022-06-10 18:38:42 +08:00
morris
5daa73d236
Merge branch 'refactor/mcpwm_hal_driver_doc' into 'master'
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mcpwm: don't support disable carrier one-shot pulse
Closes IDFGH-7406
See merge request espressif/esp-idf!18295
2022-06-10 10:28:59 +08:00
KonstantinKondrashov
46f0313d6b
reset_reasons: EFUSE_RST is treated as POWERON_RST
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ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
2022-06-09 17:49:03 +08:00
Cao Sen Miao
6589daabb9
MMU: Add configurable mmu page size support on ESP32C2
2022-06-08 19:34:31 +08:00
Michael (XIAO Xufeng)
773715d900
Merge branch 'feature/support_refresh_brownout_v1' into 'master'
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spi_flash: send reset when brownout detected on XMC flash
Closes IDF-3882
See merge request espressif/esp-idf!16873
2022-06-06 16:27:58 +08:00
Mahavir Jain
2acab7c783
Merge branch 'feature/c2_rng_support' into 'master'
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esp32c2: Add support for RNG
Closes IDF-4021
See merge request espressif/esp-idf!18149
2022-06-06 12:38:28 +08:00
Jiang Jiang Jian
b617ccfb4c
Merge branch 'feature/esp32c2_eco1_bluetooth_update_0525_for_MR' into 'master'
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Support bluetooth for esp32c2 chip
See merge request espressif/esp-idf!18243
2022-06-04 17:35:17 +08:00
Michael (XIAO Xufeng)
d798662421
Merge branch 'bugfix/s3_sleep_voltage' into 'master'
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esp32s3: fixed dangerous power parameters in sleep modes
See merge request espressif/esp-idf!18168
2022-06-04 00:47:32 +08:00
Geng Yuchao
8012af37d1
Fix soc caps for BT
2022-06-03 21:45:40 +08:00
morris
f7ff7ac4d0
mcpwm: clean up hal driver and add doc
2022-06-02 15:01:18 +08:00
Sachin Parekh
8ad3f2ba57
esp32c2: Add support for RNG
2022-06-02 11:36:23 +08:00
Cao Sen Miao
6a2d3509dc
spi_flash: Making XMC flash works more stable when brownout detected
2022-06-02 10:38:55 +08:00
chaijie
e624206ca6
modify voltage param to fit all mode of S3
2022-06-01 21:03:54 +08:00
Michael (XIAO Xufeng)
ab69df3ea7
esp32s3: fixed dangerous power parameters in sleep modes
2022-06-01 21:03:54 +08:00
Konstantin Kondrashov
b824f68b35
Merge branch 'feature/move_dport_workaround_to_g0' into 'master'
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dport_access: Move DPORT workaround to G0
Closes IDF-2177
See merge request espressif/esp-idf!17961
2022-06-01 12:11:12 +08:00
Konstantin Kondrashov
f1d3332eea
Merge branch 'bugfix/c3_efuse_fail_bits' into 'master'
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soc: Fix efuse fail bits
See merge request espressif/esp-idf!18321
2022-05-31 21:11:30 +08:00
KonstantinKondrashov
c5a4ab39a7
soc: Fix description of efuse fail bits
2022-05-31 11:21:24 +00:00
KonstantinKondrashov
0b22839925
hal(ecp32c2): Adds spi_flash_encrypted_ll
2022-05-31 11:12:21 +00:00
KonstantinKondrashov
505e18237a
bootloader: Support Flash Encryption for ESP32-C2
2022-05-31 11:12:21 +00:00
KonstantinKondrashov
ac4c7d99fe
dport: Move DPORT workaround to G0
2022-05-31 13:44:18 +08:00
Island
74b7a3fc83
Merge branch 'feature/final_h2_bluedroid_skc_common' into 'master'
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Feature/final h2 bluedroid skc common
See merge request espressif/esp-idf!17710
2022-05-30 21:20:52 +08:00
Jiang Jiang Jian
2bc5d58807
Merge branch 'feature/support_sleep_for_esp32c2' into 'master'
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esp32c2: support power management
Closes IDF-4440 and IDF-4617
See merge request espressif/esp-idf!18174
2022-05-30 17:57:18 +08:00
satish.solanke
3a42007680
Bluedroid porting changes for esp32h2
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created common Kconfig for common flag of nimbble and Bluedroid
fix compile error
created common cfg file for controller
fix the compilation error on tip of master
added common controller flags and fixed compilation error
sdkconfig rename for target specific
2022-05-30 08:42:45 +00:00
jingli
93a5087e58
add PM related soc caps about power down rtc slow/fast mem
...
Supporting rtc slow/fast mem does not mean supporting
rtc slow/fast mem power down.
2022-05-30 15:26:50 +08:00
Jiang Jiang Jian
0e94779b2e
Merge branch 'feature/support_esp32c2_wifi_new' into 'master'
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Bringup ESP32C2 Wi-Fi
Closes IDF-3905
See merge request espressif/esp-idf!18136
2022-05-29 18:25:24 +08:00
Jiang Jiang Jian
f3922f1b7f
Merge branch 'feature/flash_mmap_refactor' into 'master'
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flash mmap: abstract R/W of MMU table instead of reg access
See merge request espressif/esp-idf!16882
2022-05-29 13:56:37 +08:00
Wu Zheng Hui
b98622c624
efuse: update efuse name
2022-05-28 22:03:16 +08:00
Jessy Chen
7b9b448041
esp_wifi: optimize wifi kconfig
2022-05-28 08:52:55 +00:00
Jessy Chen
0ae391ef07
esp_wifi: enable FTM for esp32c2 & fix pre-commit check
2022-05-28 08:52:55 +00:00
zhangyanjiao
e979e9701f
esp_wifi: bringup esp32c2 wifi
2022-05-28 08:52:55 +00:00
jingli
ae127b04cd
fix ld err since esp32c2 do not suport config gpio of spi flash via efuse
2022-05-27 19:29:38 +08:00
jingli
9eec740a16
enable external 32k osc for esp32c2
2022-05-27 19:29:29 +08:00
Song Ruo Jing
cf32e49aeb
Merge branch 'refactor/cleanup_rtc_h' into 'master'
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clk_tree: Prework2 of introducing clock subsystem control
Closes IDF-4934
See merge request espressif/esp-idf!17861
2022-05-26 09:16:47 +08:00
Sachin Parekh
9a763f4ff2
esp32c2: Enable IRAM/DRAM split using PMP
2022-05-24 21:36:06 +05:30
songruojing
74c99a8a07
rtc_clk: Add alias for the clock tree related enum and macros for backwards compatibility
2022-05-24 22:59:51 +08:00
songruojing
729d70129a
clk_tree: add initial docs for clock tree
2022-05-24 22:59:51 +08:00
morris
b26cd91537
doc: added clk_tree definitions to doc
2022-05-24 22:59:51 +08:00
songruojing
a5b09cf015
rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
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soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
laokaiyao
a5f651ad71
i2s: Update FIFO direct access reg on ESP32 according to the TRM
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Closes: https://www.github.com/espressif/esp-idf/issues/8862
2022-05-23 16:28:42 +08:00
jiangguangming
42bc0b0643
soc: remove unused MMU related macros
2022-05-20 16:46:28 +08:00
jiangguangming
9c6afee12f
flash mmap: abstract R/W MMU table instead of reg access
2022-05-20 16:46:27 +08:00
Michael (XIAO Xufeng)
0adb814af3
Merge branch 'bugfix/fix_memory_miss_bug_esp32c3_esp32s3' into 'master'
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ESP32C3/ESP32S3: Fix cpu crash bug when wakeup from lightsleep for memory data miss
Closes IDF-162 and IDF-4923
See merge request espressif/esp-idf!17823
2022-05-18 12:05:08 +08:00
Michael (XIAO Xufeng)
adcdcbaa0e
Merge branch 'feat/pm_dbias_refactoring' into 'master'
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pm: refactoring dbias related code
See merge request espressif/esp-idf!17994
2022-05-17 14:42:16 +08:00
chaijie
cc0a5a4edb
solve memory error bug when in lightsleep mode
2022-05-16 11:43:00 +08:00
Michael (XIAO Xufeng)
6f507d527c
rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
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Sync configuration from other chips
Closes: https://github.com/espressif/esp-idf/issues/8007 , https://github.com/espressif/esp-idf/pull/8089
2022-05-14 22:35:41 +08:00
Michael (XIAO Xufeng)
234628b3ea
pm: putting dbias and pd_cur code into same function
2022-05-14 02:35:11 +08:00
Jing Li
ac0d16cdc8
Merge branch 'bugfix/fix_cannot_lslp_again_after_ulp_wakeup' into 'master'
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sleep: fix cannot lightsleep again after a wakeup from ULP
Closes IDFGH-4396
See merge request espressif/esp-idf!17970
2022-05-13 22:25:23 +08:00
jingli
abb6bb1181
esp_hw_support/sleep: fix cannot enable sleep reject in some cases
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When enable sleep reject before this fix, we have two limitations:
1. it must be light sleep
2. RTC GPIO wakeup source must be set
We require light sleep because `esp_deep_sleep_start` function has
been declared with "noreturn" attribute, So developers don't expect
that this function may return (due to an error or a sleep reject).
But the requirement for RTC GPIO wakeup source is not reasonable for
all chips. This requirement exists because ESP32 only supports RTC GPIO
and SDIO sleep reject sources. But later chips support all sleep reject
sources.
This fix brings the following changes:
for ESP32: RTC GPIO and SDIO sleep reject sources can be enabled
when corresponding wakeup source is set.
for later chips: all sleep reject sources can be enabled when
corresponding wakeup source is set.
2022-05-12 19:09:57 +08:00
Marius Vikhammer
c8617fe965
docs: fix all doxygen warnings
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Doxygen warnings would previously not result in a failed pipeline.
Fixed this as well as all current warnings.
2022-05-12 14:50:03 +08:00
Michael (XIAO Xufeng)
36074b9812
pm: add powerdown for int_8m on ESP32-C2 and ESP32-H2
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Also move the xtal fpu logic to sleep_modes.c
2022-05-11 11:36:34 +08:00
Michael (XIAO Xufeng)
2905cbbe03
pm: fixed RTC8M domain power issues
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introduced in e44ead5356
1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.
But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.
On ESP32, there was protection for it, but broken by commit
e44ead5356
. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.
In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.
On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.
This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):
1. When RTC clock source uses 8MD256, power up
2. When LEDC uses RTC8M clock source, power up
3. In deepsleep, power down
4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
power down by default. (This is preferred to have highest
priority, but it's kept as is because of current code structure.)
2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.
This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).
Related: https://github.com/espressif/esp-idf/issues/8007 , https://github.com/espressif/esp-idf/pull/8089
temp
2022-05-11 11:30:47 +08:00
morris
523c51818c
Merge branch 'feature/c2_soc_hwsupport_code' into 'master'
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ESP32-C2 (729) RTC update (Clock, PM)
Closes IDF-3833 and IDF-4874
See merge request espressif/esp-idf!17311
2022-05-11 11:23:57 +08:00
morris
df5872b3a4
Merge branch 'feature/support_i2c_on_esp32h2' into 'master'
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i2c: support i2c on esp32h2
Closes IDF-4155
See merge request espressif/esp-idf!17798
2022-05-10 22:48:05 +08:00
zlq
6336f8191e
C2 rtc code
2022-05-09 17:50:54 +08:00
morris
722fde218d
uart: add default source clock for all targets
2022-05-09 11:26:30 +08:00
Armando (Dou Yiwen)
03aeac1dde
Merge branch 'refactor/adc_hal_common_layer' into 'master'
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adc: create common adc hal layer
See merge request espressif/esp-idf!17577
2022-05-08 15:45:56 +08:00
Armando
49747bb486
adc: create common adc hal layer
2022-05-07 19:20:44 +08:00
morris
2fb43820c2
driver_ng: implement new rmt driver
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The legacy driver can't handle the breaking change between esp chips
very well.
And it's not elegant to extend new feature like DMA, ETM.
The new driver can return a opaque handle for each RMT channel.
An obvious transaction concept was also introduced.
TX and RX functionalities are splited out.
2022-05-07 10:34:50 +00:00
morris
3f66660444
Merge branch 'feature/bringup_esp32c2eco1' into 'master'
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esp32c2:ECO1 ROM update
Closes IDF-4933
See merge request espressif/esp-idf!17723
2022-05-06 18:06:26 +08:00
Simon
0b00831703
Merge branch 'bugfix/i2c_timeout_issue' into 'master'
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I2C: Patch for solving watchdog timeout issue
Closes IDFGH-6923, IDFGH-6463, and IDFGH-5558
See merge request espressif/esp-idf!17956
2022-05-06 10:38:38 +08:00
Armando (Dou Yiwen)
76be0c2624
Merge branch 'bugfix/fix_esp32_mmu_init_issue' into 'master'
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mmu: add ll functions for mmu unmap
Closes OCD-526 and IDF-4962
See merge request espressif/esp-idf!17868
2022-05-05 22:21:18 +08:00
wuzhenghui
17b3d139d5
hal: use systimer HAL IMPL in ESP32C2 ROM
2022-05-05 17:41:11 +08:00
wuzhenghui
b530632f33
esp32c2: fix soc_caps defines
2022-05-05 17:41:11 +08:00
Cao Sen Miao
9a9f10e4c9
I2C: patch for solving watchdog timeout issue
2022-05-05 14:36:49 +08:00
morris
9ab4abfb46
hw_support: move rtc_ctrl from driver to hw_support
2022-04-29 14:28:09 +08:00
Michael (XIAO Xufeng)
6bc8dd0f92
Merge branch 'feature/support_esp32s3_bbpll_fix' into 'master'
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rtc: update esp32s3 bbpll config
Closes IDF-4872
See merge request espressif/esp-idf!14471
2022-04-27 22:52:21 +08:00
Armando
b748a4fe5e
mmu: improve vaddr range check
2022-04-27 11:35:07 +08:00
Armando
e09787d851
mmu: fix macro MMU_ENTRY_NUM and add new macro MMU_MAX_PADDR_PAGE_NUM
2022-04-27 11:35:07 +08:00
Armando
2764cd5682
mmu: simplify mmu_hal_init
2022-04-27 11:35:07 +08:00
jiangguangming
63ac5e4a99
mmu: add ll func used to invalidate the mmu entry
2022-04-27 11:35:07 +08:00
Cao Sen Miao
4418a855ba
spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2
2022-04-26 15:22:37 +08:00
sly
117c30e835
fix S3 bbpll calibrate fail bug in high temperature
2022-04-25 16:41:04 +08:00