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soc: remove unused MMU related macros
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9c6afee12f
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@ -21,11 +21,8 @@ extern "C" {
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#define SOC_MMU_IROM0_PAGES_END 256
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#define SOC_MMU_DROM0_PAGES_START 0
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#define SOC_MMU_DROM0_PAGES_END 64
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#define SOC_MMU_INVALID_ENTRY_VAL DPORT_FLASH_MMU_TABLE_INVALID_VAL
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#define SOC_MMU_ADDR_MASK DPORT_MMU_ADDRESS_MASK
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#define SOC_MMU_PAGE_IN_FLASH(page) (page)
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#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE DPORT_PRO_FLASH_MMU_TABLE
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#define SOC_MMU_DPORT_APP_FLASH_MMU_TABLE DPORT_APP_FLASH_MMU_TABLE
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#define SOC_MMU_VADDR1_START_ADDR SOC_IROM_MASK_LOW
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#define SOC_MMU_PRO_IRAM0_FIRST_USABLE_PAGE ((SOC_MMU_VADDR1_FIRST_USABLE_ADDR - SOC_MMU_VADDR1_START_ADDR) / SPI_FLASH_MMU_PAGE_SIZE + SOC_MMU_IROM0_PAGES_START)
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#define SOC_MMU_VADDR0_START_ADDR SOC_DROM_LOW
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@ -78,8 +78,6 @@ extern "C" {
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#define FLASH_MMU_TABLE ((volatile uint32_t*) DR_REG_MMU_TABLE)
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#define FLASH_MMU_TABLE_SIZE (ICACHE_MMU_SIZE/sizeof(uint32_t))
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#define MMU_TABLE_INVALID_VAL MMU_INVALID
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#define FLASH_MMU_TABLE_INVALID_VAL DPORT_MMU_TABLE_INVALID_VAL
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/**
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* MMU entry valid bit mask for mapping value. For an entry:
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* valid bit + value bits
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@ -20,10 +20,8 @@ extern "C" {
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#define SOC_MMU_IROM0_PAGES_END (CACHE_IROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_START (CACHE_DROM_MMU_START / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_END (CACHE_DROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
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#define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
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#define SOC_MMU_PAGE_IN_FLASH(page) (page) //Always in Flash
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#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
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#define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
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#define SOC_MMU_PRO_IRAM0_FIRST_USABLE_PAGE SOC_MMU_IROM0_PAGES_START
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#define SOC_MMU_VADDR0_START_ADDR (SOC_DROM_LOW + (SOC_MMU_DROM0_PAGES_START * SPI_FLASH_MMU_PAGE_SIZE))
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@ -73,8 +73,6 @@ extern "C" {
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#define FLASH_MMU_TABLE ((volatile uint32_t*) DR_REG_MMU_TABLE)
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#define FLASH_MMU_TABLE_SIZE (ICACHE_MMU_SIZE/sizeof(uint32_t))
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#define MMU_TABLE_INVALID_VAL 0x100
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#define FLASH_MMU_TABLE_INVALID_VAL DPORT_MMU_TABLE_INVALID_VAL
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/**
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* MMU entry valid bit mask for mapping value. For an entry:
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* valid bit + value bits
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@ -20,10 +20,8 @@ extern "C" {
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#define SOC_MMU_IROM0_PAGES_END (CACHE_IROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_START (CACHE_DROM_MMU_START / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_END (CACHE_DROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
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#define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
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#define SOC_MMU_PAGE_IN_FLASH(page) (page) //Always in Flash
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#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
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#define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
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#define SOC_MMU_PRO_IRAM0_FIRST_USABLE_PAGE SOC_MMU_IROM0_PAGES_START
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#define SOC_MMU_VADDR0_START_ADDR (SOC_DROM_LOW + (SOC_MMU_DROM0_PAGES_START * SPI_FLASH_MMU_PAGE_SIZE))
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@ -73,8 +73,6 @@ extern "C" {
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#define FLASH_MMU_TABLE ((volatile uint32_t*) DR_REG_MMU_TABLE)
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#define FLASH_MMU_TABLE_SIZE (ICACHE_MMU_SIZE/sizeof(uint32_t))
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#define MMU_TABLE_INVALID_VAL 0x100
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#define FLASH_MMU_TABLE_INVALID_VAL DPORT_MMU_TABLE_INVALID_VAL
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/**
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* MMU entry valid bit mask for mapping value. For an entry:
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* valid bit + value bits
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@ -20,10 +20,8 @@ extern "C" {
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#define SOC_MMU_IROM0_PAGES_END (CACHE_IROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_START (CACHE_DROM_MMU_START / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_END (CACHE_DROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
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#define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
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#define SOC_MMU_PAGE_IN_FLASH(page) (page) //Always in Flash
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#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
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#define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
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#define SOC_MMU_PRO_IRAM0_FIRST_USABLE_PAGE SOC_MMU_IROM0_PAGES_START
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#define SOC_MMU_VADDR0_START_ADDR (SOC_DROM_LOW + (SOC_MMU_DROM0_PAGES_START * SPI_FLASH_MMU_PAGE_SIZE))
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@ -102,8 +102,6 @@ extern "C" {
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#define FLASH_MMU_TABLE ((volatile uint32_t*) DR_REG_MMU_TABLE)
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#define FLASH_MMU_TABLE_SIZE (ICACHE_MMU_SIZE/sizeof(uint32_t))
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#define MMU_TABLE_INVALID_VAL 0x4000
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#define FLASH_MMU_TABLE_INVALID_VAL DPORT_MMU_TABLE_INVALID_VAL
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/**
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* MMU entry valid bit mask for mapping value. For an entry:
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* valid bit + value bits
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@ -20,10 +20,8 @@ extern "C" {
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#define SOC_MMU_IROM0_PAGES_END (PRO_CACHE_IBUS1_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_START (PRO_CACHE_IBUS2_MMU_START / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_END (PRO_CACHE_IBUS2_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
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#define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
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#define SOC_MMU_PAGE_IN_FLASH(page) ((page) | MMU_ACCESS_FLASH)
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#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
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#define SOC_MMU_VADDR1_START_ADDR SOC_IROM_MASK_LOW
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#define SOC_MMU_PRO_IRAM0_FIRST_USABLE_PAGE ((SOC_MMU_VADDR1_FIRST_USABLE_ADDR - SOC_MMU_VADDR1_START_ADDR) / SPI_FLASH_MMU_PAGE_SIZE + SOC_MMU_IROM0_PAGES_START)
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#define SOC_MMU_VADDR0_START_ADDR SOC_DROM_LOW
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@ -73,8 +73,6 @@ extern "C" {
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#define FLASH_MMU_TABLE ((volatile uint32_t*) DR_REG_MMU_TABLE)
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#define FLASH_MMU_TABLE_SIZE (ICACHE_MMU_SIZE/sizeof(uint32_t))
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#define MMU_TABLE_INVALID_VAL 0x4000
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#define FLASH_MMU_TABLE_INVALID_VAL DPORT_MMU_TABLE_INVALID_VAL
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/**
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* MMU entry valid bit mask for mapping value. For an entry:
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* valid bit + value bits
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@ -20,10 +20,8 @@ extern "C" {
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#define SOC_MMU_IROM0_PAGES_END (CACHE_IROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_START (CACHE_DROM_MMU_START / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_END (CACHE_DROM_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
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#define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
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#define SOC_MMU_PAGE_IN_FLASH(page) ((page) | MMU_ACCESS_FLASH)
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#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
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#define SOC_MMU_VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW
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#define SOC_MMU_PRO_IRAM0_FIRST_USABLE_PAGE SOC_MMU_IROM0_PAGES_START
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#define SOC_MMU_VADDR0_START_ADDR (SOC_DROM_LOW + (SOC_MMU_DROM0_PAGES_START * SPI_FLASH_MMU_PAGE_SIZE))
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