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Merge branch 'feature/support_esp32c2_wifi_new' into 'master'

Browse Source 
Bringup ESP32C2 Wi-Fi

Closes IDF-3905

See merge request espressif/esp-idf!18136
This commit is contained in:
Jiang Jiang Jian 2022-05-29 18:25:24 +08:00
commit 0e94779b2e
44 changed files with 1257 additions and 498 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
components/bt/controller/esp32c3/bt.c
View File

@ -1244,6 +1244,9 @@ esp_err_t esp_bt_controller_deinit(void)
phy_init_flag();
esp_bt_power_domain_off();
#if CONFIG_MAC_BB_PD
esp_mac_bb_pd_mem_deinit();
#endif
free(osi_funcs_p);
osi_funcs_p = NULL;

61
components/esp_common/include/esp_attr.h
View File

@ -61,9 +61,45 @@ extern "C" {
// Use as esp_rom_printf(DRAM_STR("Hello world!\n"));
#define DRAM_STR(str) (__extension__({static const DRAM_ATTR char __c[] = (str); (const char *)&__c;}))
#if CONFIG_SOC_RTC_FAST_MEM_SUPPORTED || CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED
// Forces data into RTC memory. See "docs/deep-sleep-stub.rst"
// Any variable marked with this attribute will keep its value
// during a deep sleep / wake cycle.
#define RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.data", __COUNTER__)
// Forces data into RTC memory of .noinit section.
// Any variable marked with this attribute will keep its value
// after restart or during a deep sleep / wake cycle.
#define RTC_NOINIT_ATTR _SECTION_ATTR_IMPL(".rtc_noinit", __COUNTER__)
// Forces read-only data into RTC memory. See "docs/deep-sleep-stub.rst"
#define RTC_RODATA_ATTR _SECTION_ATTR_IMPL(".rtc.rodata", __COUNTER__)
// Forces data into RTC memory and map it to coredump
#define COREDUMP_RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.coredump", __COUNTER__)
// Allows to place data into RTC_SLOW memory.
#define RTC_SLOW_ATTR _SECTION_ATTR_IMPL(".rtc.force_slow", __COUNTER__)
// Forces code into RTC fast memory. See "docs/deep-sleep-stub.rst"
#define RTC_IRAM_ATTR _SECTION_ATTR_IMPL(".rtc.text", __COUNTER__)
// Allows to place data into RTC_FAST memory.
#define RTC_FAST_ATTR _SECTION_ATTR_IMPL(".rtc.force_fast", __COUNTER__)
// Allows to place data into RTC_FAST memory and map it to coredump
#define COREDUMP_RTC_FAST_ATTR _SECTION_ATTR_IMPL(".rtc.fast.coredump", __COUNTER__)
#else
#define RTC_DATA_ATTR
#define RTC_NOINIT_ATTR
#define RTC_RODATA_ATTR
#define COREDUMP_RTC_DATA_ATTR
#define RTC_SLOW_ATTR
#define RTC_IRAM_ATTR
#define RTC_FAST_ATTR
#define COREDUMP_RTC_FAST_ATTR
#endif
#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
// Forces bss variable into external memory. "
#define EXT_RAM_BSS_ATTR _SECTION_ATTR_IMPL(".ext_ram.bss", __COUNTER__)
@ -81,20 +117,6 @@ extern "C" {
#define EXT_RAM_ATTR _Pragma ("GCC warning \"'EXT_RAM_ATTR' macro is deprecated, please use `EXT_RAM_BSS_ATTR`\"")
#endif
// Forces data into RTC slow memory. See "docs/deep-sleep-stub.rst"
// Any variable marked with this attribute will keep its value
// during a deep sleep / wake cycle.
#define RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.data", __COUNTER__)
// Forces read-only data into RTC memory. See "docs/deep-sleep-stub.rst"
#define RTC_RODATA_ATTR _SECTION_ATTR_IMPL(".rtc.rodata", __COUNTER__)
// Allows to place data into RTC_SLOW memory.
#define RTC_SLOW_ATTR _SECTION_ATTR_IMPL(".rtc.force_slow", __COUNTER__)
// Allows to place data into RTC_FAST memory.
#define RTC_FAST_ATTR _SECTION_ATTR_IMPL(".rtc.force_fast", __COUNTER__)
// Forces data into noinit section to avoid initialization after restart.
#define __NOINIT_ATTR _SECTION_ATTR_IMPL(".noinit", __COUNTER__)
@ -106,22 +128,11 @@ extern "C" {
#define EXT_RAM_NOINIT_ATTR __NOINIT_ATTR
#endif
// Forces data into RTC slow memory of .noinit section.
// Any variable marked with this attribute will keep its value
// after restart or during a deep sleep / wake cycle.
#define RTC_NOINIT_ATTR _SECTION_ATTR_IMPL(".rtc_noinit", __COUNTER__)
// Forces code into DRAM instead of flash and map it to coredump
// Use dram2 instead of dram1 to make sure this section will not be included
// by dram1 section in the linker script
#define COREDUMP_DRAM_ATTR _SECTION_ATTR_IMPL(".dram2.coredump", __COUNTER__)
// Forces data into RTC memory and map it to coredump
#define COREDUMP_RTC_DATA_ATTR _SECTION_ATTR_IMPL(".rtc.coredump", __COUNTER__)
// Allows to place data into RTC_FAST memory and map it to coredump
#define COREDUMP_RTC_FAST_ATTR _SECTION_ATTR_IMPL(".rtc.fast.coredump", __COUNTER__)
// Forces to not inline function
#define NOINLINE_ATTR __attribute__((noinline))

6
components/esp_netif/test_apps/README.md
View File

@ -1,4 +1,2 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- | -------- |
Not support on ESP32-C2 yet, waiting esp_wifi supported. TODO: IDF-3905
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 | ESP32-C2 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |

8
components/esp_phy/CMakeLists.txt
View File

@ -1,10 +1,5 @@
idf_build_get_property(idf_target IDF_TARGET)
if(IDF_TARGET STREQUAL "esp32c2")
# TODO : IDF-3906
return()
endif()
set(srcs "src/phy_override.c" "src/lib_printf.c")
if(CONFIG_APP_NO_BLOBS)
@ -72,7 +67,8 @@ if(link_binary_libs)
$<TARGET_FILE:${esp_phy_lib}>)
endif()
if(CONFIG_IDF_TARGET_ESP32C3 OR CONFIG_IDF_TARGET_ESP32S3 OR CONFIG_IDF_TARGET_ESP32H2)
if(CONFIG_IDF_TARGET_ESP32C3 OR CONFIG_IDF_TARGET_ESP32S3
OR CONFIG_IDF_TARGET_ESP32H2 OR CONFIG_IDF_TARGET_ESP32C2)
target_link_libraries(${COMPONENT_LIB} PUBLIC btbb)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a libbtbb.a
$<TARGET_FILE:${esp_phy_lib}>)

182
components/esp_phy/esp32c2/include/phy_init_data.h Normal file
View File

@ -0,0 +1,182 @@
/*
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef PHY_INIT_DATA_H
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
#include "esp_phy_init.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
// constrain a value between 'low' and 'high', inclusive
#define LIMIT(val, low, high) ((val < low) ? low : (val > high) ? high : val)
#define PHY_INIT_MAGIC "PHYINIT"
// define the lowest tx power as LOWEST_PHY_TX_POWER
#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52)
#define PHY_TX_POWER_OFFSET 2
#define PHY_TX_POWER_NUM 14
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
#define PHY_CRC_ALGORITHM 1
#define PHY_COUNTRY_CODE_LEN 2
#define PHY_INIT_DATA_TYPE_OFFSET 126
#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
#endif
static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC;
/**
* @brief Structure containing default recommended PHY initialization parameters.
*/
static const esp_phy_init_data_t phy_init_data= { {
0x00,
0x00,
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x44),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4a),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x46),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x46),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x42),
0x00,
0x00,
0x00,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0x74
} };
static const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
/**
* @brief PHY init data control infomation structure
*/
typedef struct {
uint8_t control_info_checksum[4]; /*!< 4-byte control infomation checksum */
uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */
uint8_t check_algorithm; /*!< check algorithm */
uint8_t version; /*!< PHY init data bin version */
uint8_t number; /*!< PHY init data bin number */
uint8_t length[2]; /*!< Length of each PHY init data bin */
uint8_t reserved[19]; /*!< 19-byte reserved */
} __attribute__ ((packed)) phy_control_info_data_t;
/**
* @brief Country corresponds to PHY init data type structure
*/
typedef struct {
char cc[PHY_COUNTRY_CODE_LEN];
uint8_t type;
} phy_country_to_bin_type_t;
#endif
#ifdef __cplusplus
}
#endif
#endif /* PHY_INIT_DATA_H */

BIN
components/esp_phy/esp32c2/phy_multiple_init_data.bin Normal file
View File

Binary file not shown.

5
components/esp_phy/include/esp_phy_init.h
View File

@ -181,6 +181,11 @@ void esp_phy_load_cal_and_init(void);
*/
void esp_mac_bb_pd_mem_init(void);
/**
* @brief Deinitialize backup memory for MAC and Baseband power up/down
*/
void esp_mac_bb_pd_mem_deinit(void);
/**
* @brief Power up MAC and Baseband
*/

2
components/esp_phy/lib

@ -1 +1 @@
Subproject commit c0491ee7cc60288244268b04b523637a6e297739
Subproject commit d8ee8f776acd1aafdfc3046f526db024b175b094

24
components/esp_phy/src/phy_init.c
View File

@ -36,6 +36,8 @@
#include "soc/syscon_reg.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "soc/syscon_reg.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "soc/syscon_reg.h"
#endif
#if CONFIG_IDF_TARGET_ESP32
@ -46,10 +48,12 @@ static const char* TAG = "phy_init";
static _lock_t s_phy_access_lock;
#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
static DRAM_ATTR struct {
int count; /* power on count of wifi and bt power domain */
_lock_t lock;
} s_wifi_bt_pd_controller = { .count = 0 };
#endif
/* Indicate PHY is calibrated or not */
static bool s_is_phy_calibrated = false;
@ -75,6 +79,8 @@ static uint32_t* s_phy_digital_regs_mem = NULL;
#if CONFIG_MAC_BB_PD
uint32_t* s_mac_bb_pd_mem = NULL;
/* Reference count of MAC BB backup memory */
static uint8_t s_backup_mem_ref = 0;
#endif
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
@ -282,6 +288,7 @@ void esp_phy_disable(void)
void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
{
#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
_lock_acquire(&s_wifi_bt_pd_controller.lock);
if (s_wifi_bt_pd_controller.count++ == 0) {
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
@ -292,16 +299,19 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);
}
_lock_release(&s_wifi_bt_pd_controller.lock);
#endif
}
void esp_wifi_bt_power_domain_off(void)
{
#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
_lock_acquire(&s_wifi_bt_pd_controller.lock);
if (--s_wifi_bt_pd_controller.count == 0) {
SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);
SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
}
_lock_release(&s_wifi_bt_pd_controller.lock);
#endif
}
#if CONFIG_MAC_BB_PD
@ -309,6 +319,7 @@ void esp_mac_bb_pd_mem_init(void)
{
_lock_acquire(&s_phy_access_lock);
s_backup_mem_ref++;
if (s_mac_bb_pd_mem == NULL) {
s_mac_bb_pd_mem = (uint32_t *)heap_caps_malloc(SOC_MAC_BB_PD_MEM_SIZE, MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
}
@ -316,6 +327,19 @@ void esp_mac_bb_pd_mem_init(void)
_lock_release(&s_phy_access_lock);
}
void esp_mac_bb_pd_mem_deinit(void)
{
_lock_acquire(&s_phy_access_lock);
s_backup_mem_ref--;
if (s_backup_mem_ref == 0) {
free(s_mac_bb_pd_mem);
s_mac_bb_pd_mem = NULL;
}
_lock_release(&s_phy_access_lock);
}
IRAM_ATTR void esp_mac_bb_power_up(void)
{
if (s_mac_bb_pd_mem == NULL) {

2
components/esp_rom/esp32c2/ld/esp32c2.rom.ld
View File

@ -2448,7 +2448,7 @@ rfpll_cap_track = 0x40002538;
phy_param_track = 0x4000253c;
txpwr_correct = 0x40002540;
txpwr_cal_track = 0x40002544;
tx_pwctrl_background = 0x40002548;
/* tx_pwctrl_background = 0x40002548;*/
bt_track_tx_power = 0x4000254c;
wifi_track_tx_power = 0x40002550;
rom_code_to_temp = 0x40002554;

388
components/esp_rom/esp32c2/ld/esp32c2.rom.mbedtls.ld
View File

@ -19,395 +19,7 @@
***************************************/
/* Functions */
mbedtls_aes_init = 0x40002664;
ssl_write_client_hello = 0x40002668;
ssl_parse_server_hello = 0x4000266c;
ssl_parse_server_key_exchange = 0x40002670;
ssl_parse_certificate_request = 0x40002674;
ssl_parse_server_hello_done = 0x40002678;
ssl_write_client_key_exchange = 0x4000267c;
ssl_write_certificate_verify = 0x40002680;
ssl_parse_new_session_ticket = 0x40002684;
mbedtls_aes_free = 0x40002688;
mbedtls_aes_setkey_enc = 0x4000268c;
mbedtls_aes_setkey_dec = 0x40002690;
mbedtls_aes_crypt_ecb = 0x40002694;
mbedtls_aes_crypt_cbc = 0x40002698;
mbedtls_internal_aes_encrypt = 0x4000269c;
mbedtls_internal_aes_decrypt = 0x400026a0;
mbedtls_asn1_get_len = 0x400026a4;
mbedtls_asn1_get_tag = 0x400026a8;
mbedtls_asn1_get_bool = 0x400026ac;
mbedtls_asn1_get_int = 0x400026b0;
mbedtls_asn1_get_bitstring = 0x400026b4;
mbedtls_asn1_get_bitstring_null = 0x400026b8;
mbedtls_asn1_get_sequence_of = 0x400026bc;
mbedtls_asn1_get_mpi = 0x400026c0;
mbedtls_asn1_get_alg = 0x400026c4;
mbedtls_asn1_get_alg_null = 0x400026c8;
mbedtls_asn1_write_len = 0x400026cc;
mbedtls_asn1_write_tag = 0x400026d0;
mbedtls_asn1_write_mpi = 0x400026d4;
mbedtls_base64_decode = 0x400026d8;
mbedtls_mpi_init = 0x400026dc;
mbedtls_mpi_free = 0x400026e0;
mbedtls_mpi_grow = 0x400026e4;
mbedtls_mpi_shrink = 0x400026e8;
mbedtls_mpi_copy = 0x400026ec;
mbedtls_mpi_safe_cond_assign = 0x400026f0;
mbedtls_mpi_safe_cond_swap = 0x400026f4;
mbedtls_mpi_lset = 0x400026f8;
mbedtls_mpi_get_bit = 0x400026fc;
mbedtls_mpi_set_bit = 0x40002700;
mbedtls_mpi_lsb = 0x40002704;
mbedtls_mpi_bitlen = 0x40002708;
mbedtls_mpi_size = 0x4000270c;
mbedtls_mpi_read_binary = 0x40002710;
mbedtls_mpi_write_binary = 0x40002714;
mbedtls_mpi_shift_l = 0x40002718;
mbedtls_mpi_shift_r = 0x4000271c;
mbedtls_mpi_cmp_abs = 0x40002720;
mbedtls_mpi_cmp_mpi = 0x40002724;
mbedtls_mpi_lt_mpi_ct = 0x40002728;
mbedtls_mpi_cmp_int = 0x4000272c;
mbedtls_mpi_add_abs = 0x40002730;
mbedtls_mpi_sub_abs = 0x40002734;
mbedtls_mpi_add_mpi = 0x40002738;
mbedtls_mpi_sub_mpi = 0x4000273c;
mbedtls_mpi_add_int = 0x40002740;
mbedtls_mpi_sub_int = 0x40002744;
mbedtls_mpi_mul_mpi = 0x40002748;
mbedtls_mpi_mul_int = 0x4000274c;
mbedtls_mpi_div_mpi = 0x40002750;
mbedtls_mpi_div_int = 0x40002754;
mbedtls_mpi_mod_mpi = 0x40002758;
mbedtls_mpi_mod_int = 0x4000275c;
mbedtls_mpi_exp_mod = 0x40002760;
mbedtls_mpi_fill_random = 0x40002764;
mbedtls_mpi_gcd = 0x40002768;
mbedtls_mpi_inv_mod = 0x4000276c;
mbedtls_mpi_is_prime_ext = 0x40002770;
mbedtls_ccm_star_encrypt_and_tag = 0x40002774;
mbedtls_ccm_star_auth_decrypt = 0x40002778;
mbedtls_cipher_init = 0x4000277c;
mbedtls_cipher_set_padding_mode = 0x40002780;
mbedtls_cipher_reset = 0x40002784;
mbedtls_cipher_finish = 0x40002788;
mbedtls_cipher_crypt = 0x4000278c;
mbedtls_cipher_cmac_starts = 0x40002790;
mbedtls_cipher_cmac_update = 0x40002794;
mbedtls_cipher_cmac_finish = 0x40002798;
mbedtls_ctr_drbg_init = 0x4000279c;
mbedtls_ctr_drbg_seed = 0x400027a0;
mbedtls_ctr_drbg_free = 0x400027a4;
mbedtls_ctr_drbg_reseed = 0x400027a8;
mbedtls_ctr_drbg_random_with_add = 0x400027ac;
mbedtls_ctr_drbg_random = 0x400027b0;
mbedtls_dhm_init = 0x400027b4;
mbedtls_dhm_read_params = 0x400027b8;
mbedtls_dhm_make_public = 0x400027bc;
mbedtls_dhm_calc_secret = 0x400027c0;
mbedtls_dhm_free = 0x400027c4;
mbedtls_ecdh_init = 0x400027c8;
mbedtls_ecdh_setup = 0x400027cc;
mbedtls_ecdh_free = 0x400027d0;
mbedtls_ecdh_read_params = 0x400027d4;
mbedtls_ecdh_get_params = 0x400027d8;
mbedtls_ecdh_make_public = 0x400027dc;
mbedtls_ecdh_calc_secret = 0x400027e0;
mbedtls_ecdh_enable_restart = 0x400027e4;
mbedtls_ecdsa_write_signature = 0x400027e8;
mbedtls_ecdsa_write_signature_restartable = 0x400027ec;
mbedtls_ecdsa_read_signature = 0x400027f0;
mbedtls_ecdsa_read_signature_restartable = 0x400027f4;
mbedtls_ecdsa_from_keypair = 0x400027f8;
mbedtls_ecdsa_init = 0x400027fc;
mbedtls_ecdsa_free = 0x40002800;
mbedtls_ecdsa_restart_init = 0x40002804;
mbedtls_ecdsa_restart_free = 0x40002808;
mbedtls_ecjpake_init = 0x4000280c;
mbedtls_ecjpake_check = 0x40002810;
mbedtls_ecjpake_write_round_one = 0x40002814;
mbedtls_ecjpake_read_round_one = 0x40002818;
mbedtls_ecjpake_write_round_two = 0x4000281c;
mbedtls_ecjpake_read_round_two = 0x40002820;
mbedtls_ecjpake_derive_secret = 0x40002824;
mbedtls_ecjpake_free = 0x40002828;
mbedtls_ecp_check_budget = 0x4000282c;
mbedtls_ecp_restart_is_enabled = 0x40002830;
mbedtls_ecp_curve_list = 0x40002834;
mbedtls_ecp_grp_id_list = 0x40002838;
mbedtls_ecp_curve_info_from_grp_id = 0x4000283c;
mbedtls_ecp_curve_info_from_tls_id = 0x40002840;
mbedtls_ecp_point_init = 0x40002844;
mbedtls_ecp_group_init = 0x40002848;
mbedtls_ecp_keypair_init = 0x4000284c;
mbedtls_ecp_point_free = 0x40002850;
mbedtls_ecp_group_free = 0x40002854;
mbedtls_ecp_keypair_free = 0x40002858;
mbedtls_ecp_restart_init = 0x4000285c;
mbedtls_ecp_restart_free = 0x40002860;
mbedtls_ecp_copy = 0x40002864;
mbedtls_ecp_group_copy = 0x40002868;
mbedtls_ecp_set_zero = 0x4000286c;
mbedtls_ecp_is_zero = 0x40002870;
mbedtls_ecp_point_cmp = 0x40002874;
mbedtls_ecp_point_write_binary = 0x40002878;
mbedtls_ecp_point_read_binary = 0x4000287c;
mbedtls_ecp_tls_read_point = 0x40002880;
mbedtls_ecp_tls_write_point = 0x40002884;
mbedtls_ecp_group_load = 0x40002888;
mbedtls_ecp_tls_read_group = 0x4000288c;
mbedtls_ecp_tls_read_group_id = 0x40002890;
mbedtls_ecp_tls_write_group = 0x40002894;
mbedtls_ecp_mul = 0x40002898;
mbedtls_ecp_mul_restartable = 0x4000289c;
mbedtls_ecp_muladd = 0x400028a0;
mbedtls_ecp_muladd_restartable = 0x400028a4;
mbedtls_ecp_check_pubkey = 0x400028a8;
mbedtls_ecp_check_privkey = 0x400028ac;
mbedtls_ecp_gen_privkey = 0x400028b0;
mbedtls_ecp_gen_keypair_base = 0x400028b4;
mbedtls_ecp_check_pub_priv = 0x400028b8;
mbedtls_entropy_add_source = 0x400028bc;
mbedtls_entropy_func = 0x400028c0;
mbedtls_gcm_crypt_and_tag = 0x400028c4;
mbedtls_gcm_starts = 0x400028c8;
mbedtls_gcm_update = 0x400028cc;
mbedtls_gcm_finish = 0x400028d0;
mbedtls_hmac_drbg_init = 0x400028d4;
mbedtls_hmac_drbg_seed_buf = 0x400028d8;
mbedtls_hmac_drbg_update_ret = 0x400028dc;
mbedtls_hmac_drbg_reseed = 0x400028e0;
mbedtls_hmac_drbg_random_with_add = 0x400028e4;
mbedtls_hmac_drbg_random = 0x400028e8;
mbedtls_hmac_drbg_free = 0x400028ec;
mbedtls_md_list = 0x400028f0;
mbedtls_md_init = 0x400028f4;
mbedtls_md_free = 0x400028f8;
mbedtls_md_setup = 0x400028fc;
mbedtls_md_clone = 0x40002900;
mbedtls_md_get_size = 0x40002904;
mbedtls_md_get_type = 0x40002908;
mbedtls_md_starts = 0x4000290c;
mbedtls_md_update = 0x40002910;
mbedtls_md_finish = 0x40002914;
mbedtls_md = 0x40002918;
mbedtls_md_hmac_starts = 0x4000291c;
mbedtls_md_hmac_update = 0x40002920;
mbedtls_md_hmac_finish = 0x40002924;
mbedtls_md_hmac_reset = 0x40002928;
mbedtls_oid_get_x509_ext_type = 0x4000292c;
mbedtls_oid_get_pk_alg = 0x40002930;
mbedtls_oid_get_ec_grp = 0x40002934;
mbedtls_oid_get_sig_alg = 0x40002938;
mbedtls_oid_get_md_alg = 0x4000293c;
mbedtls_oid_get_md_hmac = 0x40002940;
mbedtls_oid_get_oid_by_md = 0x40002944;
mbedtls_oid_get_cipher_alg = 0x40002948;
mbedtls_oid_get_pkcs12_pbe_alg = 0x4000294c;
mbedtls_pem_init = 0x40002950;
mbedtls_pem_free = 0x40002954;
mbedtls_pkcs12_pbe_sha1_rc4_128 = 0x40002958;
mbedtls_pkcs12_pbe = 0x4000295c;
mbedtls_pkcs12_derivation = 0x40002960;
mbedtls_pkcs5_pbes2 = 0x40002964;
mbedtls_pkcs5_pbkdf2_hmac = 0x40002968;
mbedtls_pk_info_from_type = 0x4000296c;
mbedtls_pk_init = 0x40002970;
mbedtls_pk_free = 0x40002974;
mbedtls_pk_restart_init = 0x40002978;
mbedtls_pk_restart_free = 0x4000297c;
mbedtls_pk_setup = 0x40002980;
mbedtls_pk_can_do = 0x40002984;
mbedtls_pk_verify = 0x40002988;
mbedtls_pk_verify_restartable = 0x4000298c;
mbedtls_pk_verify_ext = 0x40002990;
mbedtls_pk_sign_restartable = 0x40002994;
mbedtls_pk_encrypt = 0x40002998;
mbedtls_pk_get_type = 0x4000299c;
mbedtls_pk_parse_subpubkey = 0x400029a0;
mbedtls_rsa_init = 0x400029a4;
mbedtls_rsa_import = 0x400029a8;
mbedtls_rsa_import_raw = 0x400029ac;
mbedtls_rsa_complete = 0x400029b0;
mbedtls_rsa_set_padding = 0x400029b4;
mbedtls_rsa_get_len = 0x400029b8;
mbedtls_rsa_check_pubkey = 0x400029bc;
mbedtls_rsa_check_privkey = 0x400029c0;
mbedtls_rsa_check_pub_priv = 0x400029c4;
mbedtls_rsa_public = 0x400029c8;
mbedtls_rsa_private = 0x400029cc;
mbedtls_rsa_pkcs1_encrypt = 0x400029d0;
mbedtls_rsa_rsaes_pkcs1_v15_encrypt = 0x400029d4;
mbedtls_rsa_rsaes_oaep_encrypt = 0x400029d8;
mbedtls_rsa_pkcs1_decrypt = 0x400029dc;
mbedtls_rsa_rsaes_pkcs1_v15_decrypt = 0x400029e0;
mbedtls_rsa_rsaes_oaep_decrypt = 0x400029e4;
mbedtls_rsa_pkcs1_sign = 0x400029e8;
mbedtls_rsa_rsassa_pkcs1_v15_sign = 0x400029ec;
mbedtls_rsa_rsassa_pss_sign = 0x400029f0;
mbedtls_rsa_pkcs1_verify = 0x400029f4;
mbedtls_rsa_rsassa_pkcs1_v15_verify = 0x400029f8;
mbedtls_rsa_rsassa_pss_verify = 0x400029fc;
mbedtls_rsa_rsassa_pss_verify_ext = 0x40002a00;
mbedtls_rsa_free = 0x40002a04;
mbedtls_rsa_deduce_primes = 0x40002a08;
mbedtls_rsa_deduce_private_exponent = 0x40002a0c;
mbedtls_rsa_deduce_crt = 0x40002a10;
mbedtls_rsa_validate_params = 0x40002a14;
mbedtls_rsa_validate_crt = 0x40002a18;
mbedtls_sha1_init = 0x40002a1c;
mbedtls_sha1_free = 0x40002a20;
mbedtls_sha1_clone = 0x40002a24;
mbedtls_sha1_starts_ret = 0x40002a28;
mbedtls_sha1_finish_ret = 0x40002a2c;
mbedtls_sha256_init = 0x40002a30;
mbedtls_sha256_free = 0x40002a34;
mbedtls_sha256_clone = 0x40002a38;
mbedtls_sha256_starts_ret = 0x40002a3c;
mbedtls_sha256_finish_ret = 0x40002a40;
mbedtls_sha256_ret = 0x40002a44;
mbedtls_sha512_init = 0x40002a48;
mbedtls_sha512_free = 0x40002a4c;
mbedtls_sha512_clone = 0x40002a50;
mbedtls_sha512_starts_ret = 0x40002a54;
mbedtls_sha512_update_ret = 0x40002a58;
mbedtls_sha512_finish_ret = 0x40002a5c;
mbedtls_internal_sha512_process = 0x40002a60;
mbedtls_sha512_ret = 0x40002a64;
mbedtls_ssl_conf_endpoint = 0x40002a68;
mbedtls_ssl_conf_transport = 0x40002a6c;
mbedtls_ssl_set_bio = 0x40002a70;
mbedtls_ssl_conf_dh_param_bin = 0x40002a74;
mbedtls_ssl_get_max_frag_len = 0x40002a78;
mbedtls_ssl_get_max_out_record_payload = 0x40002a7c;
mbedtls_ssl_handshake = 0x40002a80;
mbedtls_ssl_handshake_step = 0x40002a84;
mbedtls_ssl_renegotiate = 0x40002a88;
mbedtls_ssl_send_alert_message = 0x40002a8c;
mbedtls_ssl_config_defaults = 0x40002a90;
mbedtls_ssl_session_init = 0x40002a94;
mbedtls_ssl_session_free = 0x40002a98;
mbedtls_ssl_transform_free = 0x40002a9c;
mbedtls_ssl_handshake_free = 0x40002aa0;
mbedtls_ssl_handshake_client_step = 0x40002aa4;
mbedtls_ssl_handshake_wrapup = 0x40002aa8;
mbedtls_ssl_derive_keys = 0x40002aac;
mbedtls_ssl_handle_message_type = 0x40002ab0;
mbedtls_ssl_prepare_handshake_record = 0x40002ab4;
mbedtls_ssl_update_handshake_status = 0x40002ab8;
mbedtls_ssl_read_record = 0x40002abc;
mbedtls_ssl_fetch_input = 0x40002ac0;
mbedtls_ssl_write_handshake_msg = 0x40002ac4;
mbedtls_ssl_write_record = 0x40002ac8;
mbedtls_ssl_flush_output = 0x40002acc;
mbedtls_ssl_parse_certificate = 0x40002ad0;
mbedtls_ssl_write_certificate = 0x40002ad4;
mbedtls_ssl_parse_change_cipher_spec = 0x40002ad8;
mbedtls_ssl_write_change_cipher_spec = 0x40002adc;
mbedtls_ssl_parse_finished = 0x40002ae0;
mbedtls_ssl_write_finished = 0x40002ae4;
mbedtls_ssl_optimize_checksum = 0x40002ae8;
mbedtls_ssl_psk_derive_premaster = 0x40002aec;
mbedtls_ssl_sig_from_pk = 0x40002af0;
mbedtls_ssl_pk_alg_from_sig = 0x40002af4;
mbedtls_ssl_md_alg_from_hash = 0x40002af8;
mbedtls_ssl_hash_from_md_alg = 0x40002afc;
mbedtls_ssl_check_curve = 0x40002b00;
mbedtls_ssl_check_sig_hash = 0x40002b04;
mbedtls_ssl_write_version = 0x40002b08;
mbedtls_ssl_read_version = 0x40002b0c;
mbedtls_ssl_get_key_exchange_md_ssl_tls = 0x40002b10;
mbedtls_ssl_get_key_exchange_md_tls1_2 = 0x40002b14;
mbedtls_ssl_cf_hmac = 0x40002b18;
mbedtls_ssl_cf_memcpy_offset = 0x40002b1c;
mbedtls_x509_crt_parse_der = 0x40002b20;
mbedtls_x509_crt_verify_restartable = 0x40002b24;
mbedtls_x509_crt_check_key_usage = 0x40002b28;
mbedtls_x509_crt_check_extended_key_usage = 0x40002b2c;
mbedtls_x509_crt_is_revoked = 0x40002b30;
mbedtls_x509_crt_init = 0x40002b34;
mbedtls_x509_crt_free = 0x40002b38;
mbedtls_x509_crt_restart_init = 0x40002b3c;
mbedtls_x509_crt_restart_free = 0x40002b40;
mbedtls_x509_get_name = 0x40002b44;
mbedtls_x509_get_alg_null = 0x40002b48;
mbedtls_x509_get_alg = 0x40002b4c;
mbedtls_x509_get_rsassa_pss_params = 0x40002b50;
mbedtls_x509_get_sig = 0x40002b54;
mbedtls_x509_get_sig_alg = 0x40002b58;
mbedtls_x509_get_time = 0x40002b5c;
mbedtls_x509_get_serial = 0x40002b60;
mbedtls_x509_get_ext = 0x40002b64;
mbedtls_aes_xts_init = 0x40002b68;
mbedtls_aes_xts_free = 0x40002b6c;
mbedtls_aes_xts_setkey_enc = 0x40002b70;
mbedtls_aes_xts_setkey_dec = 0x40002b74;
mbedtls_aes_crypt_xts = 0x40002b78;
mbedtls_aes_crypt_cfb128 = 0x40002b7c;
mbedtls_aes_crypt_ofb = 0x40002b80;
mbedtls_aes_crypt_ctr = 0x40002b84;
mbedtls_arc4_init = 0x40002b88;
mbedtls_arc4_free = 0x40002b8c;
mbedtls_arc4_setup = 0x40002b90;
mbedtls_arc4_crypt = 0x40002b94;
mbedtls_ccm_init = 0x40002b98;
mbedtls_ccm_setkey = 0x40002b9c;
mbedtls_ccm_free = 0x40002ba0;
mbedtls_ccm_encrypt_and_tag = 0x40002ba4;
mbedtls_ccm_auth_decrypt = 0x40002ba8;
mbedtls_dhm_make_params = 0x40002bac;
mbedtls_dhm_set_group = 0x40002bb0;
mbedtls_dhm_read_public = 0x40002bb4;
mbedtls_ecdh_make_params = 0x40002bb8;
mbedtls_ecdh_read_public = 0x40002bbc;
mbedtls_entropy_init = 0x40002bc0;
mbedtls_entropy_free = 0x40002bc4;
mbedtls_gcm_init = 0x40002bc8;
mbedtls_gcm_setkey = 0x40002bcc;
mbedtls_gcm_auth_decrypt = 0x40002bd0;
mbedtls_gcm_free = 0x40002bd4;
mbedtls_md5_init = 0x40002bd8;
mbedtls_md5_free = 0x40002bdc;
mbedtls_md5_clone = 0x40002be0;
mbedtls_md5_starts_ret = 0x40002be4;
mbedtls_md5_update_ret = 0x40002be8;
mbedtls_md5_finish_ret = 0x40002bec;
mbedtls_internal_md5_process = 0x40002bf0;
mbedtls_md5_ret = 0x40002bf4;
mbedtls_pk_get_bitlen = 0x40002bf8;
mbedtls_pk_sign = 0x40002bfc;
mbedtls_pk_decrypt = 0x40002c00;
mbedtls_pk_parse_key = 0x40002c04;
mbedtls_sha1_ret = 0x40002c08;
mbedtls_ssl_init = 0x40002c0c;
mbedtls_ssl_setup = 0x40002c10;
mbedtls_ssl_conf_authmode = 0x40002c14;
mbedtls_ssl_conf_rng = 0x40002c18;
mbedtls_ssl_conf_ca_chain = 0x40002c1c;
mbedtls_ssl_conf_own_cert = 0x40002c20;
mbedtls_ssl_read = 0x40002c24;
mbedtls_ssl_write = 0x40002c28;
mbedtls_ssl_config_init = 0x40002c2c;
mbedtls_ssl_sig_hash_set_find = 0x40002c30;
mbedtls_ssl_sig_hash_set_add = 0x40002c34;
mbedtls_ssl_sig_hash_set_const_hash = 0x40002c38;
mbedtls_ssl_sig_from_pk_alg = 0x40002c3c;
mbedtls_ssl_set_calc_verify_md = 0x40002c40;
mbedtls_x509_crt_parse = 0x40002c44;
/* Data (.data, .bss, .rodata) */
p_osi_mbedtls_rom_funcs = 0x3fcdfaa0;
mbedtls_x509_crt_profile_default = 0x3ff4fba4;
mbedtls_x509_crt_profile_suiteb = 0x3ff4fb94;
aes_FSb_ptr = 0x3fcdfa9c;
AES_RT0_ptr = 0x3fcdfa98;
AES_RT1_ptr = 0x3fcdfa94;
AES_RT2_ptr = 0x3fcdfa90;
AES_RT3_ptr = 0x3fcdfa8c;
AES_FT0_ptr = 0x3fcdfa88;
AES_FT1_ptr = 0x3fcdfa84;
AES_FT2_ptr = 0x3fcdfa80;
AES_FT3_ptr = 0x3fcdfa7c;
bignum_small_prime_ptr = 0x3fcdfa78;
sha512_K_ptr = 0x3fcdfa74;

4
components/esp_rom/esp32c3/ld/esp32c3.rom.eco3.ld
View File

@ -6,10 +6,10 @@ Version 3 API's imported from the ROM
esf_buf_alloc_dynamic = 0x400015c0;
esf_buf_recycle = 0x400015c4;
/*lmacTxDone = 0x4000162c;*/
ppMapTxQueue = 0x400016d8;
/*ppMapTxQueue = 0x400016d8;*/
rcGetSched = 0x40001764;
wDevCheckBlockError = 0x400017b4;
ppProcTxDone = 0x40001804;
/*ppProcTxDone = 0x40001804;*/
sta_input = rom_sta_input;
/***************************************

6
components/esp_rom/esp32c3/ld/esp32c3.rom.ld
View File

@ -1526,7 +1526,7 @@ lmacReachShortLimit = 0x4000161c;
lmacRecycleMPDU = 0x40001620;
lmacRxDone = 0x40001624;
lmacSetTxFrame = 0x40001628;
lmacTxFrame = 0x40001630;
/*lmacTxFrame = 0x40001630;*/
mac_tx_set_duration = 0x40001634;
/* mac_tx_set_htsig = 0x40001638;*/
mac_tx_set_plcp0 = 0x4000163c;
@ -1554,7 +1554,7 @@ pm_rx_beacon_process = 0x40001690;
pm_rx_data_process = 0x40001694;
/*pm_sleep = 0x40001698;*/
pm_sleep_for = 0x4000169c;
pm_tbtt_process = 0x400016a0;
/*pm_tbtt_process = 0x400016a0;*/
ppAMPDU2Normal = 0x400016a4;
ppAssembleAMPDU = 0x400016a8;
ppCalFrameTimes = 0x400016ac;
@ -1762,7 +1762,7 @@ coex_core_pti_get = 0x400018c0;
coex_core_release = 0x400018c4;
coex_core_request = 0x400018c8;
coex_core_status_get = 0x400018cc;
coex_core_timer_idx_get = 0x400018d0;
/*coex_core_timer_idx_get = 0x400018d0;*/
coex_event_duration_get = 0x400018d4;
coex_hw_timer_disable = 0x400018d8;
coex_hw_timer_enable = 0x400018dc;

10
components/esp_rom/esp32s3/ld/esp32s3.rom.ld
View File

@ -1831,7 +1831,7 @@ lmacRecycleMPDU = 0x400053a0;
lmacRxDone = 0x400053ac;
lmacSetTxFrame = 0x400053b8;
lmacTxDone = 0x400053c4;
lmacTxFrame = 0x400053d0;
/*lmacTxFrame = 0x400053d0;*/
mac_tx_set_duration = 0x400053dc;
/* mac_tx_set_htsig = 0x400053e8;*/
mac_tx_set_plcp0 = 0x400053f4;
@ -1859,7 +1859,7 @@ pm_rx_beacon_process = 0x400054f0;
pm_rx_data_process = 0x400054fc;
/*pm_sleep = 0x40005508;*/
pm_sleep_for = 0x40005514;
pm_tbtt_process = 0x40005520;
/*pm_tbtt_process = 0x40005520;*/
ppAMPDU2Normal = 0x4000552c;
ppAssembleAMPDU = 0x40005538;
ppCalFrameTimes = 0x40005544;
@ -1873,7 +1873,7 @@ ppEnqueueRxq = 0x40005598;
ppEnqueueTxDone = 0x400055a4;
ppGetTxQFirstAvail_Locked = 0x400055b0;
ppGetTxframe = 0x400055bc;
ppMapTxQueue = 0x400055c8;
/*ppMapTxQueue = 0x400055c8;*/
ppProcessRxPktHdr = 0x400055e0;
ppProcessTxQ = 0x400055ec;
ppRecordBarRRC = 0x400055f8;
@ -1947,7 +1947,7 @@ wDev_ProcessRxSucData = 0x4000591c;
wdevProcessRxSucDataAll = 0x40005928;
wdev_csi_len_align = 0x40005934;
ppDequeueTxDone_Locked = 0x40005940;
ppProcTxDone = 0x4000594c;
/*ppProcTxDone = 0x4000594c;*/
/*pm_tx_data_done_process = 0x40005958;*/
config_is_cache_tx_buf_enabled = 0x40005964;
ppMapWaitTxq = 0x40005970;
@ -2074,7 +2074,7 @@ coex_core_pti_get = 0x40005ba4;
coex_core_release = 0x40005bb0;
coex_core_request = 0x40005bbc;
coex_core_status_get = 0x40005bc8;
coex_core_timer_idx_get = 0x40005bd4;
/*coex_core_timer_idx_get = 0x40005bd4;*/
coex_event_duration_get = 0x40005be0;
coex_hw_timer_disable = 0x40005bec;
coex_hw_timer_enable = 0x40005bf8;

6
components/esp_wifi/CMakeLists.txt
View File

@ -41,7 +41,11 @@ if(CONFIG_ESP32_WIFI_ENABLED)
target_link_libraries(${COMPONENT_LIB} PUBLIC "-L \"${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}\"")
if(link_binary_libs)
set(blobs coexist core espnow mesh net80211 pp smartconfig wapi)
if(CONFIG_IDF_TARGET_ESP32C2)
set(blobs coexist core espnow net80211 pp smartconfig)
else()
set(blobs coexist core espnow mesh net80211 pp smartconfig wapi)
endif()
foreach(blob ${blobs})
add_prebuilt_library(${blob} "${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}/lib${blob}.a"

7
components/esp_wifi/Kconfig
View File

@ -4,8 +4,7 @@ menu "Wi-Fi"
config ESP32_WIFI_ENABLED
bool
default "n" if IDF_TARGET_ESP32C2 # TODO: replace with SOC_CAPS_SUPPORT_WIFI after IDF-2223 is done
default "y" if !IDF_TARGET_ESP32H2
default y if SOC_WIFI_SUPPORTED
config ESP32_WIFI_SW_COEXIST_ENABLE
bool "Software controls WiFi/Bluetooth coexistence"
@ -282,7 +281,7 @@ menu "Wi-Fi"
config ESP_WIFI_FTM_ENABLE
bool "WiFi FTM"
default n
depends on (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3)
depends on SOC_WIFI_FTM_SUPPORT
help
Enable feature Fine Timing Measurement for calculating WiFi Round-Trip-Time (RTT).
@ -317,7 +316,7 @@ menu "Wi-Fi"
config ESP_WIFI_GCMP_SUPPORT
bool "WiFi GCMP Support(GCMP128 and GCMP256)"
default n
depends on (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3)
depends on SOC_WIFI_GCMP_SUPPORT
help
Select this option to enable GCMP support. GCMP support is compulsory for WiFi Suite-B support.

10
components/esp_wifi/esp32/esp_adapter.c
View File

@ -646,6 +646,15 @@ static int coex_schm_curr_phase_idx_get_wrapper(void)
#endif
}
static int coex_register_start_cb_wrapper(int (* cb)(void))
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_register_start_cb(cb);
#else
return 0;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@ -773,6 +782,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
._coex_schm_curr_phase_idx_set = coex_schm_curr_phase_idx_set_wrapper,
._coex_schm_curr_phase_idx_get = coex_schm_curr_phase_idx_get_wrapper,
._coex_register_start_cb = coex_register_start_cb_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};

793
components/esp_wifi/esp32c2/esp_adapter.c Normal file
View File

@ -0,0 +1,793 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <pthread.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "freertos/semphr.h"
#include "freertos/event_groups.h"
#include "freertos/portmacro.h"
#include "riscv/interrupt.h"
#include "riscv/riscv_interrupts.h"
#include "esp_types.h"
#include "esp_random.h"
#include "esp_mac.h"
#include "esp_task.h"
#include "esp_intr_alloc.h"
#include "esp_attr.h"
#include "esp_log.h"
#include "esp_event.h"
#include "esp_heap_caps.h"
#include "esp_timer.h"
#include "esp_private/wifi_os_adapter.h"
#include "esp_private/wifi.h"
#include "esp_phy_init.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/rtc.h"
#include "soc/syscon_reg.h"
#include "phy_init_data.h"
#include "esp_private/periph_ctrl.h"
#include "esp_private/esp_clk.h"
#include "nvs.h"
#include "os.h"
#include "esp_smartconfig.h"
#include "esp_coexist_internal.h"
#include "esp_coexist_adapter.h"
#include "esp32c2/rom/ets_sys.h"
#define TAG "esp_adapter"
#ifdef CONFIG_PM_ENABLE
extern void wifi_apb80m_request(void);
extern void wifi_apb80m_release(void);
#endif
IRAM_ATTR void *wifi_malloc( size_t size )
{
return malloc(size);
}
IRAM_ATTR void *wifi_realloc( void *ptr, size_t size )
{
return realloc(ptr, size);
}
IRAM_ATTR void *wifi_calloc( size_t n, size_t size )
{
return calloc(n, size);
}
static void * IRAM_ATTR wifi_zalloc_wrapper(size_t size)
{
void *ptr = wifi_calloc(1, size);
return ptr;
}
wifi_static_queue_t* wifi_create_queue( int queue_len, int item_size)
{
wifi_static_queue_t *queue = NULL;
queue = (wifi_static_queue_t*)heap_caps_malloc(sizeof(wifi_static_queue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
if (!queue) {
return NULL;
}
queue->handle = xQueueCreate( queue_len, item_size);
return queue;
}
void wifi_delete_queue(wifi_static_queue_t *queue)
{
if (queue) {
vQueueDelete(queue->handle);
free(queue);
}
}
static void * wifi_create_queue_wrapper(int queue_len, int item_size)
{
return wifi_create_queue(queue_len, item_size);
}
static void wifi_delete_queue_wrapper(void *queue)
{
wifi_delete_queue(queue);
}
static bool IRAM_ATTR env_is_chip_wrapper(void)
{
#ifdef CONFIG_IDF_ENV_FPGA
return false;
#else
return true;
#endif
}
static void set_intr_wrapper(int32_t cpu_no, uint32_t intr_source, uint32_t intr_num, int32_t intr_prio)
{
intr_matrix_route(intr_source, intr_num);
esprv_intc_int_set_priority(intr_num, intr_prio);
esprv_intc_int_set_type(intr_num, INTR_TYPE_LEVEL);
}
static void clear_intr_wrapper(uint32_t intr_source, uint32_t intr_num)
{
}
static void set_isr_wrapper(int32_t n, void *f, void *arg)
{
intr_handler_set(n, (intr_handler_t)f, arg);
}
static void enable_intr_wrapper(uint32_t intr_mask)
{
esprv_intc_int_enable(intr_mask);
}
static void disable_intr_wrapper(uint32_t intr_mask)
{
esprv_intc_int_disable(intr_mask);
}
static void * spin_lock_create_wrapper(void)
{
portMUX_TYPE tmp = portMUX_INITIALIZER_UNLOCKED;
void *mux = malloc(sizeof(portMUX_TYPE));
if (mux) {
memcpy(mux,&tmp,sizeof(portMUX_TYPE));
return mux;
}
return NULL;
}
static uint32_t IRAM_ATTR wifi_int_disable_wrapper(void *wifi_int_mux)
{
if (xPortInIsrContext()) {
portENTER_CRITICAL_ISR(wifi_int_mux);
} else {
portENTER_CRITICAL(wifi_int_mux);
}
return 0;
}
static void IRAM_ATTR wifi_int_restore_wrapper(void *wifi_int_mux, uint32_t tmp)
{
if (xPortInIsrContext()) {
portEXIT_CRITICAL_ISR(wifi_int_mux);
} else {
portEXIT_CRITICAL(wifi_int_mux);
}
}
static bool IRAM_ATTR is_from_isr_wrapper(void)
{
return !xPortCanYield();
}
static void IRAM_ATTR task_yield_from_isr_wrapper(void)
{
portYIELD_FROM_ISR();
}
static void * semphr_create_wrapper(uint32_t max, uint32_t init)
{
return (void *)xSemaphoreCreateCounting(max, init);
}
static void semphr_delete_wrapper(void *semphr)
{
vSemaphoreDelete(semphr);
}
static void wifi_thread_semphr_free(void* data)
{
SemaphoreHandle_t *sem = (SemaphoreHandle_t*)(data);
if (sem) {
vSemaphoreDelete(sem);
}
}
static void * wifi_thread_semphr_get_wrapper(void)
{
static bool s_wifi_thread_sem_key_init = false;
static pthread_key_t s_wifi_thread_sem_key;
SemaphoreHandle_t sem = NULL;
if (s_wifi_thread_sem_key_init == false) {
if (0 != pthread_key_create(&s_wifi_thread_sem_key, wifi_thread_semphr_free)) {
return NULL;
}
s_wifi_thread_sem_key_init = true;
}
sem = pthread_getspecific(s_wifi_thread_sem_key);
if (!sem) {
sem = xSemaphoreCreateCounting(1, 0);
if (sem) {
pthread_setspecific(s_wifi_thread_sem_key, sem);
ESP_LOGV(TAG, "thread sem create: sem=%p", sem);
}
}
ESP_LOGV(TAG, "thread sem get: sem=%p", sem);
return (void*)sem;
}
static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
{
return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
}
static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
{
return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
}
static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_tick)
{
if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
} else {
return (int32_t)xSemaphoreTake(semphr, block_time_tick);
}
}
static int32_t semphr_give_wrapper(void *semphr)
{
return (int32_t)xSemaphoreGive(semphr);
}
static void * recursive_mutex_create_wrapper(void)
{
return (void *)xSemaphoreCreateRecursiveMutex();
}
static void * mutex_create_wrapper(void)
{
return (void *)xSemaphoreCreateMutex();
}
static void mutex_delete_wrapper(void *mutex)
{
vSemaphoreDelete(mutex);
}
static int32_t IRAM_ATTR mutex_lock_wrapper(void *mutex)
{
return (int32_t)xSemaphoreTakeRecursive(mutex, portMAX_DELAY);
}
static int32_t IRAM_ATTR mutex_unlock_wrapper(void *mutex)
{
return (int32_t)xSemaphoreGiveRecursive(mutex);
}
static void * queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
{
return (void *)xQueueCreate(queue_len, item_size);
}
static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_tick)
{
if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
} else {
return (int32_t)xQueueSend(queue, item, block_time_tick);
}
}
static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
{
return (int32_t)xQueueSendFromISR(queue, item, hptw);
}
static int32_t queue_send_to_back_wrapper(void *queue, void *item, uint32_t block_time_tick)
{
return (int32_t)xQueueGenericSend(queue, item, block_time_tick, queueSEND_TO_BACK);
}
static int32_t queue_send_to_front_wrapper(void *queue, void *item, uint32_t block_time_tick)
{
return (int32_t)xQueueGenericSend(queue, item, block_time_tick, queueSEND_TO_FRONT);
}
static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_tick)
{
if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
} else {
return (int32_t)xQueueReceive(queue, item, block_time_tick);
}
}
static uint32_t event_group_wait_bits_wrapper(void *event, uint32_t bits_to_wait_for, int clear_on_exit, int wait_for_all_bits, uint32_t block_time_tick)
{
if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
return (uint32_t)xEventGroupWaitBits(event, bits_to_wait_for, clear_on_exit, wait_for_all_bits, portMAX_DELAY);
} else {
return (uint32_t)xEventGroupWaitBits(event, bits_to_wait_for, clear_on_exit, wait_for_all_bits, block_time_tick);
}
}
static int32_t task_create_pinned_to_core_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
{
return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
}
static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle)
{
return (uint32_t)xTaskCreate(task_func, name, stack_depth, param, prio, task_handle);
}
static int32_t IRAM_ATTR task_ms_to_tick_wrapper(uint32_t ms)
{
return (int32_t)(ms / portTICK_PERIOD_MS);
}
static int32_t task_get_max_priority_wrapper(void)
{
return (int32_t)(configMAX_PRIORITIES);
}
static int32_t esp_event_post_wrapper(const char* event_base, int32_t event_id, void* event_data, size_t event_data_size, uint32_t ticks_to_wait)
{
if (ticks_to_wait == OSI_FUNCS_TIME_BLOCKING) {
return (int32_t)esp_event_post(event_base, event_id, event_data, event_data_size, portMAX_DELAY);
} else {
return (int32_t)esp_event_post(event_base, event_id, event_data, event_data_size, ticks_to_wait);
}
}
static void IRAM_ATTR wifi_apb80m_request_wrapper(void)
{
#ifdef CONFIG_PM_ENABLE
wifi_apb80m_request();
#endif
}
static void IRAM_ATTR wifi_apb80m_release_wrapper(void)
{
#ifdef CONFIG_PM_ENABLE
wifi_apb80m_release();
#endif
}
static void IRAM_ATTR timer_arm_wrapper(void *timer, uint32_t tmout, bool repeat)
{
ets_timer_arm(timer, tmout, repeat);
}
static void IRAM_ATTR timer_disarm_wrapper(void *timer)
{
ets_timer_disarm(timer);
}
static void timer_done_wrapper(void *ptimer)
{
ets_timer_done(ptimer);
}
static void timer_setfn_wrapper(void *ptimer, void *pfunction, void *parg)
{
ets_timer_setfn(ptimer, pfunction, parg);
}
static void IRAM_ATTR timer_arm_us_wrapper(void *ptimer, uint32_t us, bool repeat)
{
ets_timer_arm_us(ptimer, us, repeat);
}
static void wifi_reset_mac_wrapper(void)
{
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
}
static void IRAM_ATTR wifi_rtc_enable_iso_wrapper(void)
{
#if CONFIG_MAC_BB_PD
esp_mac_bb_power_down();
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
#endif
}
static void IRAM_ATTR wifi_rtc_disable_iso_wrapper(void)
{
#if CONFIG_MAC_BB_PD
esp_mac_bb_power_up();
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
#endif
}
static void wifi_clock_enable_wrapper(void)
{
wifi_module_enable();
}
static void wifi_clock_disable_wrapper(void)
{
wifi_module_disable();
}
static int get_time_wrapper(void *t)
{
return os_get_time(t);
}
static uint32_t esp_clk_slowclk_cal_get_wrapper(void)
{
/* The bit width of WiFi light sleep clock calibration is 12 while the one of
* system is 19. It should shift 19 - 12 = 7.
*/
return (esp_clk_slowclk_cal_get() >> (RTC_CLK_CAL_FRACT - SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH));
}
static void * IRAM_ATTR malloc_internal_wrapper(size_t size)
{
return heap_caps_malloc(size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
}
static void * IRAM_ATTR realloc_internal_wrapper(void *ptr, size_t size)
{
return heap_caps_realloc(ptr, size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
}
static void * IRAM_ATTR calloc_internal_wrapper(size_t n, size_t size)
{
return heap_caps_calloc(n, size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
}
static void * IRAM_ATTR zalloc_internal_wrapper(size_t size)
{
void *ptr = heap_caps_calloc(1, size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
return ptr;
}
static esp_err_t nvs_open_wrapper(const char* name, uint32_t open_mode, nvs_handle_t *out_handle)
{
return nvs_open(name,(nvs_open_mode_t)open_mode, out_handle);
}
static void esp_log_writev_wrapper(uint32_t level, const char *tag, const char *format, va_list args)
{
return esp_log_writev((esp_log_level_t)level,tag,format,args);
}
static void esp_log_write_wrapper(uint32_t level,const char *tag,const char *format, ...)
{
va_list list;
va_start(list, format);
esp_log_writev((esp_log_level_t)level, tag, format, list);
va_end(list);
}
static esp_err_t esp_read_mac_wrapper(uint8_t* mac, uint32_t type)
{
return esp_read_mac(mac, (esp_mac_type_t)type);
}
static int coex_init_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_init();
#else
return 0;
#endif
}
static void coex_deinit_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
coex_deinit();
#endif
}
static int coex_enable_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_enable();
#else
return 0;
#endif
}
static void coex_disable_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
coex_disable();
#endif
}
static IRAM_ATTR uint32_t coex_status_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_status_get();
#else
return 0;
#endif
}
static void coex_condition_set_wrapper(uint32_t type, bool dissatisfy)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
coex_condition_set(type, dissatisfy);
#endif
}
static int coex_wifi_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_wifi_request(event, latency, duration);
#else
return 0;
#endif
}
static IRAM_ATTR int coex_wifi_release_wrapper(uint32_t event)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_wifi_release(event);
#else
return 0;
#endif
}
static int coex_wifi_channel_set_wrapper(uint8_t primary, uint8_t secondary)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_wifi_channel_set(primary, secondary);
#else
return 0;
#endif
}
static IRAM_ATTR int coex_event_duration_get_wrapper(uint32_t event, uint32_t *duration)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_event_duration_get(event, duration);
#else
return 0;
#endif
}
static int coex_pti_get_wrapper(uint32_t event, uint8_t *pti)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_pti_get(event, pti);
#else
return 0;
#endif
}
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
coex_schm_status_bit_clear(type, status);
#endif
}
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
coex_schm_status_bit_set(type, status);
#endif
}
static IRAM_ATTR int coex_schm_interval_set_wrapper(uint32_t interval)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_schm_interval_set(interval);
#else
return 0;
#endif
}
static uint32_t coex_schm_interval_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_schm_interval_get();
#else
return 0;
#endif
}
static uint8_t coex_schm_curr_period_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_schm_curr_period_get();
#else
return 0;
#endif
}
static void * coex_schm_curr_phase_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_schm_curr_phase_get();
#else
return NULL;
#endif
}
static int coex_schm_curr_phase_idx_set_wrapper(int idx)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_schm_curr_phase_idx_set(idx);
#else
return 0;
#endif
}
static int coex_schm_curr_phase_idx_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_schm_curr_phase_idx_get();
#else
return 0;
#endif
}
static int coex_register_start_cb_wrapper(int (* cb)(void))
{
#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
return coex_register_start_cb(cb);
#else
return 0;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
}
wifi_osi_funcs_t g_wifi_osi_funcs = {
._version = ESP_WIFI_OS_ADAPTER_VERSION,
._env_is_chip = env_is_chip_wrapper,
._set_intr = set_intr_wrapper,
._clear_intr = clear_intr_wrapper,
._set_isr = set_isr_wrapper,
._ints_on = enable_intr_wrapper,
._ints_off = disable_intr_wrapper,
._is_from_isr = is_from_isr_wrapper,
._spin_lock_create = spin_lock_create_wrapper,
._spin_lock_delete = free,
._wifi_int_disable = wifi_int_disable_wrapper,
._wifi_int_restore = wifi_int_restore_wrapper,
._task_yield_from_isr = task_yield_from_isr_wrapper,
._semphr_create = semphr_create_wrapper,
._semphr_delete = semphr_delete_wrapper,
._semphr_take = semphr_take_wrapper,
._semphr_give = semphr_give_wrapper,
._wifi_thread_semphr_get = wifi_thread_semphr_get_wrapper,
._mutex_create = mutex_create_wrapper,
._recursive_mutex_create = recursive_mutex_create_wrapper,
._mutex_delete = mutex_delete_wrapper,
._mutex_lock = mutex_lock_wrapper,
._mutex_unlock = mutex_unlock_wrapper,
._queue_create = queue_create_wrapper,
._queue_delete = (void(*)(void *))vQueueDelete,
._queue_send = queue_send_wrapper,
._queue_send_from_isr = queue_send_from_isr_wrapper,
._queue_send_to_back = queue_send_to_back_wrapper,
._queue_send_to_front = queue_send_to_front_wrapper,
._queue_recv = queue_recv_wrapper,
._queue_msg_waiting = (uint32_t(*)(void *))uxQueueMessagesWaiting,
._event_group_create = (void *(*)(void))xEventGroupCreate,
._event_group_delete = (void(*)(void *))vEventGroupDelete,
._event_group_set_bits = (uint32_t(*)(void *,uint32_t))xEventGroupSetBits,
._event_group_clear_bits = (uint32_t(*)(void *,uint32_t))xEventGroupClearBits,
._event_group_wait_bits = event_group_wait_bits_wrapper,
._task_create_pinned_to_core = task_create_pinned_to_core_wrapper,
._task_create = task_create_wrapper,
._task_delete = (void(*)(void *))vTaskDelete,
._task_delay = vTaskDelay,
._task_ms_to_tick = task_ms_to_tick_wrapper,
._task_get_current_task = (void *(*)(void))xTaskGetCurrentTaskHandle,
._task_get_max_priority = task_get_max_priority_wrapper,
._malloc = malloc,
._free = free,
._event_post = esp_event_post_wrapper,
._get_free_heap_size = esp_get_free_internal_heap_size,
._rand = esp_random,
._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper,
._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper,
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
._phy_disable = esp_phy_disable,
._phy_enable = esp_phy_enable,
._phy_update_country_info = esp_phy_update_country_info,
._read_mac = esp_read_mac_wrapper,
._timer_arm = timer_arm_wrapper,
._timer_disarm = timer_disarm_wrapper,
._timer_done = timer_done_wrapper,
._timer_setfn = timer_setfn_wrapper,
._timer_arm_us = timer_arm_us_wrapper,
._wifi_reset_mac = wifi_reset_mac_wrapper,
._wifi_clock_enable = wifi_clock_enable_wrapper,
._wifi_clock_disable = wifi_clock_disable_wrapper,
._wifi_rtc_enable_iso = wifi_rtc_enable_iso_wrapper,
._wifi_rtc_disable_iso = wifi_rtc_disable_iso_wrapper,
._esp_timer_get_time = esp_timer_get_time,
._nvs_set_i8 = nvs_set_i8,
._nvs_get_i8 = nvs_get_i8,
._nvs_set_u8 = nvs_set_u8,
._nvs_get_u8 = nvs_get_u8,
._nvs_set_u16 = nvs_set_u16,
._nvs_get_u16 = nvs_get_u16,
._nvs_open = nvs_open_wrapper,
._nvs_close = nvs_close,
._nvs_commit = nvs_commit,
._nvs_set_blob = nvs_set_blob,
._nvs_get_blob = nvs_get_blob,
._nvs_erase_key = nvs_erase_key,
._get_random = os_get_random,
._get_time = get_time_wrapper,
._random = os_random,
._slowclk_cal_get = esp_clk_slowclk_cal_get_wrapper,
._log_write = esp_log_write_wrapper,
._log_writev = esp_log_writev_wrapper,
._log_timestamp = esp_log_timestamp,
._malloc_internal = malloc_internal_wrapper,
._realloc_internal = realloc_internal_wrapper,
._calloc_internal = calloc_internal_wrapper,
._zalloc_internal = zalloc_internal_wrapper,
._wifi_malloc = wifi_malloc,
._wifi_realloc = wifi_realloc,
._wifi_calloc = wifi_calloc,
._wifi_zalloc = wifi_zalloc_wrapper,
._wifi_create_queue = wifi_create_queue_wrapper,
._wifi_delete_queue = wifi_delete_queue_wrapper,
._coex_init = coex_init_wrapper,
._coex_deinit = coex_deinit_wrapper,
._coex_enable = coex_enable_wrapper,
._coex_disable = coex_disable_wrapper,
._coex_status_get = coex_status_get_wrapper,
._coex_condition_set = coex_condition_set_wrapper,
._coex_wifi_request = coex_wifi_request_wrapper,
._coex_wifi_release = coex_wifi_release_wrapper,
._coex_wifi_channel_set = coex_wifi_channel_set_wrapper,
._coex_event_duration_get = coex_event_duration_get_wrapper,
._coex_pti_get = coex_pti_get_wrapper,
._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
._coex_schm_interval_set = coex_schm_interval_set_wrapper,
._coex_schm_interval_get = coex_schm_interval_get_wrapper,
._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
._coex_schm_curr_phase_idx_set = coex_schm_curr_phase_idx_set_wrapper,
._coex_schm_curr_phase_idx_get = coex_schm_curr_phase_idx_get_wrapper,
._coex_register_start_cb = coex_register_start_cb_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
coex_adapter_funcs_t g_coex_adapter_funcs = {
._version = COEX_ADAPTER_VERSION,
._task_yield_from_isr = task_yield_from_isr_wrapper,
._semphr_create = semphr_create_wrapper,
._semphr_delete = semphr_delete_wrapper,
._semphr_take_from_isr = semphr_take_from_isr_wrapper,
._semphr_give_from_isr = semphr_give_from_isr_wrapper,
._semphr_take = semphr_take_wrapper,
._semphr_give = semphr_give_wrapper,
._is_in_isr = xPortInIsrContext,
._malloc_internal = malloc_internal_wrapper,
._free = free,
._esp_timer_get_time = esp_timer_get_time,
._magic = COEX_ADAPTER_MAGIC,
};

10
components/esp_wifi/esp32c3/esp_adapter.c
View File

@ -642,6 +642,15 @@ static int coex_schm_curr_phase_idx_get_wrapper(void)
#endif
}
static int coex_register_start_cb_wrapper(int (* cb)(void))
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_register_start_cb(cb);
#else
return 0;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@ -763,6 +772,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
._coex_schm_curr_phase_idx_set = coex_schm_curr_phase_idx_set_wrapper,
._coex_schm_curr_phase_idx_get = coex_schm_curr_phase_idx_get_wrapper,
._coex_register_start_cb = coex_register_start_cb_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};

10
components/esp_wifi/esp32s2/esp_adapter.c
View File

@ -649,6 +649,15 @@ static int coex_schm_curr_phase_idx_get_wrapper(void)
#endif
}
static int coex_register_start_cb_wrapper(int (* cb)(void))
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_register_start_cb(cb);
#else
return 0;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@ -775,6 +784,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
._coex_schm_curr_phase_idx_set = coex_schm_curr_phase_idx_set_wrapper,
._coex_schm_curr_phase_idx_get = coex_schm_curr_phase_idx_get_wrapper,
._coex_register_start_cb = coex_register_start_cb_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};

10
components/esp_wifi/esp32s3/esp_adapter.c
View File

@ -666,6 +666,15 @@ static int coex_schm_curr_phase_idx_get_wrapper(void)
#endif
}
static int coex_register_start_cb_wrapper(int (* cb)(void))
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_register_start_cb(cb);
#else
return 0;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
@ -792,6 +801,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
._coex_schm_curr_phase_idx_set = coex_schm_curr_phase_idx_set_wrapper,
._coex_schm_curr_phase_idx_get = coex_schm_curr_phase_idx_get_wrapper,
._coex_register_start_cb = coex_register_start_cb_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};

8
components/esp_wifi/include/esp_coexist_internal.h
View File

@ -195,6 +195,14 @@ int coex_schm_curr_phase_idx_set(int idx);
*/
int coex_schm_curr_phase_idx_get(void);
/**
* @brief Register WiFi callback for coexistence starts.
*
* @param cb : WiFi callback
* @return : 0 - success, other - failed
*/
int coex_register_start_cb(int (* cb)(void));
/**
* @brief Register coexistence adapter functions.
*

12
components/esp_wifi/include/esp_now.h
View File

@ -309,15 +309,13 @@ esp_err_t esp_now_get_peer_num(esp_now_peer_num_t *num);
esp_err_t esp_now_set_pmk(const uint8_t *pmk);
/**
* @brief Set esp_now wake window for sta_disconnected power management
* @brief Set wake window for esp_now to wake up in interval unit
*
* @param window how much microsecond would the chip keep waked each interval, vary from 0 to 65535
* @param window Milliseconds would the chip keep waked each interval, from 0 to 65535.
*
* @attention 1. Only when ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is enabled, this configuration could work
* @attention 2. This configuration only work for station mode and disconnected status
* @attention 3. If more than one module has configured its wake_window, chip would choose the largest one to stay waked
* @attention 4. If the gap between interval and window is smaller than 5ms, the chip would keep waked all the time
* @attention 5. If never configured wake_window, the chip would keep waked at disconnected once it uses esp_now
* @attention 1. This configuration could work at connected status.
* When ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is enabled, this configuration could work at disconnected status.
* @attention 2. Default value is the maximum.
*
* @return
* - ESP_OK : succeed

3
components/esp_wifi/include/esp_private/wifi_os_adapter.h
View File

@ -109,7 +109,7 @@ typedef struct {
int (* _get_random)(uint8_t *buf, size_t len);
int (* _get_time)(void *t);
unsigned long (* _random)(void);
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
uint32_t (* _slowclk_cal_get)(void);
#endif
void (* _log_write)(uint32_t level, const char* tag, const char* format, ...);
@ -144,6 +144,7 @@ typedef struct {
void * (* _coex_schm_curr_phase_get)(void);
int (* _coex_schm_curr_phase_idx_set)(int idx);
int (* _coex_schm_curr_phase_idx_get)(void);
int (* _coex_register_start_cb)(int (* cb)(void));
int32_t _magic;
} wifi_osi_funcs_t;

15
components/esp_wifi/include/esp_wifi.h
View File

@ -1209,16 +1209,17 @@ esp_err_t esp_wifi_ftm_resp_set_offset(int16_t offset_cm);
esp_err_t esp_wifi_config_11b_rate(wifi_interface_t ifx, bool disable);
/**
* @brief Set interval for station to wake up periodically at disconnected.
* @brief Set wake interval for connectionless modules to wake up periodically.
*
* @attention 1. Only when ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is enabled, this configuration could work
* @attention 2. This configuration only work for station mode and disconnected status
* @attention 3. This configuration would influence nothing until some module configure wake_window
* @attention 4. A sensible interval which is not too small is recommended (e.g. 100ms)
* @attention 1. Only one wake interval for all connectionless modules.
* @attention 2. This configuration could work at connected status.
* When ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is enabled, this configuration could work at disconnected status.
* @attention 3. Event WIFI_EVENT_CONNECTIONLESS_MODULE_WAKE_INTERVAL_START would be posted each time wake interval starts.
* @attention 4. Recommend to configure interval in multiples of hundred. (e.g. 100ms)
*
* @param interval how much micriosecond would the chip wake up, from 1 to 65535.
* @param wake_interval Milliseconds after would the chip wake up, from 1 to 65535.
*/
esp_err_t esp_wifi_set_connectionless_wake_interval(uint16_t interval);
esp_err_t esp_wifi_connectionless_module_set_wake_interval(uint16_t wake_interval);
/**
* @brief configure country

12
components/esp_wifi/include/esp_wifi_types.h
View File

@ -276,7 +276,11 @@ typedef struct {
uint32_t reserved:27; /**< bit: 5..31 reserved */
} wifi_sta_info_t;
#if CONFIG_IDF_TARGET_ESP32C2
#define ESP_WIFI_MAX_CONN_NUM (4) /**< max number of stations which can connect to ESP32C2 soft-AP */
#else
#define ESP_WIFI_MAX_CONN_NUM (10) /**< max number of stations which can connect to ESP32 soft-AP */
#endif
/** @brief List of stations associated with the ESP32 Soft-AP */
typedef struct {
@ -346,7 +350,7 @@ typedef struct {
unsigned sgi:1; /**< Short Guide Interval(SGI). 0: Long GI; 1: Short GI */
#if CONFIG_IDF_TARGET_ESP32
signed noise_floor:8; /**< noise floor of Radio Frequency Module(RF). unit: dBm*/
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
unsigned :8; /**< reserved */
#endif
unsigned ampdu_cnt:8; /**< ampdu cnt */
@ -357,7 +361,7 @@ typedef struct {
unsigned :32; /**< reserved */
#if CONFIG_IDF_TARGET_ESP32S2
unsigned :32; /**< reserved */
#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
signed noise_floor:8; /**< noise floor of Radio Frequency Module(RF). unit: dBm*/
unsigned :24; /**< reserved */
unsigned :32; /**< reserved */
@ -367,7 +371,7 @@ typedef struct {
#if CONFIG_IDF_TARGET_ESP32S2
signed noise_floor:8; /**< noise floor of Radio Frequency Module(RF). unit: dBm*/
unsigned :24; /**< reserved */
#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
unsigned :32; /**< reserved */
unsigned :32; /**< reserved */
unsigned :32; /**< reserved */
@ -603,6 +607,8 @@ typedef enum {
WIFI_EVENT_STA_BEACON_TIMEOUT, /**< ESP32 station beacon timeout */
WIFI_EVENT_CONNECTIONLESS_MODULE_WAKE_INTERVAL_START, /**< ESP32 connectionless module wake interval start */
WIFI_EVENT_MAX, /**< Invalid WiFi event ID */
} wifi_event_t;

2
components/esp_wifi/lib

@ -1 +1 @@
Subproject commit 59e16e7cd3a7d5b3b9daa2b4f54f617f51b34014
Subproject commit 05794b1c8898c9b43bd8c1b3418dea0f140ec303

3
components/esp_wifi/src/wifi_init.c
View File

@ -129,6 +129,9 @@ esp_err_t esp_wifi_deinit(void)
phy_init_flag();
#endif
esp_wifi_power_domain_off();
#if CONFIG_MAC_BB_PD
esp_mac_bb_pd_mem_deinit();
#endif
return err;
}

2
components/esp_wifi/test/test_wifi_init.c
View File

@ -104,6 +104,7 @@ static void wifi_driver_can_start_on_APP_CPU_task(void* arg)
TEST_CASE("wifi driver can start on APP CPU", "[wifi_init]")
{
test_case_uses_tcpip();
TaskHandle_t th = NULL;
SemaphoreHandle_t sema = xSemaphoreCreateBinary();
TEST_ASSERT_NOT_NULL(sema);
@ -206,6 +207,7 @@ static void wifi_stop_task(void* arg)
TEST_CASE("Calling esp_wifi_stop() without start", "[wifi_init]")
{
test_case_uses_tcpip();
TaskHandle_t th = NULL;
SemaphoreHandle_t sema = xSemaphoreCreateBinary();
TEST_ASSERT_NOT_NULL(sema);

2
components/newlib/Kconfig
View File

@ -50,7 +50,7 @@ menu "Newlib"
config NEWLIB_NANO_FORMAT
bool "Enable 'nano' formatting options for printf/scanf family"
default n
default y if IDF_TARGET_ESP32C2
help
ESP32 ROM contains parts of newlib C library, including printf/scanf family
of functions. These functions have been compiled with so-called "nano"

1
components/newlib/test/test_time.c
View File

@ -35,6 +35,7 @@
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rtc.h"
#endif
#if portNUM_PROCESSORS == 2

12
components/soc/esp32/include/soc/Kconfig.soc_caps.in
View File

@ -654,3 +654,15 @@ config SOC_SDMMC_NUM_SLOTS
config SOC_BLE_DONT_UPDATE_OWN_RPA
bool
default y
config SOC_WIFI_HW_TSF
bool
default n
config SOC_WIFI_FTM_SUPPORT
bool
default n
config SOC_WIFI_GCMP_SUPPORT
bool
default n

5
components/soc/esp32/include/soc/soc_caps.h
View File

@ -370,3 +370,8 @@
/*------------------------------ BLE --------------------------------------------*/
#define SOC_BLE_DONT_UPDATE_OWN_RPA (1)
/*-------------------------- WI-FI HARDWARE CAPS -------------------------------*/
#define SOC_WIFI_HW_TSF (0) /*!< Support hardware TSF */
#define SOC_WIFI_FTM_SUPPORT (0) /*!< FTM Support */
#define SOC_WIFI_GCMP_SUPPORT (0) /*!< GCMP Support(GCMP128 and GCMP256) */

30
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
View File

@ -25,7 +25,7 @@ config SOC_BT_SUPPORTED
config SOC_WIFI_SUPPORTED
bool
default n
default y
config SOC_ASYNC_MEMCPY_SUPPORTED
bool
@ -499,10 +499,6 @@ config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_COEX_HW_PTI
bool
default y
@ -526,3 +522,27 @@ config SOC_PM_SUPPORT_WIFI_WAKEUP
config SOC_PM_SUPPORT_BT_WAKEUP
bool
default y
config SOC_PM_SUPPORT_CPU_PD
bool
default n
config SOC_PM_SUPPORT_WIFI_PD
bool
default n
config SOC_PM_SUPPORT_BT_PD
bool
default n
config SOC_WIFI_HW_TSF
bool
default y
config SOC_WIFI_FTM_SUPPORT
bool
default y
config SOC_WIFI_GCMP_SUPPORT
bool
default n

16
components/soc/esp32c2/include/soc/soc_caps.h
View File

@ -30,7 +30,7 @@
#define SOC_DEDICATED_GPIO_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
#define SOC_BT_SUPPORTED 0 // Enable during bringup, IDF-4357
#define SOC_WIFI_SUPPORTED 0 // Enable during bringup, IDF-3905
#define SOC_WIFI_SUPPORTED 1
#define SOC_ASYNC_MEMCPY_SUPPORTED 1
#define SOC_SUPPORTS_SECURE_DL_MODE 1
#define SOC_EFUSE_KEY_PURPOSE_FIELD 0
@ -251,9 +251,6 @@
// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
/*-------------------------- WI-FI HARDWARE TSF CAPS -------------------------------*/
#define SOC_WIFI_HW_TSF (1)
/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
#define SOC_COEX_HW_PTI (1)
@ -268,3 +265,14 @@
#define SOC_PM_SUPPORT_WIFI_WAKEUP (1)
#define SOC_PM_SUPPORT_BT_WAKEUP (1)
#define SOC_PM_SUPPORT_CPU_PD (0)
#define SOC_PM_SUPPORT_WIFI_PD (0)
#define SOC_PM_SUPPORT_BT_PD (0)
/*------------------------------------ WI-FI CAPS ------------------------------------*/
#define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */
#define SOC_WIFI_FTM_SUPPORT (1) /*!< FTM Support */
#define SOC_WIFI_GCMP_SUPPORT (0) /*!< GCMP Support(GCMP128 and GCMP256) */

16
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
View File

@ -699,10 +699,6 @@ config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_COEX_HW_PTI
bool
default y
@ -746,3 +742,15 @@ config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
config SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_WIFI_FTM_SUPPORT
bool
default y
config SOC_WIFI_GCMP_SUPPORT
bool
default y

8
components/soc/esp32c3/include/soc/soc_caps.h
View File

@ -329,9 +329,6 @@
// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
/*-------------------------- WI-FI HARDWARE TSF CAPS -------------------------------*/
#define SOC_WIFI_HW_TSF (1)
/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
#define SOC_COEX_HW_PTI (1)
@ -356,3 +353,8 @@
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/
#define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1)
#define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL (1)
/*------------------------------------ WI-FI CAPS ------------------------------------*/
#define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */
#define SOC_WIFI_FTM_SUPPORT (1) /*!< FTM Support */
#define SOC_WIFI_GCMP_SUPPORT (1) /*!< GCMP Support(GCMP128 and GCMP256) */

16
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
View File

@ -783,10 +783,6 @@ config SOC_AES_SUPPORT_AES_256
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
@ -834,3 +830,15 @@ config SOC_COEX_HW_PTI
config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_WIFI_FTM_SUPPORT
bool
default y
config SOC_WIFI_GCMP_SUPPORT
bool
default n

8
components/soc/esp32s2/include/soc/soc_caps.h
View File

@ -359,9 +359,6 @@
#define SOC_AES_SUPPORT_AES_192 (1)
#define SOC_AES_SUPPORT_AES_256 (1)
/*-------------------------- WI-FI HARDWARE TSF CAPS -------------------------------*/
#define SOC_WIFI_HW_TSF (1)
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
@ -390,3 +387,8 @@
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/
#define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1)
/*------------------------------------ WI-FI CAPS ------------------------------------*/
#define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */
#define SOC_WIFI_FTM_SUPPORT (1) /*!< FTM Support */
#define SOC_WIFI_GCMP_SUPPORT (0) /*!< GCMP Support(GCMP128 and GCMP256) */

16
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
View File

@ -907,10 +907,6 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_256
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
@ -967,6 +963,18 @@ config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_WIFI_FTM_SUPPORT
bool
default y
config SOC_WIFI_GCMP_SUPPORT
bool
default y
config SOC_TWAI_BRP_MIN
int
default 2

8
components/soc/esp32s3/include/soc/soc_caps.h
View File

@ -386,9 +386,6 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_256 1
/*-------------------------- WI-FI HARDWARE TSF CAPS -------------------------------*/
#define SOC_WIFI_HW_TSF (1)
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
#define SOC_MAC_BB_PD_MEM_SIZE (192*4)
@ -419,3 +416,8 @@
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/
#define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1)
/*------------------------------------ WI-FI CAPS ------------------------------------*/
#define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */
#define SOC_WIFI_FTM_SUPPORT (1) /*!< FTM Support */
#define SOC_WIFI_GCMP_SUPPORT (1) /*!< GCMP Support(GCMP128 and GCMP256) */

1
components/wpa_supplicant/esp_supplicant/src/crypto/crypto_mbedtls.c
View File

@ -894,6 +894,7 @@ int rc4_skip(const u8 *key, size_t keylen, size_t skip,
if ((ret = mbedtls_arc4_crypt(&ctx, len, skip_buf_in,
skip_buf_out)) != 0) {
wpa_printf(MSG_ERROR, "rc4 encryption failed");
os_free(obuf);
return -1;
}
os_memcpy(skip_buf_in, skip_buf_out, 16);

6
tools/test_apps/phy/phy_multi_init_data_test/README.md
View File

@ -1,4 +1,2 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- | -------- |
Not support on ESP32-C2 yet, waiting esp_wifi supported. TODO: IDF-3905
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 | ESP32-C2 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |

6
tools/test_apps/protocols/mqtt/build_test/README.md
View File

@ -1,7 +1,5 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- | -------- |
Not support on ESP32-C2 yet, waiting esp_wifi supported. TODO: IDF-3905
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 | ESP32-C2 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |
# Build only test for C++