esp-idf/components/soc
songruojing b3d8db3ae2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal
Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
2022-07-11 12:24:58 +08:00
..
esp32 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
esp32c2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 2022-07-11 12:24:58 +08:00
esp32c3 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 2022-07-11 12:24:58 +08:00
esp32h2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 2022-07-11 12:24:58 +08:00
esp32s2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 2022-07-11 12:24:58 +08:00
esp32s3 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 2022-07-11 12:24:58 +08:00
include/soc refactor (soc, esp_rom)!: removed target-specific ROM dependencies 2022-07-05 13:57:58 +08:00
linux/include/soc build-system: include soc_caps defines into kconfig 2021-12-06 12:37:07 +08:00
CMakeLists.txt dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware