esp-idf/components/soc
morris 919344547b Merge branch 'bugfix/rmt_register_file_s3' into 'master'
rmt: update register file after fixing csv of RMT peripheral (esp32s2/s3)

Closes IDFGH-7537

See merge request espressif/esp-idf!18392
2022-06-14 18:24:28 +08:00
..
esp32 clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
esp32c2 clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
esp32c3 Merge branch 'refactor/add_clk_tree_ll' into 'master' 2022-06-14 17:16:29 +08:00
esp32h2 clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
esp32s2 Merge branch 'bugfix/rmt_register_file_s3' into 'master' 2022-06-14 18:24:28 +08:00
esp32s3 Merge branch 'bugfix/rmt_register_file_s3' into 'master' 2022-06-14 18:24:28 +08:00
include/soc mcpwm: clean up hal driver and add doc 2022-06-02 15:01:18 +08:00
linux/include/soc build-system: include soc_caps defines into kconfig 2021-12-06 12:37:07 +08:00
CMakeLists.txt dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware