Commit Graph

878 Commits

Author SHA1 Message Date
ninh
27aa6c289f components/pm: Add slp gpio configure workaround 2021-01-15 15:34:45 +08:00
Marius Vikhammer
0713e93b8f TWAI: bringup for S3 and C3 2021-01-14 20:30:31 +08:00
morris
e6d23a35ec gdma: dynamic alloc DMA channels 2021-01-13 10:52:27 +08:00
Chen Jian Xing
5b44295cb9 esp_wifi: fix esp32c3 code issues
1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
2021-01-10 16:16:28 +08:00
Angus Gratton
5b68cf9de4 Merge branch 'feature/c3_ds' into 'master'
ESP32-C3 Digital Signature, HAL layer for DS.

Closes IDF-2111

See merge request espressif/esp-idf!10813
2021-01-07 13:07:28 +08:00
Jiang Jiang Jian
c05321424f Merge branch 'bugfix/lightsleep_accuracy_opt' into 'master'
Lightsleep overhead time accuracy optimization

See merge request espressif/esp-idf!11291
2021-01-06 14:02:10 +08:00
ninh
dc7bdb9857 adjust lightsleep overhead time and cali slowclk 2021-01-06 03:40:28 +00:00
morris
7a71cedf87 interrupt: filter out reserved int number by decoding risc-v JAL instruction 2021-01-05 15:39:46 +08:00
morris
9e7d2c0065 esp32c3: format and clean up interrupt and os port code 2021-01-05 15:39:46 +08:00
Felipe Neves
5d316ac142 interrupt: added INTC FLEXIBLE capabillity to esp32c3 CPU caps 2021-01-05 15:39:46 +08:00
Jakob Hasse
e532a29288 [Peripheral/Security] DS peripheral driver 2021-01-05 12:26:59 +08:00
Michael (XIAO Xufeng)
6b5377f11a gpio: fixed GPIO47 not available issue on ESP32s3 2021-01-04 20:21:06 +08:00
Marius Vikhammer
68608f804c esp32c3: Misc fixes needed to build & run 2020-12-31 15:20:05 +11:00
chaijie
d505474f78 1. Fix CPU switch to 160M issue;
2. increase lightsleep voltage to make sure wakeup successfully;
3. add judgement code to whether wait or not when switch CPU frequency.
2020-12-30 12:32:31 +08:00
Marius Vikhammer
eb788deb03 esp_hw_support: merge C3 changes to master
Merge RTC related C3 changes to master
2020-12-30 12:20:41 +08:00
Angus Gratton
629b4270b4 Merge branch 'feature/c3_mbedtls_merge' into 'master'
mbedtls: merge changes from C3 to master

Closes IDF-2544 and IDF-2114

See merge request espressif/esp-idf!11718
2020-12-29 12:37:08 +08:00
Angus Gratton
1b0442b963 Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master'
esp_system: make rtc fast memory to heap configuration unified across chips

Closes IDF-2503

See merge request espressif/esp-idf!11693
2020-12-29 11:41:05 +08:00
Marius Vikhammer
1b6891c5d8 mbedtls: merge changes from C3 2020-12-29 10:56:13 +08:00
Darian Leung
602a747b31 Add USB Host registers and types and LL layer
This commit adds the register struct, Low Level Layer, and
protocol types for USB Host
2020-12-24 19:43:42 +08:00
Angus Gratton
c3ba995f2c Merge branch 'ci/ccomp_performance_tests' into 'master'
unit_test: Refactor all performance tests that rely on cache compensated timer

See merge request espressif/esp-idf!11709
2020-12-24 13:44:52 +08:00
Mahavir Jain
880a63b2e9 esp_system: make rtc fast memory to heap configuration unified across chips
Closes IDF-2503
2020-12-24 09:46:35 +05:30
Angus Gratton
ed737becde soc: Move esp32c3 soc_memory_layout.c to soc component
Was incorrectly placed in esp_hw_support
2020-12-24 13:40:01 +11:00
Angus Gratton
b7f4c46a82 soc: Update esp32c3 soc headers
From internal commit 6d894813
2020-12-24 10:47:34 +11:00
Angus Gratton
6d6510c39b soc: Move esp32c3 soc_memory_layout.c to soc component
Was incorrectly placed in esp_hw_support
2020-12-23 11:49:16 +11:00
Angus Gratton
705d797b41 Merge branch 'feature/esp32c3_drivers' into 'master'
driver: Add esp32c3

Closes IDF-2363

See merge request espressif/esp-idf!11650
2020-12-23 08:43:31 +08:00
Armando
2d37bfa126 driver: Add adc_digi single conversion mode
- add lock for single read and continuous read APIs
- update onetime read start singal delay for hardware limitation[*]
- move adc_caps to soc_caps.h
- update license dates

[*] There is a hardware limitation. If the APB clock frequency is high, the
step of this reg signal: ``onetime_start`` may not be captured by the
ADC digital controller (when its clock frequency is too slow). A rough
estimate for this step should be at least 3 ADC digital controller
clock cycle.
2020-12-23 09:53:24 +11:00
Angus Gratton
fa892eb017 soc: Explain units for rtc_clk_cal() function, fix typo 2020-12-23 09:53:24 +11:00
Cao Sen Miao
e338a2e3df rtc: add function to en/disable the rtc clock 2020-12-23 09:53:24 +11:00
Angus Gratton
f09b8ae7a4 driver: Add esp32c3 ADC driver
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Angus Gratton
27a9cf861e driver: Add esp32c3 drivers (except ADC/DAC) and update tests
Some ESP32-C3 drivers are still pending.

Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Marius Vikhammer
0a95151a75 unit_test: Refactor all performance tests that rely on cache compensated timer
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.

This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
2020-12-22 18:56:24 +11:00
boarchuz
06d6146445 fix rtc_gpio_desc_t compilation error
Closes https://github.com/espressif/esp-idf/pull/6029
Closes https://github.com/espressif/esp-idf/issues/6301
Closes IDFGH-4470
Closes IDFGH-4167
2020-12-21 13:54:52 +05:30
Cao Sen Miao
0736c91d68 soc: Remove cache constants from soc.h 2020-12-17 15:34:13 +11:00
Marius Vikhammer
457ce080ae AES: refactor and add HAL layer
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Armando
d393699ab6 uart: bringup on esp32c3 2020-11-30 15:23:15 +11:00
Angus Gratton
b68094199f esp_rom: Add initial ESP32-C3 support
From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00
Angus Gratton
c29d93986d soc: Add initial ESP32-C3 support
From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00
Armando
fb8b905539 uart: add uart support on esp32s3 2020-11-24 19:12:51 +08:00
morris
c5fe158929 doc: fix wrong register description regarding to ethernet SMI 2020-11-16 13:30:49 +08:00
Michael (XIAO Xufeng)
14944b181e Merge branch 'fix/soc_caps_spi_dummy_output_esp32' into 'master'
soc_caps.h: remove spi cap that is defined to 0

See merge request espressif/esp-idf!11203
2020-11-16 10:39:27 +08:00
Michael (XIAO Xufeng)
099fca515d Merge branch 'bugfix/move_crypto_caps' into 'master'
SHA/RSA: moved all caps to soc_caps.h

Closes IDF-2300

See merge request espressif/esp-idf!11032
2020-11-13 11:06:44 +08:00
Angus Gratton
935e4b4d62 Merge branch 'feature/riscv_arch' into 'master'
Add RISC-V support

Closes IDF-2359

See merge request espressif/esp-idf!11140
2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Michael (XIAO Xufeng)
caf83b88ba Merge branch 'feature/bringup_i2c_for_s3' into 'master'
I2C:  Add support for esp32s3 and add source clock allocator

Closes IDF-2011

See merge request espressif/esp-idf!10923
2020-11-12 22:12:58 +08:00
Cao Sen Miao
6eee601cf6 i2c: Add supports on esp32s3 2020-11-12 11:32:45 +08:00
morris
dc227c78e1 rmt: fix wrong signal assign on esp32 2020-11-12 10:31:38 +08:00
Michael (XIAO Xufeng)
5b6c965e99 soc_caps.h: remove spi cap that is defined to 0
According to the caps rule, for unsupported feature we don't define anything. 

Remove the define 0 that violates this rule.
2020-11-12 10:29:42 +08:00
Marius Vikhammer
488f46acf5 SHA/RSA: moved all caps to soc_caps.h 2020-11-12 02:15:46 +00:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
3882c2b8ed Merge branch 'feature/bringup_esp32s3_fpga_update_rmt_driver' into 'master'
rmt: support esp32s3

Closes IDF-1773

See merge request espressif/esp-idf!10292
2020-11-07 07:15:53 +08:00
Michael (XIAO Xufeng)
d7ce8a537f Merge branch 'feature/bringup_esp32s3_fpga_rtc_sleep' into 'master'
feature (rtc): update rtc related code(rtc_sleep rtc_init) to support esp32s3

See merge request espressif/esp-idf!10404
2020-11-05 19:19:36 +08:00
morris
ff976867b3 rmt: split TX and RX in LL driver
Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
chenjianqiang
9465af0066 rmt: support esp32s3 2020-11-05 19:00:55 +08:00
fuzhibo
93c7cf094e rtc: update rtc related code(rtc_sleep rtc_init) to support esp32s3 2020-11-04 02:43:41 +00:00
morris
e4c8ec6174 timergroup: move interrupt index into peripheral description file
1. Added timer_group_periph.c file, describing module global signals
   (e.g. interrupt index)
2. Added more caps in soc_caps.h
2020-11-03 18:16:50 +08:00
Michael (XIAO Xufeng)
35faecea1d Merge branch 'feature/support_sigma_delta_on_s3' into 'master'
sigma_delta: add periph signal list and support esp32-s3

See merge request espressif/esp-idf!10945
2020-10-30 17:22:02 +08:00
Michael (XIAO Xufeng)
8337f0afa2 spi_flash: fix LL of esp32s3 and add 32-bit support 2020-10-29 18:21:42 +08:00
Michael (XIAO Xufeng)
3bacf35310 esp_flash: support high capacity flash chips (32-bit address) 2020-10-29 18:20:11 +08:00
morris
17808b3ff8 sigma_delta: add periph signal list and support esp32-s3 2020-10-29 11:06:28 +08:00
Renz Bagaporo
6b0a5af73e soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
Renz Bagaporo
79887fdc6c soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
Renz Bagaporo
988be69466 esp_hw_support: create component 2020-10-28 07:21:29 +08:00
Michael (XIAO Xufeng)
9a394e1aa0 Merge branch 'feature/spi_bringup_esp32s3' into 'master'
spi: bringup on esp32s3

See merge request espressif/esp-idf!10107
2020-10-27 00:51:42 +08:00
Michael (XIAO Xufeng)
bcb5c3506d Merge branch 'feature/dedicated_gpio' into 'master'
Dedicated GPIO driver on ESP32-S2 and ESP32-S3

Closes IDF-1672

See merge request espressif/esp-idf!8716
2020-10-26 15:33:33 +08:00
Michael (XIAO Xufeng)
8926216723 Merge branch 'bugfix/esp32s2_adc_rng_registers' into 'master'
esp32s2: Use regi2c registers to enable bootloader RNG

See merge request espressif/esp-idf!10941
2020-10-26 13:55:05 +08:00
Armando
f7e91ef6c1 spi: esp32s3 bringup for spi 2020-10-26 11:28:34 +08:00
Renz Bagaporo
e7460c1f00 soc: remove unecessary headers in dport_access.h 2020-10-22 19:42:34 +08:00
Angus Gratton
57d6026f97 Merge branch 'feature/efuse_support_for_esp32s3' into 'master'
efuse: Adds support for esp32-s3 chip

See merge request espressif/esp-idf!10491
2020-10-22 13:53:01 +08:00
Angus Gratton
639e97437f esp32s2: Use regi2c registers to enable bootloader RNG 2020-10-22 14:39:59 +11:00
morris
bb1369b922 dedicated gpio: add driver 2020-10-20 21:06:09 +08:00
morris
74d78148bc pcnt: add pcnt peripheral signal connections
pcnt: fix bug in clear interrupt status
2020-10-19 11:56:18 +08:00
Michael (XIAO Xufeng)
1966f00f0b soc: updates caps usage
We should define caps as 1 if true. When use the caps macros, #if and
 #if ! should be used instead of #ifdef/#ifndef.
2020-10-17 16:10:17 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
Michael (XIAO Xufeng)
ecca44df93 Merge branch 'bugfix/fix_adc-dma_reading_gap_for_esp32' into 'master'
bugfix(adc): missing ranges of ADC-DMA codes in ESP32

Closes DIG-53

See merge request espressif/esp-idf!10521
2020-10-16 23:02:35 +08:00
Angus Gratton
67baa8371a Merge branch 'feature/rename_analog_i2c_files' into 'master'
feature(rtc): rename i2c_xxx to regi2c_xxx

See merge request espressif/esp-idf!10672
2020-10-15 11:16:14 +08:00
fuzhibo
6773df88f2 feature(rtc): rename i2c_xxx to regi2c_xxx 2020-10-14 21:15:24 +08:00
KonstantinKondrashov
66b9b589cb efuse: Adds support for esp32-s2 chip 2020-10-14 16:26:51 +08:00
Felipe Neves
3057b76a7e tests: re-add all disabled tests and all disabled configurations 2020-10-14 16:11:49 +11:00
Felipe Neves
a3c90bf59a freertos: merged freertos 10 kernel files into IDF
freertos/port: update the port files and split into xtensa and riscv ports

freertos: separated cpu files from rest of the kernel sources

freertos/port_xtensa: separated private include files into a folder

freertos/tasks: added task create pinned to core function do not break current IDF API

freertos/tasks: mimiced task create pinned function into tasks.c to do not break the IDF API.

freertos: freertos component now compiling

freertos: freertos component now building

freertos: moved critical sections outside from FR kernel section to portable section

portmacro_xtensa: add void indentifier on functions that take no arguments

freertos: fix critical sections implementation to match with their function prototype

freertos: add cmake changes of freertos into make

freertos: remove portDONT_DISCARD attribute from switch context function, it was breaking the docs building.

freertos: fix conflicitng types of vApplicationSleep function

license: update the license of freertos

freertos: Doxygen comments refactored to render them correctly on docs

freertos: added new functions of freertos into the documentation

freertos: added message buffers and stream buffers to documentation

sysview: update freertos system view to the compatible with version 10

freertos: fixed event group  documentation rendering

freertos:  update static task structure to match the actual tcb size

freertos: removed backported test functions

freertos/smp: brought SMP code to  FreeRTOS 10 port

freertos/portmacro: added missing crosscore interrupt for yielding tasks

freertos: replaced soft-critical sections with hard-critical sections used by SMP

freertos: placed muxes inside of kernel objects

freertos: replaced original FR critical sections with SMP enabled spinlocks critical sections

freertos: moved xtensa port files to a separated folder

freertos: added multiple instance of global variables required to SMP

freertos: added SMP modifications on specific tasks module functions

freertos: added TLS deletion function to task module

freertos/tls: initialize TLS deletion callback to avoid crashing when calling task delete

freertos: modified vTaskDelete to do not erase current task that runs on other core

freertos: reverted taskhandle and timerhandle as void* type

freertos: fixed de-referencing void pointer to get run time counter

freertos: fix system view trace enter macro arguments

freertos: Replaced soft critical sections with spinlocks on event_groups

freertos: fixed tick function to avoid calling tick hooks twice

freertos: Nofity give checking per CPU if schedule is suspended

freertos: added mpu release on TCB deletion

freertos: Added SMP changes when deleting a TCB on idle task

freertos/license: update freertos license in COPYRIGHT.rst

freertos: unicore configurations can use task create pinned to core, it will be always pinned to core 0

freertos/portmacro: added cpu_hal_get_core_id() function instead of inline assembly

freertos/xtensa:  update xtensa specific files used in master branch

newlib/locks: revert the preemption checking in lock acquisition and release

ref_clock: fix initial state of ref_clock interrupt handler

freertos: added missing critical sections and yielding checkings

freertos: remove magic numbers in vTaskDelete

freertos: added missing critical section in prvIsQueueEmpty
2020-10-13 23:52:03 +00:00
Angus Gratton
ff8d05466e Merge branch 'bugfix/deep_sleep_stub_heap_rtc_fast_mem' into 'master'
deep sleep: Calculate RTC CRC without using any stack or other RTC heap memory

Closes IDF-2242

See merge request espressif/esp-idf!10741
2020-10-13 06:17:50 +08:00
fuzhibo
9cd5e6f8c9 bugfix(adc): missing ranges of ADC codes in ESP32 2020-10-12 07:41:03 +00:00
Angus Gratton
562ab01046 deep sleep: Calculate RTC CRC immediately before deep sleep, without using RAM
Fix for issues where RTC FAST memory is updated as part of going into deep
sleep. Very high risk if heaps are in RTC memory - in particular task stacks
may be in RTC memory, but also other variables.

Also fixes potential concurrency problems as RTC FAST memory is not accessible
by CPU during the CRC calculation itself.

Method:
- Disable interrupts (currently for single core only, will need update for S3)
- Load all registers before calculating CRC or going to sleep
2020-10-12 11:19:56 +11:00
Marius Vikhammer
949fb8e63a SHA: add HAL layer and refactor driver
Add a LL and HAL layer for SHA.
2020-10-09 08:24:08 +00:00
Angus Gratton
d6f8e9dfa8 Merge branch 'bugfix/delete_unneeded_cpu_h' into 'master'
esp32s2, esp32s3: delete unneeded cpu.h

See merge request espressif/esp-idf!10716
2020-10-09 13:54:56 +08:00
Martin Vychodil
497b730e8f * memprot support for RTC_SLOW
* API upgrade
JIRA IDF-1636
2020-10-08 11:19:23 +08:00
Angus Gratton
1eefe6494c Merge branch 'feature/rsa_caps' into 'master'
RSA: add max RSA bit len as a soc caps

See merge request espressif/esp-idf!10594
2020-10-05 12:56:28 +08:00
Renz Bagaporo
72176e275d esp32s2, esp32s3: delete unneeded cpu.h 2020-09-30 17:58:00 +08:00
Michael (XIAO Xufeng)
f4aacbef9b Merge branch 'feature/support_access_internal_i2c_register' into 'master'
feature(rtc): add new APIs support access internal i2c register

See merge request espressif/esp-idf!10039
2020-09-29 08:08:51 +08:00
fuzhibo
247789bb2e rtc: support access internal i2c register 2020-09-27 12:12:17 +08:00
Renz Bagaporo
6462f9bfe1 esp32, esp32s2: create esp_pm component 2020-09-25 05:24:10 +00:00
Marius Vikhammer
3c14900a95 RSA: add max RSA bit len as a soc caps 2020-09-24 16:52:50 +08:00
Armando
1e1beb69aa spi: fix build fail issue when target is esp32s3 2020-09-24 10:51:23 +08:00
Michael (XIAO Xufeng)
3c2f2aaffe Merge branch 'docs/spi_flash_readme_update' into 'master'
hal: Update readme aftering extracting hal document from soc document

See merge request espressif/esp-idf!10453
2020-09-23 13:33:08 +08:00
Cao Sen Miao
5baf124219 docs: update readme aftering extracting hal document from soc document 2020-09-23 11:47:23 +08:00
Renz Bagaporo
6d7606aee5 soc: remove unecessary compile line include dir orderding control 2020-09-23 02:53:03 +00:00
Renz Bagaporo
7f5893d53c soc: move dac_hal to hal 2020-09-23 02:53:03 +00:00
Renz Bagaporo
01d9aa8070 soc: move mpu_hal test to hal component 2020-09-23 02:53:03 +00:00
Renz Bagaporo
2bcf99527c soc: move out rtc_hal to hal component 2020-09-23 02:53:03 +00:00
morris
9fa06719fa global: enable build uinit test for esp32-s3 2020-09-22 15:15:03 +08:00
morris
75a372a9f0 unit_test: support reference clock, test delay function 2020-09-22 15:15:03 +08:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
Cao Sen Miao
d7e50c6457 spi_flash:bringup some flash supports for esp32s3 2020-09-22 15:15:03 +08:00
chenjianqiang
f19cabb7e4 psram: support psram for esp32s3 2020-09-22 15:15:03 +08:00
Angus Gratton
3f034a5005 spiram: Add soc macro for SPIRAM address space size, use it where applicable
Reference https://github.com/espressif/esp-idf/pull/5373
2020-09-21 11:43:55 +10:00
negativekelvin
5eb5bb5f72 Fix reserved psram region
Closes https://github.com/espressif/esp-idf/pull/5373

Closes https://github.com/espressif/esp-idf/issues/5821
2020-09-21 11:39:54 +10:00
Michael (XIAO Xufeng)
fefdee1349 bootloader: fix the WRSR format for ISSI flash chips
1. The 2nd bootloader always call `rom_spiflash_unlock()`, but never help to clear the WEL bit when exit. This may cause system unstability.

   This commit helps to clear WEL when flash configuration is done.

   **RISK:** When the app starts, it didn't have to clear the WEL before it actually write/erase. But now the very first write/erase operation should be done after a WEL clear. Though the risk is little (all the following write/erase also need to clear the WEL), we still have to test this carefully, especially for those functions used by the OTA.

2. The `rom_spiflash_unlock()` function in the patch of ESP32 may (1) trigger the QPI, (2) clear the QE or (3) fail to unlock the ISSI chips.

   Status register bitmap of ISSI chip and GD chip:

| SR | ISSI | GD25LQ32C |
| -- | ---- | --------- |
| 0  | WIP  | WIP       |
| 1  | WEL  | WEL       |
| 2  | BP0  | BP0       |
| 3  | BP1  | BP1       |
| 4  | BP2  | BP2       |
| 5  | BP3  | BP3       |
| 6  | QE   | BP4       |
| 7  | SRWD | SRP0      |
| 8  |      | SRP1      |
| 9  |      | QE        |
| 10 |      | SUS2      |
| 11 |      | LB1       |
| 12 |      | LB2       |
| 13 |      | LB3       |
| 14 |      | CMP       |
| 15 |      | SUS1      |

   QE bit of other chips are at the bit 9 of the status register (i.e. bit 1 of SR2), which should be read by RDSR2 command.

   However, the RDSR2 (35H, Read Status 2) command for chip of other vendors happens to be the QIOEN (Enter QPI mode) command of ISSI chips. When the `rom_spiflash_unlock()` function trys to read SR2, it may trigger the QPI of ISSI chips.

   Moreover, when `rom_spiflash_unlock()` try to clear the BP4 bit in the status register, QE (bit 6) of ISSI chip may be cleared by accident. Or if the ISSI chip doesn't accept WRSR command with argument of two bytes (since it only have status register of one byte), it may fail to clear the other protect bits (BP0~BP3) as expected.

   This commit makes the `rom_spiflash_unlock()` check whether the vendor is issi. if so, `rom_spiflash_unlock()` only send RDSR to read the status register, send WRSR with only 1 byte argument, and also avoid clearing the QE bit (bit 6).

3. `rom_spiflash_unlock()` always send WRSR command to clear protection bits even when there is no protection bit active. And the execution of clearing status registers, which takes about 700us, will also happen even when there's no bits cleared.

   This commit skips the clearing of status register if there is no protection bits active.

Also move the execute_flash_command to be a bootloader API; move
implementation of spi_flash_wrap_set to the bootloader
2020-09-19 10:51:51 +08:00
Angus Gratton
0fe231d2b3 Merge branch 'feature/pkg_ver_uses_4_bits' into 'master'
efuse/esp32: Expands PKG_VER from 3 bit to 4 bits

Closes IDF-1919

See merge request espressif/esp-idf!9949
2020-09-17 18:21:08 +08:00
KonstantinKondrashov
2373f115fc efuse/esp32: Expands PKG_VER from 3 bit to 4 bits
Closes: IDF-1919
2020-09-17 07:44:37 +00:00
morris
a3cc43485f async memcpy: support async memcopy on esp32s2/s3
Added async memory copy API:
on esp32-s2, the implementation is based on CP_DMA
on esp32-s3, the implementation is based on GDMA
2020-09-16 21:30:54 +08:00
Michael (XIAO Xufeng)
1a1e1911f9 Merge branch 'bugfix/spi_dma_close_before_cpu_reset' into 'master'
spi: fix issue with closing DMA before CPU reset

Closes FCS-484

See merge request espressif/esp-idf!9844
2020-09-14 23:02:05 +08:00
Marius Vikhammer
b2f390df01 hal: update link to HAL readme.md
The HAL readme was moved during refactoring, but links were not updated.
2020-09-11 15:48:08 +08:00
Jakob Hasse
20c068ef3b cmock: added cmock as component
* changing dependencies from unity->cmock
* added component.mk and Makefile.projbuild
* ignore test dir in gen_esp_err_to_name.py
* added some brief introduction of CMock in IDF
2020-09-02 16:38:37 +08:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
Krzysztof Budzynski
94cc8fc4b3 Merge branch 'doc/tinyusb' into 'master'
TinyUSB documentation

See merge request espressif/esp-idf!8862
2020-08-31 20:57:29 +08:00
Michael (XIAO Xufeng)
2b323e7180 Merge branch 'bugfix/fix_dac_driver_ut' into 'master'
Driver(dac): fix DAC-DMA driver and unit test

Closes IDF-1407

See merge request espressif/esp-idf!8814
2020-08-31 00:05:34 +08:00
Andrei Gramakov
c863b4c777 docs: tinyusb documentation 2020-08-27 13:49:33 +02:00
fuzhibo
0914dfbb6a dfiver(dac): add dac dma driver and unit test 2020-08-26 06:23:24 +00:00
fuzhibo
bd92e95160 driver(adc): add adc-dma code for esp32 2020-08-26 03:54:02 +00:00
me-no-dev
0aa1c13027 Fix USB CLK always reset and USB with swapped pins not working 2020-08-25 10:59:59 +03:00
Michael (XIAO Xufeng)
8a9dc46b14 Merge branch 'bugfix/spi_master_add_dummy_check' into 'master'
spi_master: add dummy check when both mosi and miso are set

Closes IDF-1872 and IDF-266

See merge request espressif/esp-idf!9406
2020-08-23 12:47:18 +08:00
David Čermák
e2f72f449c Merge branch 'feature/ethernet_flow_control' into 'master'
ethernet: support flow control

Closes IDF-1207, WIFI-2510, WIFI-2290, WIFI-2291, WIFI-2507, WIFI-2508, WIFI-2612, and IDFGH-3465

See merge request espressif/esp-idf!9643
2020-08-21 14:33:30 +08:00
Armando
aa93347972 spi: remove spi4 related macros and codes 2020-08-17 21:32:15 +08:00
Renz Bagaporo
4f5135030f esp_system: remove register level operations for timer wakeup 2020-08-17 19:09:24 +08:00
Renz Bagaporo
0b6ead74b5 soc: ll and hal for sleep related code 2020-08-17 19:09:24 +08:00
Armando
e58ce2141d spi_master: rename the hal layer function that calculates clock and timing 2020-08-17 17:04:07 +08:00
Michael (XIAO Xufeng)
dc22501b47 Merge branch 'bugfix/mcpwm_capture_getedge_null_deref' into 'master'
Bugfix(MCPWM):  Fix dereferencing of a null pointer in function mcpwm_capture_signal_get_edge

See merge request espressif/esp-idf!9255
2020-08-17 15:52:24 +08:00
Angus Gratton
62c4b569ad Merge branch 'refactor/timekeeping_init' into 'master'
Timekeeping refactor

Closes IDF-1864

See merge request espressif/esp-idf!7824
2020-08-17 08:13:44 +08:00
morris
a3da67a97a ethernet: set DMA owner after all descriptors have configured 2020-08-10 18:54:25 +08:00
morris
f4131b9b42 ethernet: handle early rx interrupt 2020-08-10 18:54:25 +08:00
morris
4e38aab1b0 ethernet: support flow control for esp32 emac 2020-08-10 18:54:25 +08:00
wubowen
de72ef2c1a bugfix: Fixed the issue that calling mcpwm_capture_signal_get_edge causes a crash 2020-08-10 09:31:03 +00:00
Darian Leung
fdbda1ce78 TWAI: Simplify caps header
This commit simplies the defines made in the _caps.h header. Kconfig
option dependencies were moved into the LL, and the check for a
valid BRP has bee simplified.
2020-08-10 17:01:32 +08:00
Darian Leung
d814a40c1d TWAI: Fix ESP32-S2 register field name 2020-08-10 17:01:32 +08:00
Darian Leung
6983d1e0bb TWAI: Fix BRP field initialization onf ESP32 ECO3
This commit zero initializes the brp_div field on ESP32 ECO3
to prevent incorrect timing configuration.
2020-08-10 17:01:32 +08:00
Renz Bagaporo
5785e4dfb6 newlib: move some functions to soc, esp32, esp32s2 2020-08-10 15:11:38 +08:00
Michael (XIAO Xufeng)
cda9c595d7 Merge branch 'feature/mcpwm_capture_on_both_edge' into 'master'
MCPWM: add an option to do mcpwm capture on both edges

See merge request espressif/esp-idf!9850
2020-08-10 11:48:50 +08:00
morris
edb5ddf63b soc: placeholder for esp32s3 HAL driver
soc rtc
2020-08-07 11:59:00 +08:00
Michael (XIAO Xufeng)
bfd71ae7ec Merge branch 'feature/dma_memcpy' into 'master'
esp32s2: async memcpy

Closes IDF-1573

See merge request espressif/esp-idf!8436
2020-08-06 11:32:43 +08:00
dongyou
97ae87df41 wifi, bt: move esp_phy_common_clock_disable into periph_ctrl and put it into IRAM
Replace periph_module_enable/disable by periph_wifi_bt_common_module_enable which are in IRAM.
AddIRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rstandIRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rstto fit O0 optimization level.
Delete duplicated spinlock and counter.
2020-08-05 11:04:16 +08:00
morris
b30bd7a2ef esp32s2: add CP_DMA driver 2020-08-04 15:28:32 +08:00
Wu Bo Wen
14a6b1db56 driver/mcpwm: add an option to capture on both edges.
However, The functionality of capturing on both edges is alternatively done with passing in the two flags ORed together: MCPWM_NEG_EDGE|MCPWM_POS_EDGE

closes https://github.com/espressif/esp-idf/issues/4446
closes https://github.com/espressif/esp-idf/issues/2943
2020-08-03 14:58:45 +08:00
Ivan Grokhotkov
0ee714e1fa soc: move RTC initialization out of IRAM
Saves approximately 870 bytes of IRAM.
2020-08-01 00:52:43 +02:00
Darian Leung
662864f5bc twai: Fix size of RX msg count field on the esp32
This commit fixes the size of the RX message count register field
on the esp32.
2020-07-30 15:45:58 +08:00
Angus Gratton
75402afcae Merge branch 'feature/esp32s3_clk_memory_layout' into 'master'
esp32s3: memory layout

See merge request espressif/esp-idf!9753
2020-07-29 13:48:25 +08:00
Michael (XIAO Xufeng)
6434c1e2bd Merge branch 'feat/esp_flash_enable_s2_ut' into 'master'
esp_flash: fix several issues and enable unit test for ESP32-S2

Closes IDF-1409

See merge request espressif/esp-idf!8259
2020-07-28 18:15:41 +08:00
Ivan Grokhotkov
16c73edc67 Merge branch 'refactor/add_alias_name_for_ets_common_api' into 'master'
esp_rom: extract common ets apis into esp_rom_sys.h

See merge request espressif/esp-idf!9701
2020-07-28 15:04:55 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
morris
19761e3113 esp32s3: clk, memory layout 2020-07-27 13:05:22 +08:00
Michael (XIAO Xufeng)
30fa716376 spi: fix cs num support for different SPI hosts.
For esp32, all SPI hosts have 3 CS pins, however, on ESP32, SPIMEM1 has
two CS pins, FSPI has six, while HSPI has three.
2020-07-27 12:27:03 +08:00
Michael (XIAO Xufeng)
4bad988317 esp_flash: fix slow read on ESP32-S2 2020-07-27 12:20:19 +08:00