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esp_hw_support: create component
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parent
b6e763ac86
commit
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@ -80,6 +80,7 @@
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/components/esp_http_server/ @esp-idf-codeowners/app-utilities
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/components/esp_https_ota/ @esp-idf-codeowners/app-utilities
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/components/esp_https_server/ @esp-idf-codeowners/app-utilities
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/components/esp_hw_support/ @esp-idf-codeowners/system
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/components/esp_ipc/ @esp-idf-codeowners/system
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/components/esp_local_ctrl/ @esp-idf-codeowners/app-utilities
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/components/esp_netif/ @esp-idf-codeowners/network
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@ -15,10 +15,10 @@ if(NOT IDF_TARGET)
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"in by the parent build process.")
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endif()
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set(COMPONENTS bootloader esptool_py partition_table soc bootloader_support log spi_flash micro-ecc main efuse)
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set(COMPONENTS bootloader esptool_py esp_hw_support hal partition_table soc bootloader_support log spi_flash micro-ecc main efuse)
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set(BOOTLOADER_BUILD 1)
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include("${IDF_PATH}/tools/cmake/project.cmake")
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set(common_req log esp_rom esp_common xtensa)
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set(common_req log esp_rom esp_common esp_hw_support hal xtensa)
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if(LEGACY_INCLUDE_COMMON_HEADERS)
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list(APPEND common_req soc hal)
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endif()
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@ -8,7 +8,7 @@ endif
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PROJECT_NAME := bootloader
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COMPONENTS := esptool_py bootloader_support log spi_flash micro-ecc soc main efuse esp_rom hal
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COMPONENTS := esp_hw_support esptool_py bootloader_support log spi_flash micro-ecc soc main efuse esp_rom hal
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# Clear C and CXX from top level project
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CFLAGS =
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@ -25,7 +25,7 @@ else()
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# Note: esp_ipc, esp_pm added as a public requirement to keep compatibility as to be located here.
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idf_component_register(SRCS "${srcs}"
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INCLUDE_DIRS include
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REQUIRES ${target} espcoredump esp_timer esp_ipc esp_pm
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REQUIRES ${target} espcoredump esp_timer esp_ipc esp_pm esp_hw_support
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PRIV_REQUIRES soc
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LDFRAGMENTS "linker.lf")
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4
components/esp_hw_support/CMakeLists.txt
Normal file
4
components/esp_hw_support/CMakeLists.txt
Normal file
@ -0,0 +1,4 @@
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idf_component_register(SRCS "compare_set.c"
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"cpu_util.c"
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INCLUDE_DIRS include
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REQUIRES soc)
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7
components/esp_hw_support/README.md
Normal file
7
components/esp_hw_support/README.md
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@ -0,0 +1,7 @@
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## `esp_hw_support` ##
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This component contains hardware-related operations for supporting the system. These operations
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are one level above that of `hal` in that these(1) use system services such as memory allocation, logging, scheduling
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or (2) may be multi-step operations involving/affecting multiple parts of the SoC.
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Implementations that don't fit other components cleanly, but are not worth creating a new component for (yet) may also be placed here as long as they don't pull dependencies other than the core system components.
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2
components/esp_hw_support/component.mk
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2
components/esp_hw_support/component.mk
Normal file
@ -0,0 +1,2 @@
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COMPONENT_SRCDIRS := .
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COMPONENT_ADD_INCLUDEDIRS := . include
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@ -21,6 +21,9 @@
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#include "soc/soc_memory_layout.h"
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#include "xtensa/xtruntime.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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static inline void __attribute__((always_inline)) compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
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{
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@ -53,4 +56,8 @@ static inline void __attribute__((always_inline)) compare_and_set_native(volatil
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void compare_and_set_extram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -21,6 +21,9 @@
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#include "soc/compare_set.h"
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#include "xtensa/xtruntime.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef CONFIG_SPIRAM_WORKAROUND_NEED_VOLATILE_SPINLOCK
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#define NEED_VOLATILE_MUX volatile
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@ -154,5 +157,9 @@ static inline void __attribute__((always_inline)) spinlock_release(spinlock_t *l
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#endif
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -1,13 +1,10 @@
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idf_build_get_property(target IDF_TARGET)
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idf_component_register(SRCS "src/cpu_util.c"
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"src/memory_layout_utils.c"
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"src/lldesc.c"
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idf_component_register(SRCS "src/lldesc.c"
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"src/soc_include_legacy_warn.c"
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"src/compare_set.c"
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REQUIRES hal #cpu.h directly includes HAL header
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"src/memory_layout_utils.c"
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INCLUDE_DIRS include
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PRIV_REQUIRES ${target}
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PRIV_REQUIRES hal # [refactor-todo] soc dependency on hal for rtc sources
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LDFRAGMENTS linker.lf)
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add_subdirectory(soc)
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@ -138,11 +138,11 @@ INPUT = \
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$(IDF_PATH)/components/hal/include/hal/adc_types.h \
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$(IDF_PATH)/components/hal/include/hal/twai_types.h \
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$(IDF_PATH)/components/hal/include/hal/touch_sensor_types.h \
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$(IDF_PATH)/components/soc/soc/esp32/include/soc/adc_channel.h \
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$(IDF_PATH)/components/soc/soc/esp32/include/soc/dac_channel.h \
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$(IDF_PATH)/components/soc/soc/esp32/include/soc/touch_sensor_channel.h \
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$(IDF_PATH)/components/soc/soc/esp32/include/soc/uart_channel.h \
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$(IDF_PATH)/components/soc/soc/esp32/include/soc/rtc_io_channel.h \
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$(IDF_PATH)/components/soc/esp32/include/soc/adc_channel.h \
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$(IDF_PATH)/components/soc/esp32/include/soc/dac_channel.h \
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$(IDF_PATH)/components/soc/esp32/include/soc/touch_sensor_channel.h \
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$(IDF_PATH)/components/soc/esp32/include/soc/uart_channel.h \
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$(IDF_PATH)/components/soc/esp32/include/soc/rtc_io_channel.h \
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## esp_netif - API Reference
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$(IDF_PATH)/components/esp_netif/include/esp_netif.h \
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$(IDF_PATH)/components/esp_netif/include/esp_netif_net_stack.h \
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@ -327,7 +327,7 @@ The ESP-IDF FreeRTOS critical section functions have been modified as follows…
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section functions (``port*_CRITICAL`` in Non-ISR and ``port*_CRITICAL_ISR`` in ISR)
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in order to be in compliance with Vanilla FreeRTOS.
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For more details see :component_file:`soc/include/soc/spinlock.h`
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For more details see :component_file:`esp_hw_support/include/soc/spinlock.h`
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and :component_file:`freertos/tasks.c`
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It should be noted that when modifying vanilla FreeRTOS code to be ESP-IDF
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@ -154,7 +154,8 @@ function(__build_init idf_path)
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# Set components required by all other components in the build
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#
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# - lwip is here so that #include <sys/socket.h> works without any special provisions
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set(requires_common cxx newlib freertos heap log lwip soc hal esp_rom esp_common esp_system xtensa)
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# - esp_hw_support is here for backward compatibility
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set(requires_common cxx newlib freertos esp_hw_support heap log lwip soc hal esp_rom esp_common esp_system xtensa)
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idf_build_set_property(__COMPONENT_REQUIRES_COMMON "${requires_common}")
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__build_get_idf_git_revision()
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