mirror of
https://github.com/espressif/esp-idf.git
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2d37bfa126
- add lock for single read and continuous read APIs - update onetime read start singal delay for hardware limitation[*] - move adc_caps to soc_caps.h - update license dates [*] There is a hardware limitation. If the APB clock frequency is high, the step of this reg signal: ``onetime_start`` may not be captured by the ADC digital controller (when its clock frequency is too slow). A rough estimate for this step should be at least 3 ADC digital controller clock cycle. |
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.. | ||
esp32 | ||
esp32c3 | ||
esp32s2 | ||
esp32s3 | ||
include/soc | ||
CMakeLists.txt | ||
component.mk | ||
linker.lf | ||
lldesc.c | ||
memory_layout_utils.c | ||
README.md | ||
soc_include_legacy_warn.c |
soc
The soc
component provides hardware description for targets supported by ESP-IDF.
- `xxx_reg.h` - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h` - features/capabilities of the hardware
- `xxx_pins.h` - pin definitions
- `xxx_periph.h/*.c` - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware