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538 Commits

Author SHA1 Message Date
Shu Chen
75bd02bd46 esp32h2: add some more fixes and TODOs 2021-07-01 20:36:39 +08:00
Shu Chen
2df4ddf998 esp32h2: fixes after rebase 2021-07-01 19:53:50 +08:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
c0056813f2 esp32h2: add bootloader support 2021-07-01 19:53:11 +08:00
Michael (XIAO Xufeng)
afc2bc94b3 Merge branch 'feature/add_opi_flash_psram_support' into 'master' 
spi flash: opi flash psram support and spi timing tuning  support on 727

Closes IDF-3097

See merge request espressif/esp-idf!12946
 2021-06-28 01:59:19 +00:00
Armando
bc248278f8 spiflash: add octal spi psram support on 727 2021-06-25 19:41:57 +08:00
Cao Sen Miao
f2fe0847d5 usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now 2021-06-18 12:42:41 +08:00
KonstantinKondrashov
57c7ebc4bc flash_encrypt: Adds API to switch flash encryption "Development" to "Release" 2021-06-17 12:58:04 +05:00
Konstantin Kondrashov
f339b3fc96 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 
These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
 2021-06-17 07:21:36 +08:00
Angus Gratton
6961e4b3d5 Merge branch 'bugfix/ulp_overflow_rtc_mem' into 'master' 
ulp: ULP_COPROC_RESERVE_MEM limitation

See merge request espressif/esp-idf!13814
 2021-06-08 07:20:46 +00:00
Michael (XIAO Xufeng)
e005ec0899 Merge branch 'feature/s3_base_support' into 'master' 
soc: S3 base support

See merge request espressif/esp-idf!13827
 2021-06-07 12:07:08 +00:00
Angus Gratton
0f1b24891b Merge branch 'bugfix/esp32_u4wdh_quad_io' into 'master' 
bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip

Closes IDFGH-4353

See merge request espressif/esp-idf!13111
 2021-06-07 04:50:54 +00:00
Marius Vikhammer
19a492bc8d soc: add base support for ESP32-S3 
Updates the following with changes from verification branches:

 * esp_rom linker files
 * rtc_cntl and system reg and struct headers

Also updates:
 * GDMA driver with new register layout
 * esptool submodule commit
 2021-06-07 10:40:14 +08:00
Marius Vikhammer
2f705136e9 bootloader: fix verify_load_addresses wrongly reporting "bad load address range" 
verify_load_addresses would check if load_end was in a certain member range,
but should verify (load_end - 1) which is the actual last byte.
 2021-06-04 12:15:52 +08:00
Jan Brudný
dffe49f305 bootloader: update copyright notice 2021-06-02 14:22:09 +02:00
Angus Gratton
f486736cbf bootloader: Fix "skip validate in deep sleep" on ESP32 & ESP32-S2 
Regression in 83bf2e1ac1, this memory region was shifted from fast to slow RTC
memory (no change on ESP32-C3 as no RTC fast memory on this chip.)
 2021-06-01 18:58:55 +10:00
KonstantinKondrashov
071e00a088 bootloader: Fix a wrong offset in image_load after refactoring 2021-05-26 18:06:11 +08:00
Angus Gratton
e928d57663 Merge branch 'doc/include_bootloader_random' into 'master' 
docs: Add RNG functions to API reference

See merge request espressif/esp-idf!13519
 2021-05-20 09:14:55 +00:00
Angus Gratton
e886aa1da4 Merge branch 'update_copyright_notice_bootloader_support' into 'master' 
bootloader: update copyright notice, part 2

See merge request espressif/esp-idf!13495
 2021-05-19 00:26:35 +00:00
Angus Gratton
e14edecf5f docs: Add random number generation to the API Reference System section 2021-05-18 16:05:42 +10:00
Angus Gratton
ede477ea65 paritition_table: Verify the partition table md5sum when loading the app 
Additionally, always enable the partition MD5 check if flash encryption is on in
Release mode. This ensures the partition table ciphertext has not been modified
(CVE-2021-27926).

The exception is pre-V3.1 ESP-IDF bootloaders and partition tables, which
don't have support for the MD5 entry.
 2021-05-18 01:32:59 +00:00
Cao Sen Miao
8c5819dccb usb_serial_jtag: fix the bug that cannot write with usb_jtag 2021-05-13 13:40:01 +08:00
Jiang Jiang Jian
3c30e688c4 Merge branch 'feature/support_auto_adjust_voltage_storingInEfuse_openGlitchRst' into 'master' 
ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3

See merge request espressif/esp-idf!13395
 2021-05-13 03:49:59 +00:00
Angus Gratton
3f0851a22c Merge branch 'doc/esp_random' into 'master' 
esp_hw_support: Clarify the documentation about hardware RNG entropy

Closes IDF-73

See merge request espressif/esp-idf!13454
 2021-05-11 01:37:37 +00:00
Jan Brudný
a2686dc4eb bootloader: update copyright notice 2021-05-10 04:58:34 +02:00
chaijie
eea76d14bb ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3 
1. add some efuse api to get rtc & digital voltage
2. set dig_rtc voltage to a fix value storing in efuse no mater which cpu frequency
3. modify hardware code in bootloader to fit all c3 ECO3 version
 2021-05-08 17:56:54 +08:00
Angus Gratton
84f2f2932d Merge branch 'bugfix/esp_partition_get_sha256' into 'master' 
bootloader_support: Fix bootloader_common_get_sha256_of_partition when CHECK_SIGNATURE is on

Closes IDFGH-5089

See merge request espressif/esp-idf!12795
 2021-05-07 23:34:56 +00:00
Angus Gratton
4d4e094d81 esp_hw_support: Clarify the documentation about hardware RNG entropy 2021-05-06 16:59:02 +10:00
Michael (XIAO Xufeng)
58490418ad Merge branch 'feature/merge_c3_caps' into 'master' 
soc: merge C3 caps into a single soc_caps.h

See merge request espressif/esp-idf!13337
 2021-05-06 05:56:42 +00:00
KonstantinKondrashov
ca481e18e1 bootloader_support: Used esp_image_get_metadata() instead of esp_image_verify() 
- bootloader_common_get_sha256_of_partition will not do any unnecessery verifies.
- Used esp_image_get_metadata() instead of esp_image_verify().
 2021-05-05 11:53:57 +00:00
KonstantinKondrashov
d9be32629e bootloader: Fixed a case when signed OTA updates fail when debugger is attached due to the wrong image_len. 
And it fixed another case for bootloader_common_get_sha256_of_partition() when CHECK_SIGNATURE is on
- If RSA signature check is on in Kconfig then sha256 was 0xFFFFF...
because image_load gave image_len which pointed to the end of sign blocks.
And image_digest was filled from a wrong position.

Closes https://github.com/espressif/esp-idf/issues/6873
 2021-05-05 11:53:57 +00:00
Jeroen Domburg
2c75f63f89 * ets_delay_us(1) has too much overhead; change logic 
* Fix MR comments
 2021-04-28 16:38:24 +08:00
Marius Vikhammer
504a1e6102 soc: merge C3 caps into a single soc_caps.h 2021-04-28 14:42:35 +08:00
Shubham Patil
c2b0db75e8 bootloader_support: Fix min size of OTA partition in error log 2021-04-22 14:00:42 +05:30
Mahavir Jain
a4f38db53d
bootloader_support: fix min. revision error print for < C3-ECO3 revisions 2021-04-20 14:22:14 +05:30
Mahavir Jain
f9699e2412
bootloader: fix print related to min. chip revision 
Closes https://github.com/espressif/esp-idf/issues/6890
Closes IDFGH-5106
 2021-04-20 14:19:17 +05:30
Angus Gratton
83bf2e1ac1 bootloader: Fix "skip validate on exit deep sleep" when "Use RTC fast memory as heap" is enabled 
RTC region used to store boot partition needs to remain reserved in the app.
 2021-04-15 16:20:58 +10:00
KonstantinKondrashov
9f932a2a18 bootloader: Fix error in Make build system when signature options is on 2021-04-13 11:28:13 +00:00
Michael (XIAO Xufeng)
8cfcf6da7a Merge branch 'bugfix/enable_gpio18_gpio19_esp32c3' into 'master' 
gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3

Closes IDF-2964

See merge request espressif/esp-idf!12753
 2021-04-12 09:39:55 +00:00
Angus Gratton
268b23db96 bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip 
Closes https://github.com/espressif/esp-idf/issues/6191
 2021-04-12 18:49:17 +10:00
Omar Chebib
cd79f3907d gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3 
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
 2021-04-08 14:01:18 +08:00
Angus Gratton
70cab5bd81 Merge branch 'bugfix/ulp_riscv_unintended_wake' into 'master' 
ulp: unintended wakeup in ulp_riscv

See merge request espressif/esp-idf!12894
 2021-04-08 01:52:41 +00:00
chaijie
c101fc3e3d fix c3 hardware bug before ECO3 and optimizate bbpll config: 
1. deepsleep poweron reset bug in high temperature before ECO3;
2. brownout reset bug before ECO2;
3. bbpll voltage low bug before ECO3;
4. need xpd iph for xtal before ECO3;
 2021-03-31 13:08:56 +00:00
Renz Bagaporo
3639c2322b ulp: clear rtc int at initialization 
Closes https://github.com/espressif/esp-idf/issues/6654
 2021-03-31 17:15:55 +08:00
Mahavir Jain
531f14aa31 Merge branch 'feature/secure_boot_v1_add_tip_msg' into 'master' 
secure_boot_v1: Adds a help message in case when sig_block.version is not valid

Closes IDFGH-4982

See merge request espressif/esp-idf!12916
 2021-03-26 04:24:13 +00:00
KonstantinKondrashov
7f40717eb2 secure_boot/SIGNED_ON_UPDATE_NO_SECURE_BOOT: Only the first position of signature blocks is used to verify any update 2021-03-25 12:27:05 +00:00
KonstantinKondrashov
cbbd1e88a5 secure_boot_v1: Adds a help message in case when sig_block.version is not valid 
if sig_block.version is not valid then probably the image without a signature.
 2021-03-25 20:01:52 +08:00
Angus Gratton
fa2946d651 Merge branch 'feature/support_esp32s3_beta_3' into 'master' 
Support ESP32S3 beta 3 target

Closes IDF-2908

See merge request espressif/esp-idf!12661
 2021-03-23 10:17:58 +00:00
Marius Vikhammer
2aead8ba57 Support ESP32S3 Beta 3 target 
Update ROM API. Port changes from bringup branch.
 2021-03-18 10:24:22 +08:00
KonstantinKondrashov
a90f29fced wdt: Updates 2021-03-18 02:31:28 +08:00
Angus Gratton
6a29b45bd4 secure boot v2: Fix issue checking multiple signature blocks on OTA update 2021-03-15 12:30:20 +00:00
Angus Gratton
d709631393 secure boot: Add boot check for SBV2 "check app signature on update" 
As this mode uses the public keys attached to the existing app's signatures to
verify the next app, checking that a signature block is found on boot prevents
the possibility of deploying a non-updatable device from the factory.
 2021-03-15 12:30:20 +00:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot) 
- ESP32 ECO3, ESP32-S2/C3/S3
 2021-03-15 12:30:20 +00:00
Angus Gratton
fd164b82b6 Merge branch 'refactor/move_from_xtensa' into 'master' 
Movements from xtensa

Closes IDF-2164

See merge request espressif/esp-idf!10556
 2021-03-11 00:24:25 +00:00
Angus Gratton
6f362b9383 bootloader: Add config options to skip validation of app for minimum boot time 2021-03-10 14:00:46 +11:00
Angus Gratton
32ea7dc812 Merge branch 'feature/bootloader_disable_logs_unnecessary_warnings' into 'master' 
bootloader: Disables unnecessary warning logs when invalid magic byte

Closes IDF-1900

See merge request espressif/esp-idf!12514
 2021-03-09 06:28:46 +00:00
Angus Gratton
d6f4d99d93 core system: Fix warnings in compilation when assertions are disabled 
Adds a CI config for hello world that sets this, to catch future regressions
 2021-03-03 10:26:57 +11:00
KonstantinKondrashov
87aeef65a8 bootloader: Disables unnecessary warning logs when invalid magic byte 2021-03-01 20:34:54 +08:00
Renz Bagaporo
0f03f450ff esp_hw_support: create esp_cpu 
Create a esp_cpu header that contains CPU-related functions and
utilities.
 2021-02-26 13:34:29 +08:00
Angus Gratton
cbc58b85e2 Merge branch 'feature/adds_check_in_app_that_flash_enc_is_on' into 'master' 
bootloader: Adds a check that app is run under FE

Closes IDF-640

See merge request espressif/esp-idf!12368
 2021-02-25 22:39:13 +00:00
KonstantinKondrashov
90f2d3199a secure_boot: Checks secure boot efuses 
ESP32 V1 and V2 - protection bits.
ESP32xx V2: revoke bits, protection bits

- refactor efuse component
- adds some APIs for esp32 chips as well as for esp32xx chips
 2021-02-23 03:56:21 +08:00
KonstantinKondrashov
11a2f2acd3 bootloader: Adds a check that app is run under FE 2021-02-15 20:33:50 +08:00
Angus Gratton
2c39010b3b Merge branch 'bugfix/anti_rollback_without_test_app' into 'master' 
bootloader: Anti-rollback mode doesn't run test_app

See merge request espressif/esp-idf!12225
 2021-02-09 14:16:51 +08:00
Michael (XIAO Xufeng)
423a5458dc Merge branch 'bugfix/support_new_BYflash_chip_boot' into 'master' 
spi_flash: add external flash support on esp32c3

Closes IDF-2650, IDF-2651, and IDF-2399

See merge request espressif/esp-idf!12121
 2021-02-05 20:03:24 +08:00
Cao Sen Miao
cc1c6c30be flash: check boya chip support 2021-02-04 14:44:50 +08:00
KonstantinKondrashov
25ac1d4d28 bootloader: Anti-rollback mode doesn't run test_app 
- Cmake shows an error if the partition table has a test app.
- BOOTLOADER_APP_TEST depends on !BOOTLOADER_APP_ANTI_ROLLBACK.
- Bootloader does not boot the test app if secure version is low.

Closes: https://www.esp32.com/viewtopic.php?f=13&t=19164&p=71302#p71302
 2021-02-01 23:24:23 +08:00
KonstantinKondrashov
3ed226c362 efuse(esp32c3): Adds getting chip_revision and chip_pkg 2021-01-25 19:37:40 +08:00
Cao Sen Miao
9905da46e0 spi_flash: Add auto suspend mode on esp32c3 2021-01-25 11:14:02 +08:00
Angus Gratton
a7da0c894b Merge branch 'feature/c3_master_flash_enc_support' into 'master' 
flash encryption: merge C3 flash encryption changes to master

See merge request espressif/esp-idf!12040
 2021-01-22 12:58:38 +08:00
Angus Gratton
fe8a891de9 Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master' 
bootloader/esp32c3: Support secure boot

Closes IDF-2115

See merge request espressif/esp-idf!11797
 2021-01-21 08:42:49 +08:00
KonstantinKondrashov
88c5fe49b8 soc: Adds a soc_caps define for all chips to define the number of boot key digests 2021-01-19 20:51:13 +08:00
KonstantinKondrashov
98f726fa4b bootloader/esp32c3: Adds secure boot (not yet supported) 2021-01-19 20:51:13 +08:00
Marius Vikhammer
03fa63b0c9 bootloader: add flash encryption support for C3 
Adds flash encryption support for C3 and updates docs for S2 & C3
 2021-01-18 14:10:54 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
fuzhibo
312a0ad6c1 fix: support bootloader random enable for esp32c3 2021-01-11 14:41:09 +08:00
Angus Gratton
c535d569aa Merge branch 'bugfix/secure_boot_sig_failed_crash' into 'master' 
secure boot: Fix crash if signature verification fails in app

Closes IDFGH-4376

See merge request espressif/esp-idf!11846
 2021-01-08 16:23:29 +08:00
Angus Gratton
7069736c2a Merge branch 'feature/bootloader_uses_efuse_keys_api' into 'master' 
bootloader: Add using of efuse APIs for keys, purposes, wr/rd-protection bits

See merge request espressif/esp-idf!11110
 2021-01-08 11:29:50 +08:00
Konstantin Kondrashov
fbba2cb356 bootloader/esp32s2: Add using of efuse APIs for keys, purposes, wr/rd-protection bits for flash encryption, secure boot 2021-01-08 11:29:46 +08:00
Morozov-5F
a8837aa378 secure boot v2: Fix crash if signature verification fails in app 
sha_handle is "finished" when verify_secure_boot_signature() returns and
should be nulled out.

Alternative version of fix submitted in https://github.com/espressif/esp-idf/pull/6210

Closes https://github.com/espressif/esp-idf/pull/6210

Signed-off-by: Angus Gratton <angus@espressif.com>
 2020-12-31 14:43:47 +05:30
Marius Vikhammer
68608f804c esp32c3: Misc fixes needed to build & run 2020-12-31 15:20:05 +11:00
Marius Vikhammer
eb788deb03 esp_hw_support: merge C3 changes to master 
Merge RTC related C3 changes to master
 2020-12-30 12:20:41 +08:00
Angus Gratton
7a40b1695c Merge branch 'feature/esp32c3_small_changes' into 'master' 
esp32c3: Merge small target support changes

Closes IDF-2361

See merge request espressif/esp-idf!11714
 2020-12-24 12:36:12 +08:00
Marius Vikhammer
4ff8c7ae98 esp_rom/esp_system: Add flag for ROM multiple UART output, esp32c3 console 
From internal commit 6d894813
 2020-12-24 14:18:01 +11:00
Angus Gratton
adbf182bc5 bootloder_support: esp32c3 only supports XTS-AES-128 flash encryption 2020-12-24 13:40:01 +11:00
Supreet Deshpande
c4cf6d6d26 Secure boot v2: Fixes the issue of passing the flash calculated digest for ota verification. 2020-12-21 11:32:37 +05:30
Supreet Deshpande
e517b4953f Secure Boot v2: Fix the double padding of the image length during flash encryption 
Fixes https://github.com/espressif/esp-idf/issues/6236
 2020-12-21 11:32:37 +05:30
Angus Gratton
f50dd23872 Merge branch 'feature/merge_esp32c3_bootloader_support' into 'master' 
esp32c3: add initial bootloader and target component support

Closes IDF-2435 and IDF-2436

See merge request espressif/esp-idf!11433
 2020-12-11 15:36:28 +08:00
morris
3f287800eb bootloader_support: added esp32-c3 support 2020-12-11 11:45:10 +08:00
Marius Vikhammer
0c3714de1c bootloader_support: re-enable S2 unit test 
Re-enable "Verify unit test app image"
 2020-12-10 08:04:09 +00:00
Ivan Grokhotkov
89d39308a0 bootloader: avoid printing load addresses with '0x' 
Since idf_monitor decodes anything that looks like a code address and
starts with 0x, bootloader logs often get annotated with function
names such as WindowOverflow and other random and scary looking things
unrelated to the issue the user is facing. Print the addresses without
0x to avoid confusion by decoded function names. Print hexadecimal
size with 'h' suffix to distinguish it from the decimal value that
follows.
 2020-12-02 16:33:43 +01:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Supreet Deshpande
73d1be4281 Secure Boot V2: Fix an issue leading to manual enablement of Secure Boot v2. 
Fixes https://github.com/espressif/esp-idf/issues/6050
 2020-11-23 06:52:44 +00:00
Angus Gratton
420aef1ffe Updates for riscv support 
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
 2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit) 
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
 2020-11-11 07:36:35 +00:00
morris
9de6cba434 ci: add more build test for esp32-s3 2020-10-27 17:22:17 +08:00
Michael (XIAO Xufeng)
8926216723 Merge branch 'bugfix/esp32s2_adc_rng_registers' into 'master' 
esp32s2: Use regi2c registers to enable bootloader RNG

See merge request espressif/esp-idf!10941
 2020-10-26 13:55:05 +08:00
Angus Gratton
57d6026f97 Merge branch 'feature/efuse_support_for_esp32s3' into 'master' 
efuse: Adds support for esp32-s3 chip

See merge request espressif/esp-idf!10491
 2020-10-22 13:53:01 +08:00
Angus Gratton
cb12365221 Merge branch 'feature/add_inttypes_for_esp_app_format' into 'master' 
bootloader_support: Add missing inttypes include in esp_app_format.h

Closes IDFGH-3950

See merge request espressif/esp-idf!10921
 2020-10-22 12:16:22 +08:00
Angus Gratton
639e97437f esp32s2: Use regi2c registers to enable bootloader RNG 2020-10-22 14:39:59 +11:00
sU8U7SfkcwTJVH7PjaVmej7D
092b63f491 bootloader_support: Add missing inttypes include in esp_app_format.h 
Signed-off-by: KonstantinKondrashov <konstantin@espressif.com>

Closes: https://github.com/espressif/esp-idf/pull/5837
 2020-10-20 21:49:07 +08:00
Angus Gratton
4504318a28 Merge branch 'feature/esp32s2_bootloader_random' into 'master' 
bootloader_support: Enable RNG entropy source for ESP32-S2

Closes IDF-1347

See merge request espressif/esp-idf!8965
 2020-10-19 07:12:59 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h 
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
 2020-10-17 16:10:15 +08:00
Angus Gratton
04ecdd95cf bootloader_support makefile: Use consistent indentation 2020-10-16 18:48:26 +11:00
Angus Gratton
b35cb43caf bootloader_support: Add dummy ESP32-S3 RNG support 2020-10-16 18:48:26 +11:00
Angus Gratton
9311b1e7be esp32s2: Enable 8M clock source for RNG also 
Either of these options is sufficient to pass dieharder test suite with
bootloader random output, having both enabled is a bonus.
 2020-10-16 18:48:26 +11:00
Angus Gratton
699742acc6 esp32s2: Support bootloader_random_enable() 2020-10-16 18:48:26 +11:00
Angus Gratton
a416452657 Merge branch 'feature/skip_sha256_error_on_fpga' into 'master' 
bootloader: Skip a sha256 error on FPGA

See merge request espressif/esp-idf!10836
 2020-10-16 14:43:06 +08:00
Michael (XIAO Xufeng)
465e5050b6 Merge branch 'bugfix/fix_spi_flash_clock_config_error_s2' into 'master' 
bootloader_support: fix spi flash clock config error

See merge request espressif/esp-idf!10628
 2020-10-16 12:04:32 +08:00
KonstantinKondrashov
3c57d5e0a1 bootloader: Skip a sha256 error on FPGA 2020-10-15 13:27:54 +08:00
KonstantinKondrashov
66b9b589cb efuse: Adds support for esp32-s2 chip 2020-10-14 16:26:51 +08:00
Supreet Deshpande
2356be7c7a Secure Boot V2: Fixes the OTA regression with secure boot in ESP32-V3 
Closes https://github.com/espressif/esp-idf/issues/5905
 2020-10-12 07:15:16 +00:00
Michael (XIAO Xufeng)
637ca4b15d bootloader_support: fix fix spi flash clock config error 
Relates to: https://github.com/espressif/esp-idf/issues/5099
 2020-10-03 04:37:52 +00:00
Mahavir Jain
ab988ab5ca bootloader_support: move anti rollback API to common loader section 
API `bootloader_common_get_partition_description` is required for
anti-rollback feature and should be part of common loader code.
 2020-09-30 11:13:13 +05:30
Mahavir Jain
5b344610c9 bootloader_support: fix issue in memory mapping for getting app descriptor 
For getting secure_version field in anti rollback case, bootloader tries
to map whole firmware partition but fails for cases where partition size
is beyond available MMU free pages capacity.

Fix here insures to map only required length upto application descriptor
size in firmware partition.

Closes https://github.com/espressif/esp-idf/issues/5911
 2020-09-30 11:13:13 +05:30
morris
6225932201 bootloader_support: add esp32-s3 initial support 2020-09-22 15:15:03 +08:00
Michael (XIAO Xufeng)
3b2e8648eb bootloader: create public bootloader_flash.h header 
Move non-public functions into bootloader_flash_priv.h header
 2020-09-19 10:52:02 +08:00
Michael (XIAO Xufeng)
fefdee1349 bootloader: fix the WRSR format for ISSI flash chips 
1. The 2nd bootloader always call `rom_spiflash_unlock()`, but never help to clear the WEL bit when exit. This may cause system unstability.

   This commit helps to clear WEL when flash configuration is done.

   **RISK:** When the app starts, it didn't have to clear the WEL before it actually write/erase. But now the very first write/erase operation should be done after a WEL clear. Though the risk is little (all the following write/erase also need to clear the WEL), we still have to test this carefully, especially for those functions used by the OTA.

2. The `rom_spiflash_unlock()` function in the patch of ESP32 may (1) trigger the QPI, (2) clear the QE or (3) fail to unlock the ISSI chips.

   Status register bitmap of ISSI chip and GD chip:

| SR | ISSI | GD25LQ32C |
| -- | ---- | --------- |
| 0  | WIP  | WIP       |
| 1  | WEL  | WEL       |
| 2  | BP0  | BP0       |
| 3  | BP1  | BP1       |
| 4  | BP2  | BP2       |
| 5  | BP3  | BP3       |
| 6  | QE   | BP4       |
| 7  | SRWD | SRP0      |
| 8  |      | SRP1      |
| 9  |      | QE        |
| 10 |      | SUS2      |
| 11 |      | LB1       |
| 12 |      | LB2       |
| 13 |      | LB3       |
| 14 |      | CMP       |
| 15 |      | SUS1      |

   QE bit of other chips are at the bit 9 of the status register (i.e. bit 1 of SR2), which should be read by RDSR2 command.

   However, the RDSR2 (35H, Read Status 2) command for chip of other vendors happens to be the QIOEN (Enter QPI mode) command of ISSI chips. When the `rom_spiflash_unlock()` function trys to read SR2, it may trigger the QPI of ISSI chips.

   Moreover, when `rom_spiflash_unlock()` try to clear the BP4 bit in the status register, QE (bit 6) of ISSI chip may be cleared by accident. Or if the ISSI chip doesn't accept WRSR command with argument of two bytes (since it only have status register of one byte), it may fail to clear the other protect bits (BP0~BP3) as expected.

   This commit makes the `rom_spiflash_unlock()` check whether the vendor is issi. if so, `rom_spiflash_unlock()` only send RDSR to read the status register, send WRSR with only 1 byte argument, and also avoid clearing the QE bit (bit 6).

3. `rom_spiflash_unlock()` always send WRSR command to clear protection bits even when there is no protection bit active. And the execution of clearing status registers, which takes about 700us, will also happen even when there's no bits cleared.

   This commit skips the clearing of status register if there is no protection bits active.

Also move the execute_flash_command to be a bootloader API; move
implementation of spi_flash_wrap_set to the bootloader
 2020-09-19 10:51:51 +08:00
KonstantinKondrashov
2373f115fc efuse/esp32: Expands PKG_VER from 3 bit to 4 bits 
Closes: IDF-1919
 2020-09-17 07:44:37 +00:00
KonstantinKondrashov
09af4a9fad bootloader: Fix esp_get_flash_encryption_mode(). RELEASE = (CRYPT_CNT == max) or (CRYPT_CNT.write_protect == true) 
If the CRYPT_CNT efuse is max it means the same as a write protection bit for this efuse.

Closes: https://github.com/espressif/esp-idf/issues/5747
 2020-09-11 04:20:23 +00:00
Ivan Grokhotkov
b6467257b9 Merge branch 'feature/cmock_component' into 'master' 
cmock as component replacing unity

See merge request espressif/esp-idf!9859
 2020-09-10 16:06:20 +08:00
Ivan Grokhotkov
26016534d8 bootloader: move rtc_retain_mem functions back into .iram_loader.text 
Introduced 66a32c17 when bootloader_common was moved out of the loader
section.

Also add a test for this configuration.
 2020-09-09 10:35:29 +02:00
Ivan Grokhotkov
66a32c1707 bootloader: fix section placement issues found by the check script 
Summary of changes:

- bootloader_clock split into *_clock_init and *_clock_loader.
  Only esp_clk_apb_freq is in *_clock_loader.
- bootloader_common moved out of loader; functions needed in loader
  (or, referenced from bootloader_utility) were moved into
  bootloader_common_loader.c.
- assert and abort moved into bootloader_panic, made part of the
  loader
- rtc_clk and rtc_time made part of loader
 2020-09-03 18:14:17 +02:00
Michael (XIAO Xufeng)
9e7eda9770 Merge branch 'feat/spi_flash_override_size' into 'master' 
spi_flash: add config option to override flash size in bootloader header

See merge request espressif/esp-idf!10131
 2020-09-03 02:57:31 +08:00
Jakob Hasse
20c068ef3b cmock: added cmock as component 
* changing dependencies from unity->cmock
* added component.mk and Makefile.projbuild
* ignore test dir in gen_esp_err_to_name.py
* added some brief introduction of CMock in IDF
 2020-09-02 16:38:37 +08:00
Michael (XIAO Xufeng)
37423083bb spi_flash: add config option to override flash size in bootloader header 
Sometimes the flash size read from bootloader is not correct. This may
forbid SPI Flash driver from reading the the area larger than the size
in bootloader header.

When the new config option is enabled, the latest configured
ESPTOOLPY_FLAHSIZE in the app header will be used to override the value
read from bootloader header.
 2020-09-02 00:35:53 +08:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
Sachin Billore
f1dae0d6e1 ESP32 SecureBoot V2: eFuse write operations are updated to use the eFuse Manager APIs 
Closes IDF-2034

Closes https://github.com/espressif/esp-idf/issues/5771
 2020-08-27 04:24:04 +00:00
Angus Gratton
a2dc60b254 Merge branch 'feature/secure_boot_esp32s2' into 'master' 
Feature/secure boot esp32s2

See merge request espressif/esp-idf!8254
 2020-07-28 16:39:34 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
Angus Gratton
a91bd4078f secure boot: Fixes for ESP32-S2 first boot logic 2020-07-27 00:01:10 +00:00
Angus Gratton
bfc3f85826 bootloader esp32s2: Fix return type of ROM function signature verification 2020-07-27 00:01:10 +00:00
Supreet Deshpande
e640e148cf Secure boot v2 support for ESP32-S2 2020-07-27 00:01:10 +00:00
Angus Gratton
c871c349f2 Merge branch 'bugfix/bootloader_common_get_sha256_of_partition' into 'master' 
bootloader_support: Fix bootloader_common_get_sha256_of_partition(), can handle a long image

Closes IDFGH-3594

See merge request espressif/esp-idf!9509
 2020-07-23 13:27:48 +08:00
morris
ab0537c079 esp_rom: extract common MD5 hash apis into esp_rom_md5.h 2020-07-21 17:01:28 +08:00
Angus Gratton
442736c5d6 Merge branch 'refactor/common_rom_uart_apis' into 'master' 
esp_rom: extract common uart apis into esp_rom_uart.h

See merge request espressif/esp-idf!9313
 2020-07-21 15:24:21 +08:00
Angus Gratton
3755fb6597 Merge branch 'feature/add_esp32s3_bootloader_ld_file' into 'master' 
move part of esp32-s3 codes to master (bootloader linker, esp32s3 empty componnet)

See merge request espressif/esp-idf!9608
 2020-07-21 14:51:04 +08:00
KonstantinKondrashov
d95c89a1eb bootloader_support: Fix bootloader_common_get_sha256_of_partition, can handle a long image 
Closes: IDFGH-3594
 2020-07-20 10:55:41 +00:00
Angus Gratton
c09fdc0b09 esp32: Use package identifier to look up SPI flash/PSRAM WP Pin, unless overridden 
Allows booting in QIO/QOUT mode or with PSRAM on ESP32-PICO-V3 and
ESP32-PICO-V3-O2 without any config changes.

Custom WP pins (needed for fully custom circuit boards) should still be compatible.
 2020-07-20 14:08:49 +08:00
chenjianqiang
e9dd4f283a feat(esp32): support for esp32-pico-v3-02 2020-07-20 12:21:32 +08:00
morris
6316e6eba2 esp_system: add CONFIG_ESP_SYSTEM_RTC_EXT_CRYS 2020-07-20 11:15:24 +08:00
morris
b587428e5d bootloader: make bootloader offset address in flash configurable 2020-07-20 10:51:05 +08:00
morris
345606e7f3 esp_rom: extract common uart apis into esp_rom_uart.h 2020-07-17 16:00:59 +08:00
morris
458b14a8ea esp_rom: extract common efuse apis into esp_rom_efuse.h 2020-07-15 10:40:50 +08:00
morris
a4d0033c03 esp_rom: extract common GPIO apis into esp_rom_gpio.h 2020-07-07 11:40:19 +08:00
Ivan Grokhotkov
6dfb2d83a7 bootloader: combine console code for ESP32 and S2, add USB support 2020-06-26 15:38:49 +02:00
Ivan Grokhotkov
5ee75165f2 esp_common: add "USB CDC" option for console output 2020-06-26 15:38:49 +02:00
Ivan Grokhotkov
0620890028 bootloader, rtc: don't disable PLL if it is already enabled 2020-06-24 15:50:51 +02:00
morris
a34409cffc esp_rom: extract common CRC apis into esp_rom_crc.h 2020-06-23 16:40:14 +08:00
Angus Gratton
a5683f2263 Merge branch 'bugfix/efuse_logs' into 'master' 
esp32/esp32s2: Reduce using ESP_EARLY_LOGx and move some code after the stdout initialization in startup code

Closes IDFGH-3367

See merge request espressif/esp-idf!8904
 2020-06-16 13:47:02 +08:00
morris
067b1b91c2 global: add new target name: esp32-s3 
add target name, chip ID, toochain descriptions for ESP32-S3
 2020-06-11 21:40:08 +08:00