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Support ESP32S3 Beta 3 target

Browse Source 
Update ROM API. Port changes from bringup branch.
This commit is contained in:
Marius Vikhammer 2021-03-17 18:48:05 +08:00
parent e2919eca8e
commit 2aead8ba57
58 changed files with 5112 additions and 2552 deletions
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8
Kconfig
View File

@ -48,14 +48,14 @@ mainmenu "Espressif IoT Development Framework Configuration"
choice IDF_TARGET_ESP32S3_BETA_VERSION
prompt "ESP32-S3 beta version"
depends on IDF_TARGET_ESP32S3
default IDF_TARGET_ESP32S3_BETA_VERSION_2
default IDF_TARGET_ESP32S3_BETA_VERSION_3
help
Currently ESP32-S3 has several beta versions for internal use only.
Select the one that matches your chip model.
config IDF_TARGET_ESP32S3_BETA_VERSION_2
config IDF_TARGET_ESP32S3_BETA_VERSION_3
bool
prompt "ESP32-S3 beta2"
prompt "ESP32-S3 beta3"
endchoice
config IDF_TARGET_ESP32C3
@ -68,8 +68,8 @@ mainmenu "Espressif IoT Development Framework Configuration"
hex
default 0x0000 if IDF_TARGET_ESP32
default 0x0002 if IDF_TARGET_ESP32S2
default 0x0004 if IDF_TARGET_ESP32S3
default 0x0005 if IDF_TARGET_ESP32C3
default 0x0006 if IDF_TARGET_ESP32S3
default 0xFFFF
menu "SDK tool configuration"

2
components/bootloader_support/include/esp_app_format.h
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@ -22,8 +22,8 @@
typedef enum {
ESP_CHIP_ID_ESP32 = 0x0000, /*!< chip ID: ESP32 */
ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */
ESP_CHIP_ID_ESP32S3 = 0x0004, /*!< chip ID: ESP32-S3 */
ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
ESP_CHIP_ID_ESP32S3 = 0x0006, /*!< chip ID: ESP32-S3 */
ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
} __attribute__((packed)) esp_chip_id_t;

5
components/bootloader_support/src/bootloader_console_loader.c
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@ -27,6 +27,11 @@
#include "esp32s2/rom/usb/usb_dc.h"
#include "esp32s2/rom/usb/cdc_acm.h"
#include "esp32s2/rom/usb/usb_persist.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
#include "esp32s3/rom/usb/usb_dc.h"
#include "esp32s3/rom/usb/cdc_acm.h"
#include "esp32s3/rom/usb/usb_persist.h"
#endif
#ifdef CONFIG_ESP_CONSOLE_USB_CDC

3
components/bootloader_support/src/bootloader_flash_config_esp32s3.c
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@ -32,7 +32,8 @@
void bootloader_flash_update_id()
{
g_rom_flashchip.device_id = bootloader_read_flash_id();
esp_rom_spiflash_chip_t *chip = &rom_spiflash_legacy_data->chip;
chip->device_id = bootloader_read_flash_id();
}
void IRAM_ATTR bootloader_flash_cs_timing_config()

2
components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
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@ -290,7 +290,9 @@ static void bootloader_check_wdt_reset(void)
static void bootloader_super_wdt_auto_feed(void)
{
REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, RTC_CNTL_SWD_WKEY_VALUE);
REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_AUTO_FEED_EN);
REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0);
}
esp_err_t bootloader_init(void)

2
components/bootloader_support/src/flash_partitions.c
View File

@ -19,6 +19,8 @@
#include "esp32c3/rom/spi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/spi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/spi_flash.h"
#else
#include "esp32/rom/spi_flash.h"
#endif

3
components/driver/i2c.c
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@ -13,6 +13,7 @@
// limitations under the License.
#include <string.h>
#include <stdio.h>
#include "sdkconfig.h"
#include "esp_types.h"
#include "esp_attr.h"
#include "esp_intr_alloc.h"
@ -779,7 +780,7 @@ esp_err_t i2c_get_data_timing(i2c_port_t i2c_num, int *sample_time, int *hold_ti
esp_err_t i2c_set_timeout(i2c_port_t i2c_num, int timeout)
{
I2C_CHECK(i2c_num < I2C_NUM_MAX, I2C_NUM_ERROR_STR, ESP_ERR_INVALID_ARG);
I2C_CHECK((timeout <= I2C_TIME_OUT_REG_V) && (timeout > 0), I2C_TIMEING_VAL_ERR_STR, ESP_ERR_INVALID_ARG);
I2C_CHECK((timeout <= I2C_LL_MAX_TIMEOUT) && (timeout > 0), I2C_TIMEING_VAL_ERR_STR, ESP_ERR_INVALID_ARG);
I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
i2c_hal_set_tout(&(i2c_context[i2c_num].hal), timeout);

14
components/esp32s3/clk.c
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@ -17,30 +17,22 @@
#include "esp_attr.h"
#include "esp32s3/clk.h"
#include "esp32s3/rom/ets_sys.h"
#include "soc/rtc.h"
#define MHZ (1000000)
// g_ticks_us defined in ROMs for PRO and APP CPU
extern uint32_t g_ticks_per_us_pro;
int IRAM_ATTR esp_clk_cpu_freq(void)
{
return g_ticks_per_us_pro * MHZ;
return ets_get_cpu_frequency() * MHZ;
}
int IRAM_ATTR esp_clk_apb_freq(void)
{
return MIN(g_ticks_per_us_pro, 80) * MHZ;
return MIN(ets_get_cpu_frequency(), 80) * MHZ;
}
int IRAM_ATTR esp_clk_xtal_freq(void)
{
return rtc_clk_xtal_freq_get() * MHZ;
}
void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us)
{
/* Update scale factors used by esp_rom_delay_us */
g_ticks_per_us_pro = ticks_per_us;
}

3
components/esp32s3/ld/esp32s3.peripherals.ld
View File

@ -31,7 +31,8 @@ PROVIDE ( I2C1 = 0x60027000 );
PROVIDE ( TWAI = 0x6002B000 );
PROVIDE ( GPSPI4 = 0x60037000 );
PROVIDE ( GDMA = 0x6003F000 );
PROVIDE ( UART2 = 0x6001e000 );
PROVIDE ( UART2 = 0x6002E000 );
PROVIDE ( DMA = 0x6003F000 );
PROVIDE ( APB_SARADC = 0x60040000 );
PROVIDE ( LCD_CAM = 0x60041000 );
PROVIDE ( USB0 = 0x60080000 );

9
components/esp_hw_support/port/esp32s3/rtc_init.c
View File

@ -20,6 +20,7 @@
#include "soc/gpio_reg.h"
#include "soc/spi_mem_reg.h"
#include "soc/extmem_reg.h"
#include "soc/syscon_reg.h"
#include "regi2c_ctrl.h"
#include "regi2c_ulp.h"
#include "soc_log.h"
@ -53,8 +54,8 @@ void rtc_init(rtc_config_t cfg)
REG_SET_FIELD(RTC_CNTL_TIMER4_REG, RTC_CNTL_DG_WRAP_POWERUP_TIMER, rtc_init_cfg.dg_wrap_powerup_cycles);
REG_SET_FIELD(RTC_CNTL_TIMER4_REG, RTC_CNTL_DG_WRAP_WAIT_TIMER, rtc_init_cfg.dg_wrap_wait_cycles);
// set rtc memory timer
REG_SET_FIELD(RTC_CNTL_TIMER5_REG, RTC_CNTL_RTCMEM_POWERUP_TIMER, rtc_init_cfg.rtc_mem_powerup_cycles);
REG_SET_FIELD(RTC_CNTL_TIMER5_REG, RTC_CNTL_RTCMEM_WAIT_TIMER, rtc_init_cfg.rtc_mem_wait_cycles);
REG_SET_FIELD(RTC_CNTL_TIMER5_REG, RTC_CNTLMEM_POWERUP_TIMER, rtc_init_cfg.rtc_mem_powerup_cycles);
REG_SET_FIELD(RTC_CNTL_TIMER5_REG, RTC_CNTLMEM_WAIT_TIMER, rtc_init_cfg.rtc_mem_wait_cycles);
/* Reset RTC bias to default value (needed if waking up from deep sleep) */
REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG_SLEEP, RTC_CNTL_DBIAS_1V10);
@ -64,9 +65,9 @@ void rtc_init(rtc_config_t cfg)
//clear CMMU clock force on
CLEAR_PERI_REG_MASK(EXTMEM_CACHE_MMU_POWER_CTRL_REG, EXTMEM_CACHE_MMU_MEM_FORCE_ON);
//clear rom clock force on
REG_SET_FIELD(SYSTEM_ROM_CTRL_0_REG, SYSTEM_ROM_IRAM0_CLKGATE_FORCE_ON, 0);
REG_SET_FIELD(SYSCON_CLKGATE_FORCE_ON_REG, SYSCON_ROM_CLKGATE_FORCE_ON, 0);
//clear sram clock force on
REG_SET_FIELD(SYSTEM_SRAM_CTRL_0_REG, SYSTEM_SRAM_CLKGATE_FORCE_ON, 0);
REG_SET_FIELD(SYSCON_CLKGATE_FORCE_ON_REG, SYSCON_SRAM_CLKGATE_FORCE_ON, 0);
//clear tag clock force on
CLEAR_PERI_REG_MASK(EXTMEM_DCACHE_TAG_POWER_CTRL_REG, EXTMEM_DCACHE_TAG_MEM_FORCE_ON);
CLEAR_PERI_REG_MASK(EXTMEM_ICACHE_TAG_POWER_CTRL_REG, EXTMEM_ICACHE_TAG_MEM_FORCE_ON);

12
components/esp_hw_support/port/esp32s3/rtc_sleep.c
View File

@ -27,6 +27,8 @@
#include "soc/rtc.h"
#include "regi2c_ctrl.h"
#define RTC_CNTL_MEM_FOLW_CPU (RTC_CNTL_SLOWMEM_FOLW_CPU | RTC_CNTL_FASTMEM_FOLW_CPU)
/**
* Configure whether certain peripherals are powered up in sleep
* @param cfg power down flags as rtc_sleep_pu_config_t structure
@ -47,16 +49,14 @@ void rtc_sleep_pu(rtc_sleep_pu_config_t cfg)
REG_SET_FIELD(FE_GEN_CTRL, FE_IQ_EST_FORCE_PU, cfg.fe_fpu);
REG_SET_FIELD(FE2_TX_INTERP_CTRL, FE2_TX_INF_FORCE_PU, cfg.fe_fpu);
if (cfg.sram_fpu) {
REG_SET_FIELD(SYSTEM_SRAM_CTRL_2_REG, SYSTEM_SRAM_POWER_UP, SYSTEM_SRAM_POWER_UP);
REG_SET_FIELD(APB_CTRL_MEM_POWER_UP_REG, APB_CTRL_SRAM_POWER_UP, APB_CTRL_SRAM_POWER_UP);
} else {
REG_SET_FIELD(SYSTEM_SRAM_CTRL_2_REG, SYSTEM_SRAM_POWER_UP, 0);
REG_SET_FIELD(APB_CTRL_MEM_POWER_UP_REG, APB_CTRL_SRAM_POWER_UP, 0);
}
if (cfg.rom_ram_fpu) {
SET_PERI_REG_MASK(SYSTEM_ROM_CTRL_1_REG, SYSTEM_ROM_IRAM0_DRAM0_POWER_UP);
REG_SET_FIELD(SYSTEM_ROM_CTRL_1_REG, SYSTEM_ROM_IRAM0_POWER_UP, SYSTEM_ROM_IRAM0_POWER_UP);
REG_SET_FIELD(APB_CTRL_MEM_POWER_UP_REG, APB_CTRL_ROM_POWER_UP, APB_CTRL_ROM_POWER_UP);
} else {
CLEAR_PERI_REG_MASK(SYSTEM_ROM_CTRL_1_REG, SYSTEM_ROM_IRAM0_DRAM0_POWER_UP);
REG_SET_FIELD(SYSTEM_ROM_CTRL_1_REG, SYSTEM_ROM_IRAM0_POWER_UP, 0);
REG_SET_FIELD(APB_CTRL_MEM_POWER_UP_REG, APB_CTRL_ROM_POWER_UP, 0);
}
}

8
components/esp_rom/CMakeLists.txt
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@ -28,8 +28,7 @@ if(BOOTLOADER_BUILD)
rom_linker_script("spiflash")
elseif(target STREQUAL "esp32s3")
rom_linker_script("newlib-funcs")
rom_linker_script("spiflash")
rom_linker_script("newlib")
elseif(target STREQUAL "esp32c3")
rom_linker_script("newlib")
@ -77,9 +76,8 @@ else() # Regular app build
target_sources(${COMPONENT_LIB} PRIVATE "esp32s2/usb_descriptors.c")
elseif(target STREQUAL "esp32s3")
rom_linker_script("newlib-funcs")
rom_linker_script("newlib-data")
rom_linker_script("spiflash")
rom_linker_script("newlib")
rom_linker_script("version")
if(CONFIG_NEWLIB_NANO_FORMAT)
rom_linker_script("newlib-nano")

8
components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld
View File

@ -32,10 +32,12 @@ PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
/* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
/* so here we directly assign the symbols with the ROM API address */
PROVIDE ( esp_rom_md5_init = 0x400376a0 );
PROVIDE ( esp_rom_md5_update = 0x400376c0 );
PROVIDE ( esp_rom_md5_final = 0x40037740 );
PROVIDE ( esp_rom_md5_init = 0x40001ac4 );
PROVIDE ( esp_rom_md5_update = 0x40001ad0 );
PROVIDE ( esp_rom_md5_final = 0x40001adc );
PROVIDE ( esp_rom_printf = ets_printf );
PROVIDE ( esp_rom_delay_us = ets_delay_us );
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
PROVIDE( esp_rom_spiflash_attach = spi_flash_attach );

4273
components/esp_rom/esp32s3/ld/esp32s3.rom.ld
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File diff suppressed because it is too large Load Diff

200
components/esp_rom/esp32s3/ld/esp32s3.rom.libgcc.ld
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@ -1,99 +1,105 @@
/**
* Unlike other ROM functions which declare weak symbols using PROVIDE,
* these libgcc functions are exported using assignment, which declare strong symbols.
/* ROM function interface esp32s3.rom.libgcc.ld for esp32s3
*
* Note: These ROM functions are always linked instead of the ones provided by libgcc.a.
*
* Generated from ./interface-esp32s3.yml md5sum 36d43c36b9d0f4f082f71c819ad53470
*
* Compatible with ROM where ECO version equal or greater to 0.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
__absvdi2 = 0x40037f14;
__absvsi2 = 0x40037f00;
__adddf3 = 0x4003bd5c;
__addsf3 = 0x4003b9f0;
__addvdi3 = 0x4003c488;
__addvsi3 = 0x4003c464;
__ashldi3 = 0x40055928;
__ashrdi3 = 0x40055940;
__bswapdi2 = 0x40039054;
__bswapsi2 = 0x4003902c;
__clear_cache = 0x40037ef8;
__clrsbdi2 = 0x400390c8;
__clrsbsi2 = 0x400390b0;
__clzdi2 = 0x40055bbc;
__clzsi2 = 0x400558f8;
__cmpdi2 = 0x40037eb8;
__ctzdi2 = 0x40055bd0;
__ctzsi2 = 0x40055900;
__divdc3 = 0x40038b74;
__divdf3 = 0x4003c120;
__divdi3 = 0x40055bf0;
__divsc3 = 0x400388d4;
__divsf3 = 0x40055974;
__divsi3 = 0x400558c8;
__eqdf2 = 0x40037d40;
__eqsf2 = 0x40037a0c;
__extendsfdf2 = 0x4003c400;
__ffsdi2 = 0x40055b98;
__ffssi2 = 0x40055914;
__fixdfdi = 0x4003c290;
__fixdfsi = 0x4003c244;
__fixsfdi = 0x4003bc18;
__fixsfsi = 0x4003bbd8;
__fixunsdfsi = 0x4003c2fc;
__fixunssfdi = 0x4003bcd0;
__fixunssfsi = 0x4003bc78;
__floatdidf = 0x40055af4;
__floatdisf = 0x40055a2c;
__floatsidf = 0x40055ab0;
__floatsisf = 0x400559dc;
__floatundidf = 0x40055ae4;
__floatundisf = 0x40055a1c;
__floatunsidf = 0x40055aa4;
__floatunsisf = 0x400559d0;
__gcc_bcmp = 0x40039100;
__gedf2 = 0x40037e00;
__gesf2 = 0x40037aa4;
__gtdf2 = 0x40037d74;
__gtsf2 = 0x40037a38;
__ledf2 = 0x40037d9c;
__lesf2 = 0x40037a58;
__lshrdi3 = 0x4005595c;
__ltdf2 = 0x40037e28;
__ltsf2 = 0x40037ac4;
__moddi3 = 0x40055eb8;
__modsi3 = 0x400558d0;
__muldc3 = 0x4003829c;
__muldf3 = 0x40037c24;
__muldi3 = 0x40055b68;
__mulsc3 = 0x40037fd8;
__mulsf3 = 0x40037960;
__mulsi3 = 0x400558c0;
__mulvdi3 = 0x4003c548;
__mulvsi3 = 0x4003c530;
__nedf2 = 0x40037d40;
__negdf2 = 0x40037b38;
__negdi2 = 0x40055b80;
__negsf2 = 0x4003b9c8;
__negvdi2 = 0x4003c664;
__negvsi2 = 0x4003c644;
__nesf2 = 0x40037a0c;
__nsau_data = 0x3ff07430;
__paritysi2 = 0x4003c730;
__popcountdi2 = 0x4003c6d8;
__popcountsi2 = 0x4003c6a0;
__popcount_tab = 0x3ff07430;
__powidf2 = 0x40037f74;
__powisf2 = 0x40037f34;
__subdf3 = 0x4003beb0;
__subsf3 = 0x4003bad8;
__subvdi3 = 0x4003c4ec;
__subvsi3 = 0x4003c4c8;
__truncdfsf2 = 0x4003c35c;
__ucmpdi2 = 0x40037ed8;
__udivdi3 = 0x40056160;
__udivmoddi4 = 0x40039140;
__udivsi3 = 0x400558d8;
__udiv_w_sdiv = 0x40039138;
__umoddi3 = 0x400563e4;
__umodsi3 = 0x400558e0;
__umulsidi3 = 0x400558e8;
__unorddf2 = 0x40037e8c;
__unordsf2 = 0x40037b10;
/***************************************
Group libgcc
***************************************/
/* Functions */
__absvdi2 = 0x40001fd4;
__absvsi2 = 0x40001fe0;
__adddf3 = 0x40001fec;
__addsf3 = 0x40001ff8;
__addvdi3 = 0x40002004;
__addvsi3 = 0x40002010;
__ashldi3 = 0x4000201c;
__ashrdi3 = 0x40002028;
__bswapdi2 = 0x40002034;
__bswapsi2 = 0x40002040;
__clear_cache = 0x4000204c;
__clrsbdi2 = 0x40002058;
__clrsbsi2 = 0x40002064;
__clzdi2 = 0x40002070;
__clzsi2 = 0x4000207c;
__cmpdi2 = 0x40002088;
__ctzdi2 = 0x40002094;
__ctzsi2 = 0x400020a0;
__divdc3 = 0x400020ac;
__divdf3 = 0x400020b8;
__divdi3 = 0x400020c4;
__divsc3 = 0x400020d0;
__divsf3 = 0x400020dc;
__divsi3 = 0x400020e8;
__eqdf2 = 0x400020f4;
__eqsf2 = 0x40002100;
__extendsfdf2 = 0x4000210c;
__ffsdi2 = 0x40002118;
__ffssi2 = 0x40002124;
__fixdfdi = 0x40002130;
__fixdfsi = 0x4000213c;
__fixsfdi = 0x40002148;
__fixsfsi = 0x40002154;
__fixunsdfsi = 0x40002160;
__fixunssfdi = 0x4000216c;
__fixunssfsi = 0x40002178;
__floatdidf = 0x40002184;
__floatdisf = 0x40002190;
__floatsidf = 0x4000219c;
__floatsisf = 0x400021a8;
__floatundidf = 0x400021b4;
__floatundisf = 0x400021c0;
__floatunsidf = 0x400021cc;
__floatunsisf = 0x400021d8;
__gcc_bcmp = 0x400021e4;
__gedf2 = 0x400021f0;
__gesf2 = 0x400021fc;
__gtdf2 = 0x40002208;
__gtsf2 = 0x40002214;
__ledf2 = 0x40002220;
__lesf2 = 0x4000222c;
__lshrdi3 = 0x40002238;
__ltdf2 = 0x40002244;
__ltsf2 = 0x40002250;
__moddi3 = 0x4000225c;
__modsi3 = 0x40002268;
__muldc3 = 0x40002274;
__muldf3 = 0x40002280;
__muldi3 = 0x4000228c;
__mulsc3 = 0x40002298;
__mulsf3 = 0x400022a4;
__mulsi3 = 0x400022b0;
__mulvdi3 = 0x400022bc;
__mulvsi3 = 0x400022c8;
__nedf2 = 0x400022d4;
__negdf2 = 0x400022e0;
__negdi2 = 0x400022ec;
__negsf2 = 0x400022f8;
__negvdi2 = 0x40002304;
__negvsi2 = 0x40002310;
__nesf2 = 0x4000231c;
__paritysi2 = 0x40002328;
__popcountdi2 = 0x40002334;
__popcountsi2 = 0x40002340;
__powidf2 = 0x4000234c;
__powisf2 = 0x40002358;
__subdf3 = 0x40002364;
__subsf3 = 0x40002370;
__subvdi3 = 0x4000237c;
__subvsi3 = 0x40002388;
__truncdfsf2 = 0x40002394;
__ucmpdi2 = 0x400023a0;
__udivdi3 = 0x400023ac;
__udivmoddi4 = 0x400023b8;
__udivsi3 = 0x400023c4;
__udiv_w_sdiv = 0x400023d0;
__umoddi3 = 0x400023dc;
__umodsi3 = 0x400023e8;
__unorddf2 = 0x400023f4;
__unordsf2 = 0x40002400;

19
components/esp_rom/esp32s3/ld/esp32s3.rom.newlib-data.ld
View File

@ -1,19 +0,0 @@
/**
* These are the .bss/.data symbols used by newlib functions present in ESP32S3 ROM.
* See also esp32s3.rom.newlib-funcs.ld for the list of general newlib functions.
*
* Unlike other ROM functions which declare weak symbols using PROVIDE,
* newlib related functions are exported using assignment, which declare strong symbols.
*
* Note: These ROM data are always linked instead of the ones provided by libc.a.
*/
_ctype_ = 0x3ff0732c;
__default_global_locale = 0x3ff071c0;
_global_impure_ptr = 0x3fcefcdc;
__global_locale_ptr = 0x3fcefccc;
_PathLocale = 0x3fcefcd0;
__sf_fake_stderr = 0x3ff0c524;
__sf_fake_stdin = 0x3ff0c564;
__sf_fake_stdout = 0x3ff0c544;
__sinit_recursive_mutex = 0x3fcefcd4;
__sfp_recursive_mutex = 0x3fcefcd8;

129
components/esp_rom/esp32s3/ld/esp32s3.rom.newlib-funcs.ld
View File

@ -1,129 +0,0 @@
/**
* These are the newlib functions present in ESP32S3 ROM.
* See also esp32s3.rom.newlib-data.ld for the list of .data/.bss symbols used by these functions,
* See also esp32s3.rom.newlib-nano.ld for "nano" versions of printf/scanf family of functions.
*
* Unlike other ROM functions which declare weak symbols using PROVIDE,
* newlib related functions are exported using assignment, which declare strong symbols.
*
* Note: These ROM functions are always linked instead of the ones provided by libc.a.
*/
abs = 0x40032344;
__ascii_mbtowc = 0x40039ec4;
__ascii_wctomb = 0x40033cb0;
__assert = 0x40054a5c;
__assert_func = 0x40054a30;
atoi = 0x40032984;
_atoi_r = 0x40032994;
atol = 0x400329ac;
_atol_r = 0x400329bc;
bzero = 0x40039d84;
_cleanup_r = 0x40054a6c;
creat = 0x40039d48;
div = 0x4003234c;
fclose = 0x40054e9c;
_fclose_r = 0x40054da4;
fflush = 0x40033fd8;
_fflush_r = 0x40033f50;
__fp_unlock_all = 0x40054cd4;
__fputwc = 0x40033b2c;
fputwc = 0x40033c40;
_fputwc_r = 0x40033bc0;
_fwalk = 0x40056670;
_fwalk_reent = 0x400566b0;
isalnum = 0x40039d94;
isalpha = 0x40039da4;
isascii = 0x4005546c;
_isatty_r = 0x40039d5c;
isblank = 0x40039db4;
iscntrl = 0x40039dd4;
isdigit = 0x40039dec;
isgraph = 0x40039e24;
islower = 0x40039e04;
isprint = 0x40039e3c;
ispunct = 0x40039e50;
isspace = 0x40039e68;
isupper = 0x40039e80;
__itoa = 0x40032938;
itoa = 0x40032974;
labs = 0x40032370;
ldiv = 0x40032378;
__locale_ctype_ptr = 0x40034050;
__locale_ctype_ptr_l = 0x40034048;
__locale_mb_cur_max = 0x40034030;
longjmp = 0x400322d0;
_mbtowc_r = 0x40039e9c;
memccpy = 0x40039ee8;
memchr = 0x40039f5c;
memcmp = 0x40055480;
memcpy = 0x40055528;
memmove = 0x40055620;
memrchr = 0x40039ff8;
memset = 0x40055710;
qsort = 0x4003239c;
rand_r = 0x4003a170;
__sclose = 0x40054d90;
__seofread = 0x40054d1c;
setjmp = 0x4003226c;
setlocale = 0x40034068;
_setlocale_r = 0x40033ffc;
__sflush_r = 0x40033dc8;
__sfmoreglue = 0x40054ab4;
__sfp = 0x40054bdc;
__sfp_lock_acquire = 0x40054c8c;
__sfp_lock_release = 0x40054c98;
__sfvwrite_r = 0x40033674;
__sinit = 0x40054af4;
__sinit_lock_acquire = 0x40054ca4;
__sinit_lock_release = 0x40054cb0;
__smakebuf_r = 0x40033d28;
srand = 0x4003a094;
__sread = 0x40054cec;
__sseek = 0x40054d5c;
strcasecmp = 0x4003a1bc;
strcasestr = 0x4003a850;
strcat = 0x4003aba8;
strchr = 0x4003abec;
strcmp = 0x4003acd8;
strcoll = 0x4003adfc;
strcpy = 0x4003ae10;
strcspn = 0x4005575c;
strdup = 0x4003aea0;
_strdup_r = 0x4003aeb4;
strlcat = 0x4003aed4;
strlcpy = 0x40055798;
strlen = 0x4003af3c;
strlwr = 0x4003afa0;
strncasecmp = 0x4003afd0;
strncat = 0x4003b028;
strncmp = 0x4003b088;
strncpy = 0x4003b178;
strndup = 0x4003b254;
_strndup_r = 0x4003b268;
strnlen = 0x400557d8;
strrchr = 0x4003b2b8;
strsep = 0x4003b2e4;
strspn = 0x4005580c;
strstr = 0x4003b674;
__strtok_r = 0x40055848;
strtok_r = 0x400558a4;
strtol = 0x40032b14;
strtol_l = 0x40032afc;
_strtol_r = 0x40032ad8;
strtoul = 0x40032c84;
strtoul_l = 0x40032c6c;
_strtoul_r = 0x40032c48;
strupr = 0x4003b8bc;
__swbuf = 0x40033a34;
__swbuf_r = 0x4003396c;
__swhatbuf_r = 0x40033cd4;
__swrite = 0x40054d24;
__swsetup_r = 0x40033a48;
toascii = 0x400558b8;
tolower = 0x4003b990;
toupper = 0x4003b9ac;
__utoa = 0x400321f4;
utoa = 0x4003225c;
wcrtomb = 0x40033618;
_wcrtomb_r = 0x400335c0;
_wctomb_r = 0x40033c88;

47
components/esp_rom/esp32s3/ld/esp32s3.rom.newlib-nano.ld
View File

@ -1,28 +1,27 @@
/**
* These are the printf/scanf related newlib functions present in ESP32S3 ROM.
* These functions are compiled with newlib "nano" format option.
* As such, they don't support 64-bit integer formats.
* Floating point formats are supported by setting _printf_float and
* _scanf_float entries in syscall table. This is done automatically by startup code.
/* ROM function interface esp32s3.rom.newlib-nano.ld for esp32s3
*
* See also esp32s3.rom.newlib-data.ld for the list of .data/.bss symbols used by newlib functions.
* See also esp32s3.rom.newlib-funcs.ld for the list of general newlib functions.
*
* Unlike other ROM functions which declare weak symbols using PROVIDE,
* newlib related functions are exported using assignment, which declare strong symbols.
* Generated from ./interface-esp32s3.yml md5sum 36d43c36b9d0f4f082f71c819ad53470
*
* Note: These ROM functions are always linked instead of the ones provided by libc.a.
* Compatible with ROM where ECO version equal or greater to 0.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
_printf_common = 0x40033114;
_printf_i = 0x40033214;
__sfputs_r = 0x40032d44;
fiprintf = 0x40032cdc;
_fiprintf_r = 0x40032cac;
__fp_lock_all = 0x40054cbc;
fprintf = 0x40032cdc;
_fprintf_r = 0x40032cac;
__sprint_r = 0x40032d90;
vfiprintf = 0x400330f4;
_vfiprintf_r = 0x40032df8;
vfprintf = 0x400330f4;
_vfprintf_r = 0x40032df8;
/***************************************
Group newlib_nano_format
***************************************/
/* Functions */
__sprint_r = 0x400013f8;
_fiprintf_r = 0x40001404;
_fprintf_r = 0x40001410;
_printf_common = 0x4000141c;
_printf_i = 0x40001428;
_vfiprintf_r = 0x40001434;
_vfprintf_r = 0x40001440;
fiprintf = 0x4000144c;
fprintf = 0x40001458;
printf = 0x40001464;
vfiprintf = 0x40001470;
vfprintf = 0x4000147c;

94
components/esp_rom/esp32s3/ld/esp32s3.rom.newlib.ld Normal file
View File

@ -0,0 +1,94 @@
/* ROM function interface esp32s3.rom.newlib.ld for esp32s3
*
*
* Generated from ./interface-esp32s3.yml md5sum 36d43c36b9d0f4f082f71c819ad53470
*
* Compatible with ROM where ECO version equal or greater to 0.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
/***************************************
Group newlib
***************************************/
/* Functions */
esp_rom_newlib_init_common_mutexes = 0x40001068;
memset = 0x40001074;
memcpy = 0x40001080;
memmove = 0x4000108c;
memcmp = 0x40001098;
strcpy = 0x400010a4;
strncpy = 0x400010b0;
strcmp = 0x400010bc;
strncmp = 0x400010c8;
strlen = 0x400010d4;
strstr = 0x400010e0;
bzero = 0x400010ec;
_isatty_r = 0x400010f8;
sbrk = 0x40001104;
isalnum = 0x40001110;
isalpha = 0x4000111c;
isascii = 0x40001128;
isblank = 0x40001134;
iscntrl = 0x40001140;
isdigit = 0x4000114c;
islower = 0x40001158;
isgraph = 0x40001164;
isprint = 0x40001170;
ispunct = 0x4000117c;
isspace = 0x40001188;
isupper = 0x40001194;
toupper = 0x400011a0;
tolower = 0x400011ac;
toascii = 0x400011b8;
memccpy = 0x400011c4;
memchr = 0x400011d0;
memrchr = 0x400011dc;
strcasecmp = 0x400011e8;
strcasestr = 0x400011f4;
strcat = 0x40001200;
strdup = 0x4000120c;
strchr = 0x40001218;
strcspn = 0x40001224;
strcoll = 0x40001230;
strlcat = 0x4000123c;
strlcpy = 0x40001248;
strlwr = 0x40001254;
strncasecmp = 0x40001260;
strncat = 0x4000126c;
strndup = 0x40001278;
strnlen = 0x40001284;
strrchr = 0x40001290;
strsep = 0x4000129c;
strspn = 0x400012a8;
strtok_r = 0x400012b4;
strupr = 0x400012c0;
longjmp = 0x400012cc;
setjmp = 0x400012d8;
abs = 0x400012e4;
div = 0x400012f0;
labs = 0x400012fc;
ldiv = 0x40001308;
qsort = 0x40001314;
rand_r = 0x40001320;
rand = 0x4000132c;
srand = 0x40001338;
utoa = 0x40001344;
itoa = 0x40001350;
atoi = 0x4000135c;
atol = 0x40001368;
strtol = 0x40001374;
strtoul = 0x40001380;
PROVIDE( fflush = 0x4000138c );
PROVIDE( _fflush_r = 0x40001398 );
PROVIDE( _fwalk = 0x400013a4 );
PROVIDE( _fwalk_reent = 0x400013b0 );
PROVIDE( __smakebuf_r = 0x400013bc );
PROVIDE( __swhatbuf_r = 0x400013c8 );
PROVIDE( __swbuf_r = 0x400013d4 );
__swbuf = 0x400013e0;
PROVIDE( __swsetup_r = 0x400013ec );
/* Data (.data, .bss, .rodata) */
syscall_table_ptr = 0x3fceffe0;
_global_impure_ptr = 0x3fceffdc;

25
components/esp_rom/esp32s3/ld/esp32s3.rom.spiflash.ld
View File

@ -1,25 +0,0 @@
/**
* SPI flash driver function, compatibility names.
*/
PROVIDE ( g_rom_spiflash_dummy_len_plus = dummy_len_plus);
PROVIDE ( g_ticks_per_us_pro = g_ticks_per_us );
PROVIDE ( g_rom_flashchip = SPI_flashchip_data );
PROVIDE ( g_rom_spiflash_chip = SPI_flashchip_data );
PROVIDE ( esp_rom_spiflash_config_param = SPIParamCfg );
PROVIDE ( esp_rom_spiflash_read_status = SPI_read_status );
PROVIDE ( esp_rom_spiflash_read_statushigh = SPI_read_status_high );
PROVIDE ( esp_rom_spiflash_read_user_cmd = SPI_user_command_read );
PROVIDE ( esp_rom_spiflash_write = SPIWrite );
PROVIDE ( esp_rom_spiflash_read = SPIRead );
PROVIDE ( esp_rom_spiflash_write_encrypted_disable = SPI_Write_Encrypt_Disable );
PROVIDE ( esp_rom_spiflash_write_encrypted_enable = SPI_Write_Encrypt_Enable );
PROVIDE ( esp_rom_spiflash_config_clk = SPIClkConfig );
PROVIDE ( esp_rom_spiflash_select_qio_pins = SelectSpiQIO );
PROVIDE ( esp_rom_spiflash_unlock = SPIUnlock );
PROVIDE ( esp_rom_spiflash_erase_sector = SPIEraseSector );
PROVIDE ( esp_rom_spiflash_erase_block = SPIEraseBlock );
PROVIDE ( esp_rom_spiflash_wait_idle = SPI_Wait_Idle );
PROVIDE ( esp_rom_spiflash_config_readmode = SPIReadModeCnfig );
PROVIDE ( esp_rom_spiflash_erase_block = SPIEraseBlock );
PROVIDE ( esp_rom_spiflash_write_encrypted = SPI_Encrypt_Write );

8
components/esp_rom/esp32s3/ld/esp32s3.rom.version.ld Normal file
View File

@ -0,0 +1,8 @@
/* ROM version variables for esp32s3
*
* These addresses should be compatible with any ROM version for this chip.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
_rom_chip_id = 0x40000570;
_rom_eco_version = 0x40000574;

43
components/esp_rom/include/esp32s3/rom/libc_stubs.h
View File

@ -39,23 +39,24 @@ extern "C" {
* to actual implementations of corresponding syscalls.
*
*/
struct syscall_stub_table {
struct _reent *(*__getreent)(void);
void *(*_malloc_r)(struct _reent *r, size_t);
void (*_free_r)(struct _reent *r, void *);
void *(*_realloc_r)(struct _reent *r, void *, size_t);
void *(*_calloc_r)(struct _reent *r, size_t, size_t);
struct syscall_stub_table
{
struct _reent* (*__getreent)(void);
void* (*_malloc_r)(struct _reent *r, size_t);
void (*_free_r)(struct _reent *r, void*);
void* (*_realloc_r)(struct _reent *r, void*, size_t);
void* (*_calloc_r)(struct _reent *r, size_t, size_t);
void (*_abort)(void);
int (*_system_r)(struct _reent *r, const char *);
int (*_rename_r)(struct _reent *r, const char *, const char *);
int (*_system_r)(struct _reent *r, const char*);
int (*_rename_r)(struct _reent *r, const char*, const char*);
clock_t (*_times_r)(struct _reent *r, struct tms *);
int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
void (*_raise_r)(struct _reent *r);
int (*_unlink_r)(struct _reent *r, const char *);
int (*_link_r)(struct _reent *r, const char *, const char *);
int (*_stat_r)(struct _reent *r, const char *, struct stat *);
int (*_unlink_r)(struct _reent *r, const char*);
int (*_link_r)(struct _reent *r, const char*, const char*);
int (*_stat_r)(struct _reent *r, const char*, struct stat *);
int (*_fstat_r)(struct _reent *r, int, struct stat *);
void *(*_sbrk_r)(struct _reent *r, ptrdiff_t);
void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
int (*_getpid_r)(struct _reent *r);
int (*_kill_r)(struct _reent *r, int, int);
void (*_exit_r)(struct _reent *r, int);
@ -64,6 +65,18 @@ struct syscall_stub_table {
int (*_write_r)(struct _reent *r, int, const void *, int);
int (*_lseek_r)(struct _reent *r, int, int, int);
int (*_read_r)(struct _reent *r, int, void *, int);
#ifdef _RETARGETABLE_LOCKING
void (*_retarget_lock_init)(_LOCK_T *lock);
void (*_retarget_lock_init_recursive)(_LOCK_T *lock);
void (*_retarget_lock_close)(_LOCK_T lock);
void (*_retarget_lock_close_recursive)(_LOCK_T lock);
void (*_retarget_lock_acquire)(_LOCK_T lock);
void (*_retarget_lock_acquire_recursive)(_LOCK_T lock);
int (*_retarget_lock_try_acquire)(_LOCK_T lock);
int (*_retarget_lock_try_acquire_recursive)(_LOCK_T lock);
void (*_retarget_lock_release)(_LOCK_T lock);
void (*_retarget_lock_release_recursive)(_LOCK_T lock);
#else
void (*_lock_init)(_lock_t *lock);
void (*_lock_init_recursive)(_lock_t *lock);
void (*_lock_close)(_lock_t *lock);
@ -74,8 +87,12 @@ struct syscall_stub_table {
int (*_lock_try_acquire_recursive)(_lock_t *lock);
void (*_lock_release)(_lock_t *lock);
void (*_lock_release_recursive)(_lock_t *lock);
int (*_printf_float)(struct _reent *data, void *pdata, FILE *fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list *ap);
#endif
int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
void (*__assert_func) (const char *file, int line, const char * func, const char *failedexpr) __attribute__((noreturn));
void (*__sinit) (struct _reent *r);
void (*_cleanup_r) (struct _reent* r);
};
extern struct syscall_stub_table *syscall_table_ptr;

84
components/esp_rom/include/esp32s3/rom/rom_layout.h Normal file
View File

@ -0,0 +1,84 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define SUPPORT_WIFI 1
#define SUPPORT_BTDM 1
/* Structure and functions for returning ROM global layout
*
* This is for address symbols defined in the linker script, which may change during ECOs.
*/
typedef struct {
void *dram0_stack_shared_mem_start;
void *dram0_rtos_reserved_start;
void *stack_sentry;
void *stack;
void *stack_sentry_app;
void *stack_app;
/* BTDM data */
void *data_start_btdm;
void *data_end_btdm;
void *bss_start_btdm;
void *bss_end_btdm;
void *data_start_btdm_rom;
void *data_end_btdm_rom;
void *data_start_interface_btdm;
void *data_end_interface_btdm;
void *bss_start_interface_btdm;
void *bss_end_interface_btdm;
/* Other DRAM ranges */
#if SUPPORT_BTDM || SUPPORT_WIFI
void *dram_start_phyrom;
void *dram_end_phyrom;
#endif
#if SUPPORT_WIFI
void *dram_start_coexist;
void *dram_end_coexist;
void *dram_start_net80211;
void *dram_end_net80211;
void *dram_start_pp;
void *dram_end_pp;
void *data_start_interface_coexist;
void *data_end_interface_coexist;
void *bss_start_interface_coexist;
void *bss_end_interface_coexist;
void *data_start_interface_net80211;
void *data_end_interface_net80211;
void *bss_start_interface_net80211;
void *bss_end_interface_net80211;
void *data_start_interface_pp;
void *data_end_interface_pp;
void *bss_start_interface_pp;
void *bss_end_interface_pp;
#endif
void *dram_start_usbdev_rom;
void *dram_end_usbdev_rom;
void *dram_start_uart_rom;
void *dram_end_uart_rom;
} ets_rom_layout_t;
extern const ets_rom_layout_t * const ets_rom_layout_p;
#ifdef __cplusplus
}
#endif

43
components/esp_rom/include/esp32s3/rom/spi_flash.h
View File

@ -148,6 +148,7 @@ typedef struct {
uint16_t data;
} esp_rom_spiflash_common_cmd_t;
/**
* @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
* Please do not call this function in SDK.
@ -548,14 +549,42 @@ void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
/** @brief Global esp_rom_spiflash_chip_t structure used by ROM functions
*
*/
extern esp_rom_spiflash_chip_t g_rom_flashchip;
typedef void (* spi_flash_func_t)(void);
typedef SpiFlashOpResult (* spi_flash_op_t)(void);
typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
/**
* @}
*/
typedef struct {
uint32_t read_sub_len;
uint32_t write_sub_len;
spi_flash_op_t unlock;
spi_flash_erase_t erase_sector;
spi_flash_erase_t erase_block;
spi_flash_rd_t read;
spi_flash_wr_t write;
spi_flash_ewr_t encrypt_write;
spi_flash_func_t check_sus;
spi_flash_wren_t wren;
spi_flash_op_t wait_idle;
} spiflash_legacy_funcs_t;
/* Defined in the interfaces file, default value is rom_default_spiflash_legacy_flash_func */
extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs;
typedef struct {
esp_rom_spiflash_chip_t chip;
uint8_t dummy_len_plus[3];
uint8_t sig_matrix;
} spiflash_legacy_data_t;
extern spiflash_legacy_data_t *rom_spiflash_legacy_data;
#define g_rom_flashchip (rom_spiflash_legacy_data->chip)
#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus)
#ifdef __cplusplus
}

262
components/esp_rom/include/esp32s3/rom/usb/cdc_acm.h Normal file
View File

@ -0,0 +1,262 @@
/*******************************************************************************
*
* Copyright(c) 2015,2016 Intel Corporation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef void cdc_acm_device;
extern cdc_acm_device *uart_acm_dev;
#define ACM_BYTES_PER_TX 64
//ACM statuses are negative to distinguish from USB_DC_* status codes
#define ACM_STATUS_LINESTATE_CHANGED -1
#define ACM_STATUS_LINECODING_CHANGED -2
#define ACM_STATUS_TX -3
#define ACM_STATUS_RX -4
typedef void(*uart_irq_callback_t)(cdc_acm_device *dev, int status);
/**
* @brief Get amount of received characters in buffer
*
* @returns character count
*/
int cdc_acm_rx_fifo_cnt(cdc_acm_device *dev);
/*
* @brief Poll the device for input.
*
* @return -ENOTSUP Since underlying USB device controller always uses
* interrupts, polled mode UART APIs are not implemented for the UART interface
* exported by CDC ACM driver. Apps should use fifo_read API instead.
*/
int cdc_acm_poll_in(cdc_acm_device *dev, unsigned char *c);
/*
* @brief Output a character in polled mode.
*
* The UART poll method for USB UART is simulated by waiting till
* we get the next BULK In upcall from the USB device controller or 100 ms.
*
* @return the same character which is sent
*/
unsigned char cdc_acm_poll_out(cdc_acm_device *dev, unsigned char c);
/**
* @brief Fill FIFO with data
*
* @param dev CDC ACM device struct.
* @param tx_data Data to transmit.
* @param len Number of bytes to send.
*
* @return Number of bytes sent.
*/
int cdc_acm_fifo_fill(cdc_acm_device *dev, const uint8_t *tx_data, int len);
/**
* @brief Read data from FIFO
*
* @param dev CDC ACM device struct.
* @param rx_data Pointer to data container.
* @param size Container size.
*
* @return Number of bytes read.
*/
int cdc_acm_fifo_read(cdc_acm_device *dev, uint8_t *rx_data, const int size);
/**
* @brief Enable TX interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_tx_enable(cdc_acm_device *dev);
/**
* @brief Disable TX interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_tx_disable(cdc_acm_device *dev);
/**
* @brief Check if Tx IRQ has been raised
*
* @param dev CDC ACM device struct.
*
* @return 1 if a Tx IRQ is pending, 0 otherwise.
*/
int cdc_acm_irq_tx_ready(cdc_acm_device *dev);
/**
* @brief Enable RX interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A
*/
void cdc_acm_irq_rx_enable(cdc_acm_device *dev);
/**
* @brief Disable RX interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_rx_disable(cdc_acm_device *dev);
/**
* @brief Enable line state interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_state_enable(cdc_acm_device *dev);
/**
* @brief Disable line state interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_state_disable(cdc_acm_device *dev);
/**
* @brief Check if Rx IRQ has been raised
*
* @param dev CDC ACM device struct.
*
* @return 1 if an IRQ is ready, 0 otherwise.
*/
int cdc_acm_irq_rx_ready(cdc_acm_device *dev);
/**
* @brief Check if Tx or Rx IRQ is pending
*
* @param dev CDC ACM device struct.
*
* @return 1 if a Tx or Rx IRQ is pending, 0 otherwise.
*/
int cdc_acm_irq_is_pending(cdc_acm_device *dev);
/**
* @brief Set the callback function pointer for IRQ.
*
* @param dev CDC ACM device struct.
* @param cb Callback function pointer.
*
* @return N/A
*/
void cdc_acm_irq_callback_set(cdc_acm_device *dev, uart_irq_callback_t cb);
/**
* @brief Manipulate line control for UART.
*
* @param dev CDC ACM device struct
* @param ctrl The line control to be manipulated
* @param val Value to set the line control
*
* @return 0 if successful, failed otherwise.
*/
int cdc_acm_line_ctrl_set(cdc_acm_device *dev, uint32_t ctrl, uint32_t val);
/**
* @brief Manipulate line control for UART.
*
* @param dev CDC ACM device struct
* @param ctrl The line control to be manipulated
* @param val Value to set the line control
*
* @return 0 if successful, failed otherwise.
*/
int cdc_acm_line_ctrl_get(cdc_acm_device *dev, uint32_t ctrl, uint32_t *val);
/**
* @brief Initialize UART channel
*
* This routine is called to reset the chip in a quiescent state.
* It is assumed that this function is called only once per UART.
*
* @param mem_chunk Memory chunk to use for internal use
* @param mem_chunk_size Size of the memory chunk in bytes
*
* @return dev or NULL
*/
cdc_acm_device *cdc_acm_init(void *mem_chunk, int mem_chunk_size);
/** Common line controls for UART.*/
#define LINE_CTRL_BAUD_RATE (1 << 0)
#define LINE_CTRL_RTS (1 << 1)
#define LINE_CTRL_DTR (1 << 2)
#define LINE_CTRL_DCD (1 << 3)
#define LINE_CTRL_DSR (1 << 4)
/* Common communication errors for UART.*/
/** @brief Overrun error */
#define UART_ERROR_OVERRUN (1 << 0)
/** @brief Parity error */
#define UART_ERROR_PARITY (1 << 1)
/** @brief Framing error */
#define UART_ERROR_FRAMING (1 << 2)
/**
* @brief Break interrupt error:
*
* A break interrupt was received. This happens when the serial input is
* held at a logic '0' state for longer than the sum of start time + data bits
* + parity + stop bits.
*/
#define UART_ERROR_BREAK (1 << 3)
#ifdef __cplusplus
}
#endif

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// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
int chip_usb_dw_init(void);
int chip_usb_dw_did_persist(void);
void chip_usb_dw_prepare_persist(void);
uint32_t chip_usb_get_persist_flags(void);
void chip_usb_set_persist_flags(uint32_t flags);
#ifdef __cplusplus
}
#endif

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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/**
* Archive to parse cpio data in the newc and crc formats. Generate a cpio archive like that by e.g.
* find . | cpio -o -H newc > archive.cpio
*/
#pragma once
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define CPIO_MODE_FILETYPE_MASK 0xF000
#define CPIO_MODE_FILETYPE_SOCKET 0xC000
#define CPIO_MODE_FILETYPE_SYMLINK 0xA000
#define CPIO_MODE_FILETYPE_REGULAR 0x8000
#define CPIO_MODE_FILETYPE_BLOCKDEV 0x6000
#define CPIO_MODE_FILETYPE_DIR 0x4000
#define CPIO_MODE_FILETYPE_CHARDEV 0x2000
#define CPIO_MODE_FILETYPE_FIFO 0x1000
#define CPIO_MODE_SUID 0x0800
#define CPIO_MODE_SGID 0x0400
#define CPIO_MODE_STICKY 0x0200
typedef struct {
size_t filesize;
char *name;
uint32_t mode;
uint32_t check;
} cpio_file_t;
typedef enum {
CPIO_RET_MORE = 0,
CPIO_RET_DONE,
CPIO_RET_ERR
} cpio_ret_t;
typedef struct cpio_handle_data_t cpio_handle_data_t;
typedef cpio_handle_data_t *cpio_handle_t;
typedef enum {
CPIO_RSN_FILE_ALL = 0,
CPIO_RSN_FILE_INITIAL,
CPIO_RSN_FILE_MORE,
CPIO_RSN_FILE_END
} cpio_callback_reason_t;
/**
* Callback for cpio file data.
*
* This callback will be called by the library to indicate data for a file is available.
*
* For files in the cpio archive that fit entirely in the internal buffer, or when no internal
* buffer is available, are entirely contained in the buffer fed to cpio_feed(), this callback
* is only called once, with reason=CPIO_RNS_FILE_ALL. fileinfo will contain the information
* for that specific file (name, size, ...), buff_offset will be 0, buff_len is the file
* size and buff contains all the information for the file.
*
* For files that do not fit in the buffer, this callback will be called multiple times.
* The initial time with reason=CPIO_RSN_FILE_INITIAL, when more data is available with
* CPIO_RSN_FILE_MORE and finally with CPIO_RSN_FILE_END. For these calls, fileinfo
* will again contain file information. buff will be the information contained in the
* file at offset buff_offset, and the lenght of this buffer will be in buff_len.
*
* The library guarantees to feed all file data to the callback consequitively, so
* within the same file, the buff_offset from a call will always be (buff_offset+buff_len)
* from the call before that. If cpio_start is
*
* The library also guarantees every file in the cpio archive will either generate a single
* callback call with CPIO_RSN_ALL, or multiple with in sequence CPIO_RSN_FILE_INITIAL, 0 or
* more CPIO_RSN_FILE_MORE and finally a CPIO_RSN_FILE_END.
*
* When a non-zero buffer size is passed to cpio_start, the library guarantees that all callback
* calls with a reason of CPIO_RSN_FILE_INITIAL and CPIO_RSN_FILE_MORE will have a buffer
* filled with exactly this amount of bytes.
*
*/
typedef void (*cpio_callback_t)(cpio_callback_reason_t reason, cpio_file_t *fileinfo, size_t buff_offset, size_t buff_len, char *buff, void *arg);
/**
* @brief Initialize a cpio handle.
*
* Call this to start parsing a cpio archive. You can set the callback that handles the
* files/data here.
*
* @param callback The callback that will handle the data of the files inside the cpio archive
*
* @param cbarg User-supplied argument. The callback will be called with this as an argument.
*
* @param buflen Length of internal buffer used.
* If this is zero, the callback will be called with data that lives in the data buffer
* supplied to the cpio library by whomever called cpio_feed(). Because this library has
* no power over that buffer, the callback can be passed as little as 1 and as many as
* INT_MAX bytes at a time.
* If this is non-zero, the library will allocate an internal buffer of this size. All
* cpio_feed()-calls will be rebuffered, and the callback is guaranteed to only be called
* with this many bytes in the buffer, given there's enough data in the file to fill it.
*
* @param memchunk Chunk of memory to allocate everything (handle, I/O buffer, filename buffer) in. Minimum size
* (estimate) is 160+buflen+sizeof(largest filename/path).
* @param memchunklen Size of the mem chunk
*
* @return
* - Success: A pointer to a cpio handle
* - Error: NULL
*
*/
cpio_handle_t cpio_start(cpio_callback_t callback, void *cbarg, size_t buflen, void *memchunk, int memchunklen);
/**
* @brief Feed data from a cpio archive into the library
*
* This routine is used to feed consecutive data of the cpio archive into the library. While processing,
* the library can call the callback function one or more times if needed.
*
* @param cpio Handle obtained by calling cpio_start()
*
* @param buffer Pointer to buffer containing cpio archive data
*
* @param len Length of the buffer, in bytes
*
* @return
* - CPIO_RET_MORE: CPIO archive isn't done yet, please feed more data.
* - CPIO_RET_DONE: CPUI archive is finished.
* - CPIO_RET_ERR: Invalid CPIO archive data; decoding aborted.
*
*/
cpio_ret_t cpio_feed(cpio_handle_t cpio, char *buffer, int len);
/**
* @brief Indicate there is no more cpio data to be fed into the archive
*
* This call is to be called when the source data is exhausted. Normally, the library can find the end of the
* cpio archive by looking for the end marker,
*
* @param timer_conf Pointer of LEDC timer configure struct
*
*
* @return
* - CPIO_RET_DONE on success
* - CPIO_RET_ERR when cpio archive is invalid
*
*/
cpio_ret_t cpio_done(cpio_handle_t cpio);
/**
* @brief Free the memory allocated for a cpio handle.
*
* @param cpio Handle obtained by calling cpio_start()
*
* @return
* - CPIO_RET_DONE on success
*
*/
cpio_ret_t cpio_destroy(cpio_handle_t cpio);
#ifdef __cplusplus
}
#endif

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/* usb_cdc.h - USB CDC-ACM and CDC-ECM public header */
/*
* Copyright (c) 2017 PHYTEC Messtechnik GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief USB Communications Device Class (CDC) public header
*
* Header follows the Class Definitions for
* Communications Devices Specification (CDC120-20101103-track.pdf),
* PSTN Devices Specification (PSTN120.pdf) and
* Ethernet Control Model Devices Specification (ECM120.pdf).
* Header is limited to ACM and ECM Subclasses.
*/
#pragma once
#include <stdint.h>
#include <sys/cdefs.h>
#ifdef __cplusplus
extern "C" {
#endif
/** CDC Specification release number in BCD format */
#define CDC_SRN_1_20 0x0120
/** Communications Class Subclass Codes */
#define ACM_SUBCLASS 0x02
#define ECM_SUBCLASS 0x06
#define EEM_SUBCLASS 0x0c
/** Communications Class Protocol Codes */
#define AT_CMD_V250_PROTOCOL 0x01
#define EEM_PROTOCOL 0x07
/**
* @brief Data Class Interface Codes
* @note CDC120-20101103-track.pdf, 4.5, Table 6
*/
#define DATA_INTERFACE_CLASS 0x0A
/**
* @brief Values for the bDescriptorType Field
* @note CDC120-20101103-track.pdf, 5.2.3, Table 12
*/
#define CS_INTERFACE 0x24
#define CS_ENDPOINT 0x25
/**
* @brief bDescriptor SubType for Communications
* Class Functional Descriptors
* @note CDC120-20101103-track.pdf, 5.2.3, Table 13
*/
#define HEADER_FUNC_DESC 0x00
#define CALL_MANAGEMENT_FUNC_DESC 0x01
#define ACM_FUNC_DESC 0x02
#define UNION_FUNC_DESC 0x06
#define ETHERNET_FUNC_DESC 0x0F
/**
* @brief PSTN Subclass Specific Requests
* for ACM devices
* @note PSTN120.pdf, 6.3, Table 13
*/
#define CDC_SEND_ENC_CMD 0x00
#define CDC_GET_ENC_RSP 0x01
#define SET_LINE_CODING 0x20
#define GET_LINE_CODING 0x21
#define SET_CONTROL_LINE_STATE 0x22
/** Control Signal Bitmap Values for SetControlLineState */
#define SET_CONTROL_LINE_STATE_RTS 0x02
#define SET_CONTROL_LINE_STATE_DTR 0x01
/** UART State Bitmap Values */
#define SERIAL_STATE_OVERRUN 0x40
#define SERIAL_STATE_PARITY 0x20
#define SERIAL_STATE_FRAMING 0x10
#define SERIAL_STATE_RING 0x08
#define SERIAL_STATE_BREAK 0x04
#define SERIAL_STATE_TX_CARRIER 0x02
#define SERIAL_STATE_RX_CARRIER 0x01
/**
* @brief Class-Specific Request Codes for Ethernet subclass
* @note ECM120.pdf, 6.2, Table 6
*/
#define SET_ETHERNET_MULTICAST_FILTERS 0x40
#define SET_ETHERNET_PM_FILTER 0x41
#define GET_ETHERNET_PM_FILTER 0x42
#define SET_ETHERNET_PACKET_FILTER 0x43
#define GET_ETHERNET_STATISTIC 0x44
/** Ethernet Packet Filter Bitmap */
#define PACKET_TYPE_MULTICAST 0x10
#define PACKET_TYPE_BROADCAST 0x08
#define PACKET_TYPE_DIRECTED 0x04
#define PACKET_TYPE_ALL_MULTICAST 0x02
#define PACKET_TYPE_PROMISCUOUS 0x01
/** Header Functional Descriptor */
struct cdc_header_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint16_t bcdCDC;
} __packed;
/** Union Interface Functional Descriptor */
struct cdc_union_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bControlInterface;
uint8_t bSubordinateInterface0;
} __packed;
/** Call Management Functional Descriptor */
struct cdc_cm_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bmCapabilities;
uint8_t bDataInterface;
} __packed;
/** Abstract Control Management Functional Descriptor */
struct cdc_acm_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bmCapabilities;
} __packed;
/** Data structure for GET_LINE_CODING / SET_LINE_CODING class requests */
struct cdc_acm_line_coding {
uint32_t dwDTERate;
uint8_t bCharFormat;
uint8_t bParityType;
uint8_t bDataBits;
} __packed;
/** Data structure for the notification about SerialState */
struct cdc_acm_notification {
uint8_t bmRequestType;
uint8_t bNotificationType;
uint16_t wValue;
uint16_t wIndex;
uint16_t wLength;
uint16_t data;
} __packed;
/** Ethernet Networking Functional Descriptor */
struct cdc_ecm_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t iMACAddress;
uint32_t bmEthernetStatistics;
uint16_t wMaxSegmentSize;
uint16_t wNumberMCFilters;
uint8_t bNumberPowerFilters;
} __packed;
#ifdef __cplusplus
}
#endif

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/***************************************************************************
*
*
* Copyright(c) 2015,2016 Intel Corporation.
* Copyright(c) 2017 PHYTEC Messtechnik GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
/**
* @file
* @brief useful constants and macros for the USB application
*
* This file contains useful constants and macros for the USB applications.
*/
#pragma once
#include <stdint.h>
#include <sys/cdefs.h>
#ifdef __cplusplus
extern "C" {
#endif
#define BCD(x) ((((x) / 10) << 4) | ((x) / 10))
/* Descriptor size in bytes */
#define USB_DEVICE_DESC_SIZE 18
#define USB_CONFIGURATION_DESC_SIZE 9
#define USB_INTERFACE_DESC_SIZE 9
#define USB_ENDPOINT_DESC_SIZE 7
#define USB_STRING_DESC_SIZE 4
#define USB_HID_DESC_SIZE 9
#define USB_DFU_DESC_SIZE 9
#define USB_DEVICE_QUAL_DESC_SIZE 10
#define USB_INTERFACE_ASSOC_DESC_SIZE 8
/* Descriptor type */
#define USB_DEVICE_DESC 0x01
#define USB_CONFIGURATION_DESC 0x02
#define USB_STRING_DESC 0x03
#define USB_INTERFACE_DESC 0x04
#define USB_ENDPOINT_DESC 0x05
#define USB_DEVICE_QUAL_DESC 0x06
#define USB_INTERFACE_ASSOC_DESC 0x0B
#define USB_DEVICE_CAPABILITY_DESC 0x10
#define USB_HID_DESC 0x21
#define USB_HID_REPORT_DESC 0x22
#define USB_DFU_FUNCTIONAL_DESC 0x21
#define USB_ASSOCIATION_DESC 0x0B
#define USB_BINARY_OBJECT_STORE_DESC 0x0F
/* Useful define */
#define USB_1_1 0x0110
#define USB_2_0 0x0200
/* Set USB version to 2.1 so that the host will request the BOS descriptor */
#define USB_2_1 0x0210
#define BCDDEVICE_RELNUM (BCD(KERNEL_VERSION_MAJOR) << 8 | \
BCD(KERNEL_VERSION_MINOR))
/* 100mA max power, per 2mA units */
/* USB 1.1 spec indicates 100mA(max) per unit load, up to 5 loads */
#define MAX_LOW_POWER 0x32
#define MAX_HIGH_POWER 0xFA
/* bmAttributes:
* D7:Reserved, always 1,
* D6:Self-Powered -> 1,
* D5:Remote Wakeup -> 0,
* D4...0:Reserved -> 0
*/
#define USB_CONFIGURATION_ATTRIBUTES 0xC0
/* Classes */
#define COMMUNICATION_DEVICE_CLASS 0x02
#define COMMUNICATION_DEVICE_CLASS_DATA 0x0A
#define HID_CLASS 0x03
#define MASS_STORAGE_CLASS 0x08
#define WIRELESS_DEVICE_CLASS 0xE0
#define MISC_CLASS 0xEF
#define CUSTOM_CLASS 0xFF
#define DFU_DEVICE_CLASS 0xFE
/* Sub-classes */
#define CDC_NCM_SUBCLASS 0x0d
#define BOOT_INTERFACE_SUBCLASS 0x01
#define SCSI_TRANSPARENT_SUBCLASS 0x06
#define DFU_INTERFACE_SUBCLASS 0x01
#define RF_SUBCLASS 0x01
#define CUSTOM_SUBCLASS 0xFF
#define COMMON_SUBCLASS 0x02
/* Misc subclasses */
#define MISC_RNDIS_SUBCLASS 0x04
#define CDC_ABSTRACT_CONTROL_MODEL 0x02
/* Protocols */
#define V25TER_PROTOCOL 0x01
#define MOUSE_PROTOCOL 0x02
#define BULK_ONLY_PROTOCOL 0x50
#define DFU_RUNTIME_PROTOCOL 0x01
#define DFU_MODE_PROTOCOL 0x02
#define BLUETOOTH_PROTOCOL 0x01
/* CDC ACM protocols */
#define ACM_VENDOR_PROTOCOL 0xFF
/* Misc protocols */
#define MISC_ETHERNET_PROTOCOL 0x01
#define IAD_PROTOCOL 0x01
/** Standard Device Descriptor */
struct usb_device_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bcdUSB;
uint8_t bDeviceClass;
uint8_t bDeviceSubClass;
uint8_t bDeviceProtocol;
uint8_t bMaxPacketSize0;
uint16_t idVendor;
uint16_t idProduct;
uint16_t bcdDevice;
uint8_t iManufacturer;
uint8_t iProduct;
uint8_t iSerialNumber;
uint8_t bNumConfigurations;
} __packed;
/** Unicode (UTF16LE) String Descriptor */
struct usb_string_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bString;
} __packed;
/** Association Descriptor */
struct usb_association_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bFirstInterface;
uint8_t bInterfaceCount;
uint8_t bFunctionClass;
uint8_t bFunctionSubClass;
uint8_t bFunctionProtocol;
uint8_t iFunction;
} __packed;
/** Standard Configuration Descriptor */
struct usb_cfg_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t wTotalLength;
uint8_t bNumInterfaces;
uint8_t bConfigurationValue;
uint8_t iConfiguration;
uint8_t bmAttributes;
uint8_t bMaxPower;
} __packed;
/** Standard Interface Descriptor */
struct usb_if_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bInterfaceNumber;
uint8_t bAlternateSetting;
uint8_t bNumEndpoints;
uint8_t bInterfaceClass;
uint8_t bInterfaceSubClass;
uint8_t bInterfaceProtocol;
uint8_t iInterface;
} __packed;
/** Standard Endpoint Descriptor */
struct usb_ep_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bEndpointAddress;
uint8_t bmAttributes;
uint16_t wMaxPacketSize;
uint8_t bInterval;
} __packed;
struct string_descriptor_zero {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t wBcdLang[];
} __packed;
struct string_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bString[];
} __packed;
#define ROM_MAX_CFG_DESC_CNT 1
struct rom_usb_descriptors {
const struct usb_device_descriptor *device_descr;
const void *config_descr[ROM_MAX_CFG_DESC_CNT];
int string_count; // including string_descriptor_zero
const struct string_descriptor_zero *string0_descr;
const struct string_descriptor *string_descrs[];
};
/* Descriptors defined in the ROM */
extern struct usb_device_descriptor general_device_descr;
extern const void* acm_config_descr;
extern const void* dfu_config_descr;
extern const struct string_descriptor str_manu_descr;
extern const struct string_descriptor str_prod_descr;
extern const struct string_descriptor_zero string0_descr;
extern const struct rom_usb_descriptors acm_usb_descriptors;
extern const struct rom_usb_descriptors dfu_usb_descriptors;
extern const struct rom_usb_descriptors *rom_usb_curr_desc;
#ifdef __cplusplus
}
#endif

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/* usb_dc.h - USB device controller driver interface */
/*
* Copyright (c) 2016 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief USB device controller APIs
*
* This file contains the USB device controller APIs. All device controller
* drivers should implement the APIs described in this file.
*/
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* USB endpoint direction and number.
*/
#define USB_EP_DIR_MASK 0x80
#define USB_EP_DIR_IN 0x80
#define USB_EP_DIR_OUT 0x00
/**
* USB Driver Status Codes
*/
enum usb_dc_status_code {
USB_DC_ERROR, /* USB error reported by the controller */
USB_DC_RESET, /* USB reset */
/* USB connection established, hardware enumeration is completed */
USB_DC_CONNECTED,
USB_DC_CONFIGURED, /* USB configuration done */
USB_DC_DISCONNECTED, /* USB connection lost */
USB_DC_SUSPEND, /* USB connection suspended by the HOST */
USB_DC_RESUME, /* USB connection resumed by the HOST */
USB_DC_INTERFACE, /* USB interface selected */
USB_DC_SET_HALT, /* Set Feature ENDPOINT_HALT received */
USB_DC_CLEAR_HALT, /* Clear Feature ENDPOINT_HALT received */
USB_DC_UNKNOWN /* Initial USB connection status */
};
/**
* USB Endpoint Callback Status Codes
*/
enum usb_dc_ep_cb_status_code {
USB_DC_EP_SETUP, /* SETUP received */
/* Out transaction on this EP, data is available for read */
USB_DC_EP_DATA_OUT,
USB_DC_EP_DATA_IN, /* In transaction done on this EP */
};
/**
* USB Endpoint type
*/
enum usb_dc_ep_type {
USB_DC_EP_CONTROL = 0, /* Control type endpoint */
USB_DC_EP_ISOCHRONOUS, /* Isochronous type endpoint */
USB_DC_EP_BULK, /* Bulk type endpoint */
USB_DC_EP_INTERRUPT /* Interrupt type endpoint */
};
/**
* USB Endpoint Configuration.
*/
struct usb_dc_ep_cfg_data {
/** The number associated with the EP in the device
* configuration structure
* IN EP = 0x80 | \<endpoint number\>
* OUT EP = 0x00 | \<endpoint number\>
*/
uint8_t ep_addr;
uint16_t ep_mps; /** Endpoint max packet size */
enum usb_dc_ep_type ep_type; /** Endpoint type */
};
/**
* Callback function signature for the USB Endpoint status
*/
typedef void (*usb_dc_ep_callback)(uint8_t ep,
enum usb_dc_ep_cb_status_code cb_status);
/**
* Callback function signature for the device
*/
typedef void (*usb_dc_status_callback)(enum usb_dc_status_code cb_status,
uint8_t *param);
/**
* @brief attach USB for device connection
*
* Function to attach USB for device connection. Upon success, the USB PLL
* is enabled, and the USB device is now capable of transmitting and receiving
* on the USB bus and of generating interrupts.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_attach(void);
/**
* @brief detach the USB device
*
* Function to detach the USB device. Upon success, the USB hardware PLL
* is powered down and USB communication is disabled.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_detach(void);
/**
* @brief reset the USB device
*
* This function returns the USB device and firmware back to it's initial state.
* N.B. the USB PLL is handled by the usb_detach function
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_reset(void);
/**
* @brief set USB device address
*
* @param[in] addr device address
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_set_address(const uint8_t addr);
/**
* @brief set USB device controller status callback
*
* Function to set USB device controller status callback. The registered
* callback is used to report changes in the status of the device controller.
*
* @param[in] cb callback function
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_set_status_callback(const usb_dc_status_callback cb);
/**
* @brief check endpoint capabilities
*
* Function to check capabilities of an endpoint. usb_dc_ep_cfg_data structure
* provides the endpoint configuration parameters: endpoint address,
* endpoint maximum packet size and endpoint type.
* The driver should check endpoint capabilities and return 0 if the
* endpoint configuration is possible.
*
* @param[in] cfg Endpoint config
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_check_cap(const struct usb_dc_ep_cfg_data *const cfg);
/**
* @brief configure endpoint
*
* Function to configure an endpoint. usb_dc_ep_cfg_data structure provides
* the endpoint configuration parameters: endpoint address, endpoint maximum
* packet size and endpoint type.
*
* @param[in] cfg Endpoint config
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data *const cfg);
/**
* @brief set stall condition for the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_set_stall(const uint8_t ep);
/**
* @brief clear stall condition for the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_clear_stall(const uint8_t ep);
/**
* @brief check if selected endpoint is stalled
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[out] stalled Endpoint stall status
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled);
/**
* @brief halt the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_halt(const uint8_t ep);
/**
* @brief enable the selected endpoint
*
* Function to enable the selected endpoint. Upon success interrupts are
* enabled for the corresponding endpoint and the endpoint is ready for
* transmitting/receiving data.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_enable(const uint8_t ep);
/**
* @brief disable the selected endpoint
*
* Function to disable the selected endpoint. Upon success interrupts are
* disabled for the corresponding endpoint and the endpoint is no longer able
* for transmitting/receiving data.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_disable(const uint8_t ep);
/**
* @brief flush the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_flush(const uint8_t ep);
/**
* @brief write data to the specified endpoint
*
* This function is called to write data to the specified endpoint. The supplied
* usb_ep_callback function will be called when data is transmitted out.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data pointer to data to write
* @param[in] data_len length of data requested to write. This may
* be zero for a zero length status packet.
* @param[out] ret_bytes bytes scheduled for transmission. This value
* may be NULL if the application expects all
* bytes to be written
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
const uint32_t data_len, uint32_t *const ret_bytes);
/**
* @brief Indicate if the write to an IN endpoint (using usb_dc_ep_write) would block
* to wait until the endpoint has enoug space
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 when writable, 0 when not, negative errno code on fail.
*/
int usb_dc_ep_write_would_block(const uint8_t ep);
/**
* @brief read data from the specified endpoint
*
* This function is called by the Endpoint handler function, after an OUT
* interrupt has been received for that EP. The application must only call this
* function through the supplied usb_ep_callback function. This function clears
* the ENDPOINT NAK, if all data in the endpoint FIFO has been read,
* so as to accept more data from host.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data pointer to data buffer to write to
* @param[in] max_data_len max length of data to read
* @param[out] read_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes
* available for read should be returned.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
const uint32_t max_data_len, uint32_t *const read_bytes);
/**
* @brief set callback function for the specified endpoint
*
* Function to set callback function for notification of data received and
* available to application or transmit done on the selected endpoint,
* NULL if callback not required by application code.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] cb callback function
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb);
/**
* @brief read data from the specified endpoint
*
* This is similar to usb_dc_ep_read, the difference being that, it doesn't
* clear the endpoint NAKs so that the consumer is not bogged down by further
* upcalls till he is done with the processing of the data. The caller should
* reactivate ep by invoking usb_dc_ep_read_continue() do so.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data pointer to data buffer to write to
* @param[in] max_data_len max length of data to read
* @param[out] read_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes
* available for read should be returned.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
uint32_t *read_bytes);
/**
* @brief Continue reading data from the endpoint
*
* Clear the endpoint NAK and enable the endpoint to accept more data
* from the host. Usually called after usb_dc_ep_read_wait() when the consumer
* is fine to accept more data. Thus these calls together acts as flow control
* mechanism.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read_continue(uint8_t ep);
/**
* @brief Get endpoint max packet size
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return enpoint max packet size (mps)
*/
int usb_dc_ep_mps(uint8_t ep);
//Hack - fake interrupts by pollinfg
void usb_dc_check_poll_for_interrupts(void);
//Prepare for USB persist. You should reboot after this.
int usb_dc_prepare_persist(void);
void usb_dw_isr_handler(void);
int usb_dc_ep_write_would_block(const uint8_t ep);
#ifdef __cplusplus
}
#endif

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// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define USB_DESCRIPTOR_TYPE_ACM 0
#define USB_DESCRIPTOR_TYPE_DFU 1
void usb_set_current_descriptor(int descriptor_type);
bool usb_get_descriptor(uint16_t type_index, uint16_t lang_id,
int32_t *len, uint8_t **data);
#ifdef __cplusplus
}
#endif

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/*
* LPCUSB, an USB device driver for LPC microcontrollers
* Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)
* Copyright (c) 2016 Intel Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* @brief USB device core layer APIs and structures
*
* This file contains the USB device core layer APIs and structures.
*/
#pragma once
#include <stddef.h>
#include <sys/cdefs.h>
#include "usb_dc.h"
#ifdef __cplusplus
extern "C" {
#endif
/*************************************************************************
* USB configuration
**************************************************************************/
#define MAX_PACKET_SIZE0 64 /**< maximum packet size for EP 0 */
//Note: for FS this should be 8, 16, 32, 64 bytes. HS can go up to 512.
/*************************************************************************
* USB application interface
**************************************************************************/
/** setup packet definitions */
struct usb_setup_packet {
uint8_t bmRequestType; /**< characteristics of the specific request */
uint8_t bRequest; /**< specific request */
uint16_t wValue; /**< request specific parameter */
uint16_t wIndex; /**< request specific parameter */
uint16_t wLength; /**< length of data transferred in data phase */
} __packed;
_Static_assert(sizeof(struct usb_setup_packet) == 8, "USB setup packet struct size error");
/**
* Callback function signature for the device
*/
typedef void (*usb_status_callback)(enum usb_dc_status_code status_code,
uint8_t *param);
/**
* Callback function signature for the USB Endpoint status
*/
typedef void (*usb_ep_callback)(uint8_t ep,
enum usb_dc_ep_cb_status_code cb_status);
/**
* Function which handles Class specific requests corresponding to an
* interface number specified in the device descriptor table
*/
typedef int (*usb_request_handler) (struct usb_setup_packet *detup,
int32_t *transfer_len, uint8_t **payload_data);
/**
* Function for interface runtime configuration
*/
typedef void (*usb_interface_config)(uint8_t bInterfaceNumber);
/*
* USB Endpoint Configuration
*/
struct usb_ep_cfg_data {
/**
* Callback function for notification of data received and
* available to application or transmit done, NULL if callback
* not required by application code
*/
usb_ep_callback ep_cb;
/**
* The number associated with the EP in the device configuration
* structure
* IN EP = 0x80 | \<endpoint number\>
* OUT EP = 0x00 | \<endpoint number\>
*/
uint8_t ep_addr;
};
/**
* USB Interface Configuration
*/
struct usb_interface_cfg_data {
/** Handler for USB Class specific Control (EP 0) communications */
usb_request_handler class_handler;
/** Handler for USB Vendor specific commands */
usb_request_handler vendor_handler;
/**
* The custom request handler gets a first chance at handling
* the request before it is handed over to the 'chapter 9' request
* handler
*/
usb_request_handler custom_handler;
/**
* This data area, allocated by the application, is used to store
* Class specific command data and must be large enough to store the
* largest payload associated with the largest supported Class'
* command set. This data area may be used for USB IN or OUT
* communications
*/
uint8_t *payload_data;
/**
* This data area, allocated by the application, is used to store
* Vendor specific payload
*/
uint8_t *vendor_data;
};
/*
* @brief USB device configuration
*
* The Application instantiates this with given parameters added
* using the "usb_set_config" function. Once this function is called
* changes to this structure will result in undefined behaviour. This structure
* may only be updated after calls to usb_deconfig
*/
struct usb_cfg_data {
/**
* USB device description, see
* http://www.beyondlogic.org/usbnutshell/usb5.shtml#DeviceDescriptors
*/
const uint8_t *usb_device_description;
/** Pointer to interface descriptor */
const void *interface_descriptor;
/** Function for interface runtime configuration */
usb_interface_config interface_config;
/** Callback to be notified on USB connection status change */
usb_status_callback cb_usb_status;
/** USB interface (Class) handler and storage space */
struct usb_interface_cfg_data interface;
/** Number of individual endpoints in the device configuration */
uint8_t num_endpoints;
/**
* Pointer to an array of endpoint structs of length equal to the
* number of EP associated with the device description,
* not including control endpoints
*/
struct usb_ep_cfg_data *endpoint;
};
/*
* @brief configure USB controller
*
* Function to configure USB controller.
* Configuration parameters must be valid or an error is returned
*
* @param[in] config Pointer to configuration structure
*
* @return 0 on success, negative errno code on fail
*/
int usb_set_config(struct usb_cfg_data *config);
/*
* @brief return the USB device to it's initial state
*
* @return 0 on success, negative errno code on fail
*/
int usb_deconfig(void);
/*
* @brief enable USB for host/device connection
*
* Function to enable USB for host/device connection.
* Upon success, the USB module is no longer clock gated in hardware,
* it is now capable of transmitting and receiving on the USB bus and
* of generating interrupts.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_enable(struct usb_cfg_data *config);
/*
* @brief disable the USB device.
*
* Function to disable the USB device.
* Upon success, the specified USB interface is clock gated in hardware,
* it is no longer capable of generating interrupts.
*
* @return 0 on success, negative errno code on fail
*/
int usb_disable(void);
/*
* @brief Check if a write to an in ep would block until there is enough space
* in the fifo
*
* @param[in] ep Endpoint address corresponding to the one listed in the
* device configuration table
*
* @return 0 if free to write, 1 if a write would block, negative errno code on fail
*/
int usb_write_would_block(uint8_t ep);
/*
* @brief write data to the specified endpoint
*
* Function to write data to the specified endpoint. The supplied
* usb_ep_callback will be called when transmission is done.
*
* @param[in] ep Endpoint address corresponding to the one listed in the
* device configuration table
* @param[in] data Pointer to data to write
* @param[in] data_len Length of data requested to write. This may be zero for
* a zero length status packet.
* @param[out] bytes_ret Bytes written to the EP FIFO. This value may be NULL if
* the application expects all bytes to be written
*
* @return 0 on success, negative errno code on fail
*/
int usb_write(uint8_t ep, const uint8_t *data, uint32_t data_len,
uint32_t *bytes_ret);
/*
* @brief read data from the specified endpoint
*
* This function is called by the Endpoint handler function, after an
* OUT interrupt has been received for that EP. The application must
* only call this function through the supplied usb_ep_callback function.
*
* @param[in] ep Endpoint address corresponding to the one listed in
* the device configuration table
* @param[in] data Pointer to data buffer to write to
* @param[in] max_data_len Max length of data to read
* @param[out] ret_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes available
* for read is returned.
*
* @return 0 on success, negative errno code on fail
*/
int usb_read(uint8_t ep, uint8_t *data, uint32_t max_data_len,
uint32_t *ret_bytes);
/*
* @brief set STALL condition on the specified endpoint
*
* This function is called by USB device class handler code to set stall
* conditionin on endpoint.
*
* @param[in] ep Endpoint address corresponding to the one listed in
* the device configuration table
*
* @return 0 on success, negative errno code on fail
*/
int usb_ep_set_stall(uint8_t ep);
/*
* @brief clears STALL condition on the specified endpoint
*
* This function is called by USB device class handler code to clear stall
* conditionin on endpoint.
*
* @param[in] ep Endpoint address corresponding to the one listed in
* the device configuration table
*
* @return 0 on success, negative errno code on fail
*/
int usb_ep_clear_stall(uint8_t ep);
/**
* @brief read data from the specified endpoint
*
* This is similar to usb_ep_read, the difference being that, it doesn't
* clear the endpoint NAKs so that the consumer is not bogged down by further
* upcalls till he is done with the processing of the data. The caller should
* reactivate ep by invoking usb_ep_read_continue() do so.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data pointer to data buffer to write to
* @param[in] max_data_len max length of data to read
* @param[out] read_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes
* available for read should be returned.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
uint32_t *read_bytes);
/**
* @brief Continue reading data from the endpoint
*
* Clear the endpoint NAK and enable the endpoint to accept more data
* from the host. Usually called after usb_ep_read_wait() when the consumer
* is fine to accept more data. Thus these calls together acts as flow control
* mechanism.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_ep_read_continue(uint8_t ep);
/**
* Callback function signature for transfer completion.
*/
typedef void (*usb_transfer_callback)(uint8_t ep, int tsize, void *priv);
/* USB transfer flags */
#define USB_TRANS_READ BIT(0) /** Read transfer flag */
#define USB_TRANS_WRITE BIT(1) /** Write transfer flag */
#define USB_TRANS_NO_ZLP BIT(2) /** No zero-length packet flag */
/**
* @brief Transfer management endpoint callback
*
* If a USB class driver wants to use high-level transfer functions, driver
* needs to register this callback as usb endpoint callback.
*/
void usb_transfer_ep_callback(uint8_t ep, enum usb_dc_ep_cb_status_code);
/**
* @brief Start a transfer
*
* Start a usb transfer to/from the data buffer. This function is asynchronous
* and can be executed in IRQ context. The provided callback will be called
* on transfer completion (or error) in thread context.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data buffer to write-to/read-from
* @param[in] dlen Size of data buffer
* @param[in] flags Transfer flags (USB_TRANS_READ, USB_TRANS_WRITE...)
* @param[in] cb Function called on transfer completion/failure
* @param[in] priv Data passed back to the transfer completion callback
*
* @return 0 on success, negative errno code on fail.
*/
int usb_transfer(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags,
usb_transfer_callback cb, void *priv);
/**
* @brief Start a transfer and block-wait for completion
*
* Synchronous version of usb_transfer, wait for transfer completion before
* returning.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data buffer to write-to/read-from
* @param[in] dlen Size of data buffer
* @param[in] flags Transfer flags
*
* @return number of bytes transferred on success, negative errno code on fail.
*/
int usb_transfer_sync(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags);
/**
* @brief Cancel any ongoing transfer on the specified endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
void usb_cancel_transfer(uint8_t ep);
void usb_dev_resume(int configuration);
int usb_dev_get_configuration(void);
#ifdef __cplusplus
}
#endif

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/***************************************************************************
*
* Copyright(c) 2015,2016 Intel Corporation.
* Copyright(c) 2017 PHYTEC Messtechnik GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
/**
* @file
* @brief USB Device Firmware Upgrade (DFU) public header
*
* Header follows the Device Class Specification for
* Device Firmware Upgrade Version 1.1
*/
#pragma once
#include <stdint.h>
#include <stddef.h>
#include "usb_device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** DFU Class Subclass */
#define DFU_SUBCLASS 0x01
/** DFU Class runtime Protocol */
#define DFU_RT_PROTOCOL 0x01
/** DFU Class DFU mode Protocol */
#define DFU_MODE_PROTOCOL 0x02
/**
* @brief DFU Class Specific Requests
*/
#define DFU_DETACH 0x00
#define DFU_DNLOAD 0x01
#define DFU_UPLOAD 0x02
#define DFU_GETSTATUS 0x03
#define DFU_CLRSTATUS 0x04
#define DFU_GETSTATE 0x05
#define DFU_ABORT 0x06
/** DFU FUNCTIONAL descriptor type */
#define DFU_FUNC_DESC 0x21
/** DFU attributes DFU Functional Descriptor */
#define DFU_ATTR_WILL_DETACH 0x08
#define DFU_ATTR_MANIFESTATION_TOLERANT 0x04
#define DFU_ATTR_CAN_UPLOAD 0x02
#define DFU_ATTR_CAN_DNLOAD 0x01
/** DFU Specification release */
#define DFU_VERSION 0x0110
/** Run-Time Functional Descriptor */
struct dfu_runtime_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bmAttributes;
uint16_t wDetachTimeOut;
uint16_t wTransferSize;
uint16_t bcdDFUVersion;
} __packed;
/** bStatus values for the DFU_GETSTATUS response */
enum dfu_status {
statusOK,
errTARGET,
errFILE,
errWRITE,
errERASE,
errCHECK_ERASED,
errPROG,
errVERIFY,
errADDRESS,
errNOTDONE,
errFIRMWARE,
errVENDOR,
errUSB,
errPOR,
errUNKNOWN,
errSTALLEDPKT
};
/** bState values for the DFU_GETSTATUS response */
enum dfu_state {
appIDLE,
appDETACH,
dfuIDLE,
dfuDNLOAD_SYNC,
dfuDNBUSY,
dfuDNLOAD_IDLE,
dfuMANIFEST_SYNC,
dfuMANIFEST,
dfuMANIFEST_WAIT_RST,
dfuUPLOAD_IDLE,
dfuERROR,
};
/*
These callbacks are made public so the ACM driver can call them to handle the switch to DFU.
*/
int dfu_class_handle_req(struct usb_setup_packet *pSetup,
int32_t *data_len, uint8_t **data);
void dfu_status_cb(enum usb_dc_status_code status, uint8_t *param);
int usb_dfu_init(void);
int dfu_custom_handle_req(struct usb_setup_packet *pSetup,
int32_t *data_len, uint8_t **data);
typedef void(*usb_dfu_detach_routine_t)(int delay);
void usb_dfu_set_detach_cb(usb_dfu_detach_routine_t cb);
#ifdef __cplusplus
}
#endif

40
components/esp_rom/include/esp32s3/rom/usb/usb_os_glue.h Normal file
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@ -0,0 +1,40 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef void(*usb_osglue_intdisena_routine_t)(void);
typedef int(*usb_osglue_wait_routine_t)(int delay_us);
typedef struct {
/* Disable USB interrupt */
usb_osglue_intdisena_routine_t int_dis_proc;
/* Enable USB interrupt */
usb_osglue_intdisena_routine_t int_ena_proc;
/* Wait for a set amount of uS. Return the amount actually waited. If delay_us is 0, just yield.*/
usb_osglue_wait_routine_t wait_proc;
} usb_osglue_data_t;
extern usb_osglue_data_t s_usb_osglue;
#ifdef __cplusplus
}
#endif

50
components/esp_rom/include/esp32s3/rom/usb/usb_persist.h Normal file
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@ -0,0 +1,50 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
// USB persistence flags.
//This bit indicates persistence has been enabled, that is, the USB initialization routines should not
//reset the USB device as the device still is initialized and the host detected it with the same cdcacm/dfu
//descriptor as the ROM uses; we can just re-initialize the software side and have at 'er.
#define USBDC_PERSIST_ENA (1<<31)
//This bit indicates to the ROM that we rebooted because of a request to go into DFU mode; the ROM should
//honour this request.
#define USBDC_BOOT_DFU (1<<30)
//This being non-0 indicates a memory location where a 'testament' is stored, aka a piece of text that should be output
//after a reboot. Can contain core dump info or something.
#define USBDC_TESTAMENT_LOC_MASK 0x7FFFF //bits 19-0; this is added to a base address of 0x3FF80000.
//The testament is a FIFO. The ROM will output all data between textstart and textend; if textend is lower than textstart it will
//output everything from textstart to memend, then memstart to textend.
typedef struct {
char *memstart; //start of memory region
char *memend; //end of memory region
char *textstart; //start of text to output
char *textend;
} usbdc_testament_t;
#ifdef __cplusplus
}
#endif

2
components/esp_system/Kconfig
View File

@ -171,7 +171,7 @@ menu "ESP System Settings"
bool "USB CDC"
# The naming is confusing: USB_ENABLED means that TinyUSB driver is enabled, not USB in general.
# && !USB_ENABLED is because the ROM CDC driver is currently incompatible with TinyUSB.
depends on IDF_TARGET_ESP32S2 && !USB_ENABLED
depends on (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3) && !USB_ENABLED
config ESP_CONSOLE_UART_CUSTOM
bool "Custom UART"
config ESP_CONSOLE_NONE

3
components/esp_system/port/soc/esp32s3/CMakeLists.txt
View File

@ -13,6 +13,9 @@ set(srcs "dport_panic_highint_hdl.S"
add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
target_sources(${COMPONENT_LIB} PRIVATE ${srcs})
if(CONFIG_ESP_CONSOLE_USB_CDC)
target_sources(${COMPONENT_LIB} PRIVATE "${CMAKE_CURRENT_LIST_DIR}/usb_console.c")
endif()
#ld_include_panic_highint_hdl is added as an undefined symbol because otherwise the
#linker will ignore panic_highint_hdl.S as it has no other files depending on any

426
components/esp_system/port/soc/esp32s3/usb_console.c Normal file
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@ -0,0 +1,426 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <sys/param.h>
#include "sdkconfig.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "esp_system.h"
#include "esp_intr_alloc.h"
#include "esp_private/usb_console.h"
#include "soc/periph_defs.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/usb_struct.h"
#include "soc/usb_reg.h"
#include "soc/spinlock.h"
#include "hal/soc_hal.h"
#include "esp_rom_uart.h"
#include "esp_rom_sys.h"
#include "esp32s3/rom/usb/usb_dc.h"
#include "esp32s3/rom/usb/cdc_acm.h"
#include "esp32s3/rom/usb/usb_dfu.h"
#include "esp32s3/rom/usb/usb_device.h"
#include "esp32s3/rom/usb/usb_os_glue.h"
#include "esp32s3/rom/usb/usb_persist.h"
#include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
#define CDC_WORK_BUF_SIZE (ESP_ROM_CDC_ACM_WORK_BUF_MIN + CONFIG_ESP_CONSOLE_USB_CDC_RX_BUF_SIZE)
typedef enum {
REBOOT_NONE,
REBOOT_NORMAL,
REBOOT_BOOTLOADER,
REBOOT_BOOTLOADER_DFU,
} reboot_type_t;
static reboot_type_t s_queue_reboot = REBOOT_NONE;
static int s_prev_rts_state;
static intr_handle_t s_usb_int_handle;
static cdc_acm_device *s_cdc_acm_device;
static char s_usb_tx_buf[ACM_BYTES_PER_TX];
static size_t s_usb_tx_buf_pos;
static uint8_t cdcmem[CDC_WORK_BUF_SIZE];
static esp_usb_console_cb_t s_rx_cb;
static esp_usb_console_cb_t s_tx_cb;
static void *s_cb_arg;
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
static spinlock_t s_write_lock = SPINLOCK_INITIALIZER;
void esp_usb_console_write_char(char c);
#define ISR_FLAG ESP_INTR_FLAG_IRAM
#else
#define ISR_FLAG 0
#endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Optional write lock routines; used only if esp_rom_printf output via CDC is enabled */
static inline void write_lock_acquire(void);
static inline void write_lock_release(void);
/* The two functions below need to be revisited in the multicore case TODO ESP32-S3 IDF-2048*/
_Static_assert(SOC_CPU_CORES_NUM == 1, "usb_osglue_*_int is not multicore capable");
/* Called by ROM to disable the interrupts
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_osglue_dis_int(void)
{
if (s_usb_int_handle) {
esp_intr_disable(s_usb_int_handle);
}
}
/* Called by ROM to enable the interrupts
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_osglue_ena_int(void)
{
if (s_usb_int_handle) {
esp_intr_enable(s_usb_int_handle);
}
}
/* Delay function called by ROM USB driver.
* Non-static to allow placement into IRAM by ldgen.
*/
int esp_usb_console_osglue_wait_proc(int delay_us)
{
if (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING ||
!xPortCanYield()) {
esp_rom_delay_us(delay_us);
return delay_us;
}
if (delay_us == 0) {
/* We should effectively yield */
vPortYield();
return 1;
} else {
/* Just delay */
int ticks = MAX(delay_us / (portTICK_PERIOD_MS * 1000), 1);
vTaskDelay(ticks);
return ticks * portTICK_PERIOD_MS * 1000;
}
}
/* Called by ROM CDC ACM driver from interrupt context./
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_cdc_acm_cb(cdc_acm_device *dev, int status)
{
if (status == USB_DC_RESET || status == USB_DC_CONNECTED) {
s_prev_rts_state = 0;
} else if (status == ACM_STATUS_LINESTATE_CHANGED) {
uint32_t rts, dtr;
cdc_acm_line_ctrl_get(dev, LINE_CTRL_RTS, &rts);
cdc_acm_line_ctrl_get(dev, LINE_CTRL_DTR, &dtr);
if (!rts && s_prev_rts_state) {
if (dtr) {
s_queue_reboot = REBOOT_BOOTLOADER;
} else {
s_queue_reboot = REBOOT_NORMAL;
}
}
s_prev_rts_state = rts;
} else if (status == ACM_STATUS_RX && s_rx_cb) {
(*s_rx_cb)(s_cb_arg);
} else if (status == ACM_STATUS_TX && s_tx_cb) {
(*s_tx_cb)(s_cb_arg);
}
}
/* Non-static to allow placement into IRAM by ldgen. */
void esp_usb_console_dfu_detach_cb(int timeout)
{
s_queue_reboot = REBOOT_BOOTLOADER_DFU;
}
/* USB interrupt handler, forward the call to the ROM driver.
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_interrupt(void *arg)
{
usb_dc_check_poll_for_interrupts();
/* Restart can be requested from esp_usb_console_cdc_acm_cb or esp_usb_console_dfu_detach_cb */
if (s_queue_reboot != REBOOT_NONE) {
esp_restart();
}
}
/* Call the USB interrupt handler while any interrupts are pending,
* but not more than a few times.
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_poll_interrupts(void)
{
const int max_poll_count = 10;
for (int i = 0; (USB0.gintsts & USB0.gintmsk) != 0 && i < max_poll_count; i++) {
usb_dc_check_poll_for_interrupts();
}
}
/* This function gets registered as a restart handler.
* Prepares USB peripheral for restart and sets up persistence.
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_before_restart(void)
{
esp_usb_console_poll_interrupts();
usb_dc_prepare_persist();
if (s_queue_reboot == REBOOT_BOOTLOADER) {
chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
} else if (s_queue_reboot == REBOOT_BOOTLOADER_DFU) {
chip_usb_set_persist_flags(USBDC_BOOT_DFU);
REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
} else {
chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
esp_usb_console_poll_interrupts();
}
}
/* Reset some static state in ROM, which survives when going from the
* 2nd stage bootloader into the app. This cleans some variables which
* indicates that the driver is already initialized, allowing us to
* initialize it again, in the app.
*/
static void esp_usb_console_rom_cleanup(void)
{
/* TODO ESP32-S3 IDF-2987 */
// extern char rom_usb_dev, rom_usb_dev_end;
// extern char rom_usb_dw_ctrl, rom_usb_dw_ctrl_end;
// uart_acm_dev = NULL;
// memset((void *) &rom_usb_dev, 0, &rom_usb_dev_end - &rom_usb_dev);
// memset((void *) &rom_usb_dw_ctrl, 0, &rom_usb_dw_ctrl_end - &rom_usb_dw_ctrl);
}
esp_err_t esp_usb_console_init(void)
{
esp_err_t err;
err = esp_register_shutdown_handler(esp_usb_console_before_restart);
if (err != ESP_OK) {
return err;
}
esp_usb_console_rom_cleanup();
/* Install OS hooks */
s_usb_osglue.int_dis_proc = esp_usb_console_osglue_dis_int;
s_usb_osglue.int_ena_proc = esp_usb_console_osglue_ena_int;
s_usb_osglue.wait_proc = esp_usb_console_osglue_wait_proc;
/* Install interrupt.
* In case of ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF:
* Note that this the interrupt handler has to be placed into IRAM because
* the interrupt handler can also be called in polling mode, when
* interrupts are disabled, and a write to USB is performed with cache disabled.
* Since the handler function is in IRAM, we can register the interrupt as IRAM capable.
* It is not because we actually need the interrupt to work with cache disabled!
*/
err = esp_intr_alloc(ETS_USB_INTR_SOURCE, ISR_FLAG | ESP_INTR_FLAG_INTRDISABLED,
esp_usb_console_interrupt, NULL, &s_usb_int_handle);
if (err != ESP_OK) {
esp_unregister_shutdown_handler(esp_usb_console_before_restart);
return err;
}
/* Initialize USB / CDC */
s_cdc_acm_device = cdc_acm_init(cdcmem, CDC_WORK_BUF_SIZE);
usb_dc_check_poll_for_interrupts();
/* Set callback for handling DTR/RTS lines and TX/RX events */
cdc_acm_irq_callback_set(s_cdc_acm_device, esp_usb_console_cdc_acm_cb);
cdc_acm_irq_state_enable(s_cdc_acm_device);
/* Set callback for handling DFU detach */
usb_dfu_set_detach_cb(esp_usb_console_dfu_detach_cb);
/* Enable interrupts on USB peripheral side */
USB0.gahbcfg |= USB_GLBLLNTRMSK_M;
/* Enable the interrupt handler */
esp_intr_enable(s_usb_int_handle);
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Install esp_rom_printf handler */
ets_install_putc1(&esp_usb_console_write_char);
#endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
return ESP_OK;
}
/* Non-static to allow placement into IRAM by ldgen.
* Must be called with the write lock held.
*/
ssize_t esp_usb_console_flush_internal(size_t last_write_size)
{
if (s_usb_tx_buf_pos == 0) {
return 0;
}
assert(s_usb_tx_buf_pos >= last_write_size);
ssize_t ret;
size_t tx_buf_pos_before = s_usb_tx_buf_pos - last_write_size;
int sent = cdc_acm_fifo_fill(s_cdc_acm_device, (const uint8_t*) s_usb_tx_buf, s_usb_tx_buf_pos);
if (sent == last_write_size) {
/* everything was sent */
ret = last_write_size;
s_usb_tx_buf_pos = 0;
} else if (sent == 0) {
/* nothing was sent, roll back to the original state */
ret = 0;
s_usb_tx_buf_pos = tx_buf_pos_before;
} else {
/* Some data was sent, but not all of the buffer.
* We can still tell the caller that all the new data
* was "sent" since it is in the buffer now.
*/
ret = last_write_size;
memmove(s_usb_tx_buf, s_usb_tx_buf + sent, s_usb_tx_buf_pos - sent);
s_usb_tx_buf_pos = s_usb_tx_buf_pos - sent;
}
return ret;
}
ssize_t esp_usb_console_flush(void)
{
if (s_cdc_acm_device == NULL) {
return -1;
}
write_lock_acquire();
int ret = esp_usb_console_flush_internal(0);
write_lock_release();
return ret;
}
ssize_t esp_usb_console_write_buf(const char* buf, size_t size)
{
if (s_cdc_acm_device == NULL) {
return -1;
}
if (size == 0) {
return 0;
}
write_lock_acquire();
ssize_t tx_buf_available = ACM_BYTES_PER_TX - s_usb_tx_buf_pos;
ssize_t will_write = MIN(size, tx_buf_available);
memcpy(s_usb_tx_buf + s_usb_tx_buf_pos, buf, will_write);
s_usb_tx_buf_pos += will_write;
ssize_t ret;
if (s_usb_tx_buf_pos == ACM_BYTES_PER_TX || buf[size - 1] == '\n') {
/* Buffer is full, or a newline is found.
* For binary streams, we probably shouldn't do line buffering,
* but text streams are likely going to be the most common case.
*/
ret = esp_usb_console_flush_internal(will_write);
} else {
/* nothing sent out yet, but all the new data is in the buffer now */
ret = will_write;
}
write_lock_release();
return ret;
}
ssize_t esp_usb_console_read_buf(char *buf, size_t buf_size)
{
if (s_cdc_acm_device == NULL) {
return -1;
}
if (!esp_usb_console_read_available()) {
return 0;
}
int bytes_read = cdc_acm_fifo_read(s_cdc_acm_device, (uint8_t*) buf, buf_size);
return bytes_read;
}
esp_err_t esp_usb_console_set_cb(esp_usb_console_cb_t rx_cb, esp_usb_console_cb_t tx_cb, void *arg)
{
if (s_cdc_acm_device == NULL) {
return ESP_ERR_INVALID_STATE;
}
s_rx_cb = rx_cb;
if (s_rx_cb) {
cdc_acm_irq_rx_enable(s_cdc_acm_device);
} else {
cdc_acm_irq_rx_disable(s_cdc_acm_device);
}
s_tx_cb = tx_cb;
if (s_tx_cb) {
cdc_acm_irq_tx_enable(s_cdc_acm_device);
} else {
cdc_acm_irq_tx_disable(s_cdc_acm_device);
}
s_cb_arg = arg;
return ESP_OK;
}
bool esp_usb_console_read_available(void)
{
if (s_cdc_acm_device == NULL) {
return false;
}
return cdc_acm_rx_fifo_cnt(s_cdc_acm_device) > 0;
}
bool esp_usb_console_write_available(void)
{
if (s_cdc_acm_device == NULL) {
return false;
}
return cdc_acm_irq_tx_ready(s_cdc_acm_device) != 0;
}
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Used as an output function by esp_rom_printf.
* The LF->CRLF replacement logic replicates the one in esp_rom_uart_putc.
* Not static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_write_char(char c)
{
char cr = '\r';
char lf = '\n';
if (c == lf) {
esp_usb_console_write_buf(&cr, 1);
esp_usb_console_write_buf(&lf, 1);
} else if (c == '\r') {
} else {
esp_usb_console_write_buf(&c, 1);
}
}
static inline void write_lock_acquire(void)
{
spinlock_acquire(&s_write_lock, SPINLOCK_WAIT_FOREVER);
}
static inline void write_lock_release(void)
{
spinlock_release(&s_write_lock);
}
#else // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
static inline void write_lock_acquire(void)
{
}
static inline void write_lock_release(void)
{
}
#endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF

9
components/esp_wifi/CMakeLists.txt
View File

@ -8,6 +8,15 @@ else()
set(ldfragments "linker.lf")
endif()
# remove these when wifi support is ready on esp32-s3
if(${idf_target} STREQUAL "esp32s3")
idf_component_register(INCLUDE_DIRS "include"
REQUIRES esp_event
PRIV_REQUIRES wpa_supplicant nvs_flash esp_netif)
return()
endif()
if(IDF_TARGET_ESP32)
# dport workaround headers are in esp32 component
set(extra_priv_requires esp32)

2
components/esptool_py/esptool

@ -1 +1 @@
Subproject commit 0ba556f042bd428e62e96891601b1940bc1c0972
Subproject commit 16703d0be03e1477741a856e2dcdc4896fca9267

4
components/esptool_py/project_include.cmake
View File

@ -6,8 +6,8 @@ idf_build_get_property(python PYTHON)
set(chip_model ${target})
if(target STREQUAL "esp32s3")
if(CONFIG_IDF_TARGET_ESP32S3_BETA_VERSION_2)
set(chip_model "esp32s3beta2")
if(CONFIG_IDF_TARGET_ESP32S3_BETA_VERSION_3)
set(chip_model "esp32s3beta3")
endif()
endif()

3
components/hal/esp32/include/hal/i2c_ll.h
View File

@ -88,6 +88,9 @@ typedef struct {
#define I2C_LL_SLAVE_RX_INT (I2C_RXFIFO_FULL_INT_ENA_M | I2C_TRANS_COMPLETE_INT_ENA_M)
// I2C source clock frequency
#define I2C_LL_CLK_SRC_FREQ(src_clk) (80*1000*1000)
// I2C max timeout value
#define I2C_LL_MAX_TIMEOUT I2C_TIME_OUT_REG_V
/**
* @brief Calculate I2C bus frequency
*

2
components/hal/esp32c3/include/hal/i2c_ll.h
View File

@ -95,6 +95,8 @@ typedef struct {
#define I2C_LL_CLK_SRC_FREQ(src_clk) (((src_clk) == I2C_SCLK_RTC) ? 20*1000*1000 : 40*1000*1000); // Another clock is XTAL clock
// delay time after rtc_clk swiching on
#define DELAY_RTC_CLK_SWITCH (5)
// I2C max timeout value
#define I2C_LL_MAX_TIMEOUT I2C_TIME_OUT_REG_V
/**
* @brief Calculate I2C bus frequency

2
components/hal/esp32s2/include/hal/i2c_ll.h
View File

@ -89,6 +89,8 @@ typedef struct {
#define I2C_LL_SLAVE_RX_INT (I2C_RXFIFO_WM_INT_ENA_M | I2C_TRANS_COMPLETE_INT_ENA_M)
// I2C source clock
#define I2C_LL_CLK_SRC_FREQ(src_clk) (((src_clk) == I2C_SCLK_REF_TICK) ? 1000*1000 : 80*1000*1000); // Another clock is APB clock
// I2C max timeout value
#define I2C_LL_MAX_TIMEOUT I2C_TIME_OUT_REG_V
/**
* @brief Calculate I2C bus frequency
*

124
components/hal/esp32s3/include/hal/gdma_ll.h
View File

@ -50,11 +50,11 @@ extern "C" {
*/
static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf0[channel].mem_trans_en = enable;
dev->in[channel].conf0.mem_trans_en = enable;
if (enable) {
// to enable m2m mode, the tx chan has to be the same to rx chan, and set to a valid value
dev->peri_sel[channel].peri_in_sel = 0;
dev->peri_sel[channel].peri_out_sel = 0;
dev->in[channel].peri_sel.sel = 0;
dev->out[channel].peri_sel.sel = 0;
}
}
@ -63,7 +63,7 @@ static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bo
*/
static inline uint32_t gdma_ll_get_interrupt_status(gdma_dev_t *dev, uint32_t channel)
{
return dev->int_st[channel].val;
return dev->in[channel].int_st.val;
}
/**
@ -72,9 +72,9 @@ static inline uint32_t gdma_ll_get_interrupt_status(gdma_dev_t *dev, uint32_t ch
static inline void gdma_ll_enable_interrupt(gdma_dev_t *dev, uint32_t channel, uint32_t mask, bool enable)
{
if (enable) {
dev->int_ena[channel].val |= mask;
dev->in[channel].int_ena.val |= mask;
} else {
dev->int_ena[channel].val &= ~mask;
dev->in[channel].int_ena.val &= ~mask;
}
}
@ -83,7 +83,7 @@ static inline void gdma_ll_enable_interrupt(gdma_dev_t *dev, uint32_t channel, u
*/
static inline void gdma_ll_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask)
{
dev->int_clr[channel].val = mask;
dev->in[channel].int_clr.val = mask;
}
/**
@ -100,7 +100,7 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable)
*/
static inline void gdma_ll_rx_enable_owner_check(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf1[channel].check_owner = enable;
dev->in[channel].conf1.in_check_owner = enable;
}
/**
@ -108,7 +108,7 @@ static inline void gdma_ll_rx_enable_owner_check(gdma_dev_t *dev, uint32_t chann
*/
static inline void gdma_ll_rx_enable_data_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf0[channel].in_data_burst_en = enable;
dev->in[channel].conf0.in_data_burst_en = enable;
}
/**
@ -116,7 +116,7 @@ static inline void gdma_ll_rx_enable_data_burst(gdma_dev_t *dev, uint32_t channe
*/
static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf0[channel].indscr_burst_en = enable;
dev->in[channel].conf0.indscr_burst_en = enable;
}
/**
@ -124,8 +124,8 @@ static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t
*/
static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
{
dev->conf0[channel].in_rst = 1;
dev->conf0[channel].in_rst = 0;
dev->in[channel].conf0.in_rst = 1;
dev->in[channel].conf0.in_rst = 0;
}
/**
@ -134,7 +134,7 @@ static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel)
*/
static inline void gdma_ll_rx_set_block_size_psram(gdma_dev_t *dev, uint32_t channel, uint32_t size_index)
{
dev->conf1[channel].in_ext_mem_bk_size = size_index;
dev->in[channel].conf1.in_ext_mem_bk_size = size_index;
}
/**
@ -142,7 +142,7 @@ static inline void gdma_ll_rx_set_block_size_psram(gdma_dev_t *dev, uint32_t cha
*/
static inline void gdma_ll_rx_set_water_mark(gdma_dev_t *dev, uint32_t channel, uint32_t water_mark)
{
dev->conf1[channel].infifo_full_thrs = water_mark;
dev->in[channel].conf1.dma_infifo_full_thrs = water_mark;
}
/**
@ -151,7 +151,7 @@ static inline void gdma_ll_rx_set_water_mark(gdma_dev_t *dev, uint32_t channel,
*/
static inline bool gdma_ll_rx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
{
return dev->infifo_status[channel].val & (1 << 2 * (fifo_level - 1));
return dev->in[channel].infifo_status.val & (1 << 2 * (fifo_level - 1));
}
/**
@ -160,7 +160,7 @@ static inline bool gdma_ll_rx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, ui
*/
static inline bool gdma_ll_rx_is_fifo_empty(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
{
return dev->infifo_status[channel].val & (1 << (2 * (fifo_level - 1) + 1));
return dev->in[channel].infifo_status.val & (1 << (2 * (fifo_level - 1) + 1));
}
/**
@ -171,11 +171,11 @@ static inline uint32_t gdma_ll_rx_get_fifo_bytes(gdma_dev_t *dev, uint32_t chann
{
switch (fifo_level) {
case 1:
return dev->infifo_status[channel].infifo_cnt_l1;
return dev->in[channel].infifo_status.infifo_cnt_l1;
case 2:
return dev->infifo_status[channel].infifo_cnt_l2;
return dev->in[channel].infifo_status.infifo_cnt_l2;
case 3:
return dev->infifo_status[channel].infifo_cnt_l3;
return dev->in[channel].infifo_status.infifo_cnt_l3;
}
}
@ -184,8 +184,8 @@ static inline uint32_t gdma_ll_rx_get_fifo_bytes(gdma_dev_t *dev, uint32_t chann
*/
static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel)
{
dev->in_pop[channel].infifo_pop = 1;
return dev->in_pop[channel].infifo_rdata;
dev->in[channel].pop.infifo_pop = 1;
return dev->in[channel].pop.infifo_rdata;
}
/**
@ -193,7 +193,7 @@ static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel)
*/
static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
{
dev->in_link[channel].addr = addr;
dev->in[channel].link.addr = addr;
}
/**
@ -201,7 +201,7 @@ static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
*/
static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
{
dev->in_link[channel].start = 1;
dev->in[channel].link.start = 1;
}
/**
@ -209,7 +209,7 @@ static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel)
*/
static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
{
dev->in_link[channel].stop = 1;
dev->in[channel].link.stop = 1;
}
/**
@ -217,7 +217,7 @@ static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel)
*/
static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
{
dev->in_link[channel].restart = 1;
dev->in[channel].link.restart = 1;
}
/**
@ -225,7 +225,7 @@ static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel)
*/
static inline void gdma_ll_rx_enable_auto_return(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->in_link[channel].auto_ret = enable;
dev->in[channel].link.auto_ret = enable;
}
/**
@ -233,7 +233,7 @@ static inline void gdma_ll_rx_enable_auto_return(gdma_dev_t *dev, uint32_t chann
*/
static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
{
return dev->in_link[channel].park;
return dev->in[channel].link.park;
}
/**
@ -241,7 +241,7 @@ static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
*/
static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
{
return dev->in_suc_eof_des_addr[channel];
return dev->in[channel].suc_eof_des_addr;
}
/**
@ -249,7 +249,7 @@ static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uin
*/
static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
{
return dev->in_err_eof_des_addr[channel];
return dev->in[channel].err_eof_des_addr;
}
/**
@ -257,7 +257,7 @@ static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint3
*/
static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
{
return dev->in_dscr[channel];
return dev->in[channel].dscr;
}
/**
@ -265,7 +265,7 @@ static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_
*/
static inline void gdma_ll_rx_set_weight(gdma_dev_t *dev, uint32_t channel, uint32_t weight)
{
dev->wight[channel].rx_weight = weight;
dev->in[channel].wight.rx_weight = weight;
}
/**
@ -273,15 +273,15 @@ static inline void gdma_ll_rx_set_weight(gdma_dev_t *dev, uint32_t channel, uint
*/
static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, uint32_t prio)
{
dev->pri[channel].rx_pri = prio;
dev->in[channel].pri.rx_pri = prio;
}
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, uint32_t periph_id)
{
dev->peri_sel[channel].peri_in_sel = periph_id;
dev->in[channel].peri_sel.sel = periph_id;
}
/**
@ -292,7 +292,7 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe
static inline void gdma_ll_rx_extend_l2_fifo_size_to(gdma_dev_t *dev, uint32_t channel, uint32_t size_in_bytes)
{
if (size_in_bytes > SOC_GDMA_L2_FIFO_BASE_SIZE) {
dev->sram_size[channel].in_size = (size_in_bytes - SOC_GDMA_L2_FIFO_BASE_SIZE) / 8;
dev->in[channel].sram_size.in_size = (size_in_bytes - SOC_GDMA_L2_FIFO_BASE_SIZE) / 8;
}
}
@ -303,7 +303,7 @@ static inline void gdma_ll_rx_extend_l2_fifo_size_to(gdma_dev_t *dev, uint32_t c
*/
static inline void gdma_ll_tx_enable_owner_check(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf1[channel].check_owner = enable;
dev->out[channel].conf1.out_check_owner = enable;
}
/**
@ -311,7 +311,7 @@ static inline void gdma_ll_tx_enable_owner_check(gdma_dev_t *dev, uint32_t chann
*/
static inline void gdma_ll_tx_enable_data_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf0[channel].out_data_burst_en = enable;
dev->out[channel].conf0.out_data_burst_en = enable;
}
/**
@ -319,7 +319,7 @@ static inline void gdma_ll_tx_enable_data_burst(gdma_dev_t *dev, uint32_t channe
*/
static inline void gdma_ll_tx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf0[channel].outdscr_burst_en = enable;
dev->out[channel].conf0.outdscr_burst_en = enable;
}
/**
@ -327,7 +327,7 @@ static inline void gdma_ll_tx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t
*/
static inline void gdma_ll_tx_set_eof_mode(gdma_dev_t *dev, uint32_t channel, uint32_t mode)
{
dev->conf0[channel].out_eof_mode = mode;
dev->out[channel].conf0.out_eof_mode = mode;
}
/**
@ -335,7 +335,7 @@ static inline void gdma_ll_tx_set_eof_mode(gdma_dev_t *dev, uint32_t channel, ui
*/
static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf0[channel].out_auto_wrback = enable;
dev->out[channel].conf0.out_auto_wrback = enable;
}
/**
@ -343,8 +343,8 @@ static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t c
*/
static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
{
dev->conf0[channel].out_rst = 1;
dev->conf0[channel].out_rst = 0;
dev->out[channel].conf0.out_rst = 1;
dev->out[channel].conf0.out_rst = 0;
}
/**
@ -353,7 +353,7 @@ static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel)
*/
static inline void gdma_ll_tx_set_block_size_psram(gdma_dev_t *dev, uint32_t channel, uint32_t size_index)
{
dev->conf1[channel].out_ext_mem_bk_size = size_index;
dev->out[channel].conf1.out_ext_mem_bk_size = size_index;
}
/**
@ -362,7 +362,7 @@ static inline void gdma_ll_tx_set_block_size_psram(gdma_dev_t *dev, uint32_t cha
*/
static inline bool gdma_ll_tx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
{
return dev->outfifo_status[channel].val & (1 << 2 * (fifo_level - 1));
return dev->out[channel].outfifo_status.val & (1 << 2 * (fifo_level - 1));
}
/**
@ -371,7 +371,7 @@ static inline bool gdma_ll_tx_is_fifo_full(gdma_dev_t *dev, uint32_t channel, ui
*/
static inline bool gdma_ll_tx_is_fifo_empty(gdma_dev_t *dev, uint32_t channel, uint32_t fifo_level)
{
return dev->outfifo_status[channel].val & (1 << (2 * (fifo_level - 1) + 1));
return dev->out[channel].outfifo_status.val & (1 << (2 * (fifo_level - 1) + 1));
}
/**
@ -382,11 +382,11 @@ static inline uint32_t gdma_ll_tx_get_fifo_bytes(gdma_dev_t *dev, uint32_t chann
{
switch (fifo_level) {
case 1:
return dev->outfifo_status[channel].outfifo_cnt_l1;
return dev->out[channel].outfifo_status.outfifo_cnt_l1;
case 2:
return dev->outfifo_status[channel].outfifo_cnt_l2;
return dev->out[channel].outfifo_status.outfifo_cnt_l2;
case 3:
return dev->outfifo_status[channel].outfifo_cnt_l3;
return dev->out[channel].outfifo_status.outfifo_cnt_l3;
}
}
@ -395,8 +395,8 @@ static inline uint32_t gdma_ll_tx_get_fifo_bytes(gdma_dev_t *dev, uint32_t chann
*/
static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint32_t data)
{
dev->out_push[channel].outfifo_wdata = data;
dev->out_push[channel].outfifo_push = 1;
dev->out[channel].push.outfifo_wdata = data;
dev->out[channel].push.outfifo_push = 1;
}
/**
@ -404,7 +404,7 @@ static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint3
*/
static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr)
{
dev->out_link[channel].addr = addr;
dev->out[channel].link.addr = addr;
}
/**
@ -412,7 +412,7 @@ static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u
*/
static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
{
dev->out_link[channel].start = 1;
dev->out[channel].link.start = 1;
}
/**
@ -420,7 +420,7 @@ static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel)
*/
static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
{
dev->out_link[channel].stop = 1;
dev->out[channel].link.stop = 1;
}
/**
@ -428,7 +428,7 @@ static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel)
*/
static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
{
dev->out_link[channel].restart = 1;
dev->out[channel].link.restart = 1;
}
/**
@ -436,7 +436,7 @@ static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel)
*/
static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
{
return dev->out_link[channel].park;
return dev->out[channel].link.park;
}
/**
@ -444,7 +444,7 @@ static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel)
*/
static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel)
{
return dev->out_eof_des_addr[channel];
return dev->out[channel].eof_des_addr;
}
/**
@ -452,7 +452,7 @@ static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t ch
*/
static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel)
{
return dev->out_dscr[channel];
return dev->out[channel].dscr;
}
/**
@ -460,7 +460,7 @@ static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_
*/
static inline void gdma_ll_tx_set_weight(gdma_dev_t *dev, uint32_t channel, uint32_t weight)
{
dev->wight[channel].tx_weight = weight;
dev->out[channel].wight.tx_weight = weight;
}
/**
@ -468,15 +468,15 @@ static inline void gdma_ll_tx_set_weight(gdma_dev_t *dev, uint32_t channel, uint
*/
static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, uint32_t prio)
{
dev->pri[channel].tx_pri = prio;
dev->out[channel].pri.tx_pri = prio;
}
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, uint32_t periph_id)
{
dev->peri_sel[channel].peri_out_sel = periph_id;
dev->out[channel].peri_sel.sel = periph_id;
}
/**
@ -487,7 +487,7 @@ static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channe
static inline void gdma_ll_tx_extend_fifo_size_to(gdma_dev_t *dev, uint32_t channel, uint32_t size_in_bytes)
{
if (size_in_bytes > SOC_GDMA_L2_FIFO_BASE_SIZE) {
dev->sram_size[channel].out_size = (size_in_bytes - SOC_GDMA_L2_FIFO_BASE_SIZE) / 8;
dev->out[channel].sram_size.out_size = (size_in_bytes - SOC_GDMA_L2_FIFO_BASE_SIZE) / 8;
}
}

14
components/hal/esp32s3/include/hal/i2c_ll.h
View File

@ -90,6 +90,8 @@ typedef struct {
#define I2C_LL_SLAVE_RX_INT (I2C_RXFIFO_WM_INT_ENA_M | I2C_TRANS_COMPLETE_INT_ENA_M)
// I2C source clock
#define I2C_LL_CLK_SRC_FREQ(src_clk) (((src_clk) == I2C_SCLK_RTC) ? 8*1000*1000 : 40*1000*1000); // Another clock is XTAL clock
// I2C max timeout value
#define I2C_LL_MAX_TIMEOUT I2C_TIME_OUT_VALUE_V
/**
* @brief Calculate I2C bus frequency
@ -159,7 +161,7 @@ static inline void i2c_ll_set_bus_timing(i2c_dev_t *hw, i2c_clk_cal_t *bus_cfg)
//hold
hw->scl_start_hold.time = bus_cfg->hold - 1;
hw->scl_stop_hold.time = bus_cfg->hold;
hw->timeout.time_out_value = bus_cfg->tout;
hw->timeout.tout = bus_cfg->tout;
hw->timeout.time_out_en = 1;
}
@ -280,7 +282,7 @@ static inline void i2c_ll_set_fifo_mode(i2c_dev_t *hw, bool fifo_mode_en)
*/
static inline void i2c_ll_set_tout(i2c_dev_t *hw, int tout)
{
hw->timeout.time_out_value = tout;
hw->timeout.tout = tout;
}
/**
@ -449,7 +451,7 @@ static inline uint32_t i2c_ll_get_hw_version(i2c_dev_t *hw)
*/
static inline bool i2c_ll_is_bus_busy(i2c_dev_t *hw)
{
return hw->status_reg.bus_busy;
return hw->sr.bus_busy;
}
/**
@ -473,7 +475,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw)
*/
static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
{
return hw->status_reg.rx_fifo_cnt;
return hw->sr.rx_fifo_cnt;
}
/**
@ -485,7 +487,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
*/
static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw)
{
return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt;
return SOC_I2C_FIFO_LEN - hw->sr.tx_fifo_cnt;
}
/**
@ -497,7 +499,7 @@ static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw)
*/
static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw)
{
return hw->timeout.time_out_value;
return hw->timeout.tout;
}
/**

8
components/hal/esp32s3/include/hal/rmt_ll.h
View File

@ -88,16 +88,16 @@ static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel)
{
dev->tx_conf[channel].mem_rd_rst = 1;
dev->tx_conf[channel].mem_rd_rst = 0;
dev->tx_conf[channel].apb_mem_rst = 1;
dev->tx_conf[channel].apb_mem_rst = 0;
dev->tx_conf[channel].mem_rst = 1;
dev->tx_conf[channel].mem_rst = 0;
}
static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel)
{
dev->rx_conf[channel].conf1.mem_wr_rst = 1;
dev->rx_conf[channel].conf1.mem_wr_rst = 0;
dev->rx_conf[channel].conf1.apb_mem_rst = 1;
dev->rx_conf[channel].conf1.apb_mem_rst = 0;
dev->rx_conf[channel].conf1.mem_rst = 1;
dev->rx_conf[channel].conf1.mem_rst = 0;
}
static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel)

6
components/hal/esp32s3/include/hal/touch_sensor_ll.h
View File

@ -745,9 +745,9 @@ static inline void touch_ll_filter_get_debounce(uint32_t *dbc_cnt)
static inline void touch_ll_filter_set_noise_thres(uint32_t noise_thr)
{
RTCCNTL.touch_filter_ctrl.touch_noise_thres = noise_thr;
RTCCNTL.touch_filter_ctrl.config2 = noise_thr;
RTCCNTL.touch_filter_ctrl.config1 = 0xF;
RTCCNTL.touch_filter_ctrl.config3 = 2;
RTCCNTL.touch_filter_ctrl.touch_neg_noise_thres = noise_thr;
RTCCNTL.touch_filter_ctrl.touch_neg_noise_limit = 0xF;
RTCCNTL.touch_filter_ctrl.touch_hysteresis = 2;
}
/**

4
components/newlib/locks.c
View File

@ -387,13 +387,13 @@ void esp_newlib_locks_init(void)
__env_lock_object = (_lock_t) &s_common_mutex;
extern _lock_t __tz_lock_object;
__tz_lock_object = (_lock_t) &s_common_recursive_mutex;
#elif defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3)
#elif defined(CONFIG_IDF_TARGET_ESP32S2)
/* Newlib 3.0.0 is used in ROM, the following lock symbols are defined: */
extern _lock_t __sinit_recursive_mutex;
__sinit_recursive_mutex = (_lock_t) &s_common_recursive_mutex;
extern _lock_t __sfp_recursive_mutex;
__sfp_recursive_mutex = (_lock_t) &s_common_recursive_mutex;
#elif defined(CONFIG_IDF_TARGET_ESP32C3)
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3)
/* Newlib 3.3.0 is used in ROM, built with _RETARGETABLE_LOCKING.
* No access to lock variables for the purpose of ECO forward compatibility,
* however we have an API to initialize lock variables used in the ROM.

3
components/newlib/newlib_init.c
View File

@ -22,6 +22,7 @@
#include <sys/signal.h>
#include <sys/unistd.h>
#include <sys/reent.h>
#include <assert.h>
#include "esp_newlib.h"
#include "esp_attr.h"
#include "sdkconfig.h"
@ -111,7 +112,7 @@ static struct syscall_stub_table s_stub_table = {
._printf_float = NULL,
._scanf_float = NULL,
#endif
#ifdef CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
/* TODO IDF-2570 : mark that this assert failed in ROM, to avoid confusion between IDF & ROM
assertion failures (as function names & source file names will be similar)
*/

3
components/soc/esp32s3/soc_memory_layout.c
View File

@ -76,7 +76,6 @@ const soc_memory_region_t soc_memory_regions[] = {
const size_t soc_memory_region_count = sizeof(soc_memory_regions) / sizeof(soc_memory_region_t);
extern int _dram0_rtos_reserved_start; // defined in esp32s3.rom.ld
extern int _data_start, _heap_start, _iram_start, _iram_end; // defined in esp32s3.project.ld.in
/**
@ -84,8 +83,6 @@ extern int _data_start, _heap_start, _iram_start, _iram_end; // defined in esp32
* These are removed from the soc_memory_regions array when heaps are created.
*
*/
//ROM data region
SOC_RESERVE_MEMORY_REGION((intptr_t)&_dram0_rtos_reserved_start, SOC_DIRAM_DRAM_HIGH, rom_data_region);
// Static data region. DRAM used by data+bss and possibly rodata
SOC_RESERVE_MEMORY_REGION((intptr_t)&_data_start, (intptr_t)&_heap_start, dram_data);

37
components/soc/esp32s3/usb_periph.h Normal file
View File

@ -0,0 +1,37 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "soc/usb_pins.h"
#include "soc/gpio_sig_map.h"
#include "soc/usb_reg.h"
#include "soc/usb_types.h"
#include "soc/usb_struct.h"
#include "soc/usb_wrap_reg.h"
#include "soc/usb_wrap_struct.h"
/**
* @brief A pin descriptor for init
*/
typedef struct {
const int pin;
const int func;
const bool is_output;
const int ext_phy_only;
} usb_iopin_dsc_t;
extern const usb_iopin_dsc_t usb_periph_iopins[];

3
components/soc/memory_layout_utils.c
View File

@ -20,6 +20,9 @@
#ifdef CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/rom_layout.h"
#define ROM_HAS_LAYOUT_TABLE 1
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/rom_layout.h"
#define ROM_HAS_LAYOUT_TABLE 1
#else
#define ROM_HAS_LAYOUT_TABLE 0
#endif

2
components/spi_flash/esp32s3/flash_ops_esp32s3.c
View File

@ -70,7 +70,7 @@ esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_a
ops->start();
}
flash_rom_init();
rc = SPI_Encrypt_Write(dest_addr, src, size);
rc = esp_rom_spiflash_write_encrypted(dest_addr, (void *)src, size);
if (ops && ops->end) {
ops->end();
}

1
components/vfs/vfs_uart.c
View File

@ -27,6 +27,7 @@
#include "sdkconfig.h"
#include "driver/uart_select.h"
#include "esp_rom_uart.h"
#include "soc/soc_caps.h"
// TODO: make the number of UARTs chip dependent
#define UART_NUM SOC_UART_NUM

3
tools/test_apps/protocols/mqtt/publish_connect_test/README.md
View File

@ -1,3 +1,6 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- |
# ESP-MQTT advanced publish and connect test project
Main purpose of this application is to test the MQTT library to correctly publish and receive messages (of different size and sequences) over different transports.

3
tools/test_apps/protocols/openssl/README.md
View File

@ -1,3 +1,6 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- |
# ESP-OPENSSL connect test project
Main purpose of this application is to test the ESP-OPENSSL library to correctly connect/refuse connectio with TLS servers.

3
tools/test_apps/system/no_embedded_paths/README.md
View File

@ -1,3 +1,6 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- |
# No Embedded Paths
This test app exists to verify that paths (like __FILE__) are not compiled into