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578 Commits

Author SHA1 Message Date
Cao Sen Miao
0985bfbe27 feat(i2c_master): Add lp_i2c support in i2c master driver 2024-04-03 11:39:04 +08:00
Mahavir Jain
999f3f69c0 Merge branch 'esp32p4/deterministic_ecdsa_support' into 'master' 
Add deterministic ECDSA support

Closes IDF-8507

See merge request espressif/esp-idf!29010
 2024-04-01 16:45:14 +08:00
xiehang
f3c5047638 feat(extconn): Supports external WiFi connections for ESP32p4 and other espressf chips 2024-04-01 11:44:52 +08:00
xiehang
9d7bd6a8dd change(esp_phy): Add SOC_PHY_SUPPORTED to control phy mode 2024-04-01 11:36:55 +08:00
Li Shuai
c07be48edb change(esp_hw_support): add adc retention module and it is dependencies on the clock modem 2024-03-30 11:51:52 +08:00
Li Shuai
59115cd2d1 change(esp_hw_support): some system peripherals to use a retention module number 2024-03-29 15:27:08 +08:00
Li Shuai
080d09387c change(esp_hw_support): modify the style of module argument from bitmap to number 2024-03-29 15:22:52 +08:00
harshal.patil
272633bde1
fix(mbedtls/ecdsa): Fix dependant peripheral's enable and reset 2024-03-29 12:40:13 +05:30
wuzhenghui
4a64d2fe2c change(hal): control PAU bus clock by hal layer 2024-03-29 00:36:46 +08:00
wanlei
1e6c61daa6 spi_master: sct mode support set line mode, transaction interval time 
support line mode 1-2-4-8 depend on targets.
fix sct mode dma descriptor counter compute issue.
add conf_bits_len setting API to control interval time.
 2024-03-20 15:42:03 +08:00
Armando
b303e4b7a6 spi_master: new segmented-configure-transfer mode 2024-03-20 15:42:03 +08:00
laokaiyao
8de41350eb feat(esp32c5mp): support to build g0 components 2024-03-14 15:09:22 +08:00
Wu Zheng Hui
5a682c3bbb Merge branch 'feature/optimize_chips_active_power' into 'master' 
feat(system): Optimize the power consumption of esp32h2 and esp32c6 in the active state

Closes IDF-5658

See merge request espressif/esp-idf!27798
 2024-03-14 12:08:33 +08:00
wuzhenghui
0fc97f0e84
feat(gpio): support LP_IO clock gating management 2024-03-13 11:56:14 +08:00
wuzhenghui
9e8e20227f
feat(system): disable RNG module clock by default for save power 2024-03-12 10:10:41 +08:00
Mahavir Jain
fd6c710b27
fix: cleanup memprot files for C6/H2/P4 
There is no separate permission control peripheral in C6/H2/P4.
Memory protection is achieved using built-in PMA/PMP and hence
removing permission control specific files.
 2024-03-11 17:10:40 +05:30
wuzhenghui
85b246ac88
feat(system): gate the debug clock source by default for esp32c6 and esp32h2 2024-03-07 19:26:39 +08:00
wanlei
0cf11e5b87 feat(spi): add esp32c5 spi support 2024-03-07 18:11:48 +08:00
Guillaume Souchere
0b9f01ac20 feat(soc): Add soc_caps macros for sleep support 
- modify console example to use the new SOC_LIGHT_SLEEP_SUPPORTED
and SOC_DEEP_SLEEP_SUPPORTED macros when registering sleep commands

- remove exclusion of esp32p4 in basic and advanced example in
.build-test-rules.yml

- replace exclusion of esp32p4 for deep and light sleep tests with newly introduced macro

- remove the temporary disable check for esp32p4 and uses the
SOC_LIGHT_SLEEP_SUPPORTED maccro instead.
 2024-03-05 07:05:40 +01:00
Cao Sen Miao
2b2b3be98f feat(temperature_sensor): Add new support for temperature sensor ETM on ESP32C6/H2 2024-03-01 18:52:39 +08:00
Song Ruo Jing
98d9f04b00 feat(gdma): add GDMA support for ESP32C5 2024-02-28 12:38:02 +08:00
C.S.M
2302dd5a91 Merge branch 'feature/i2c_sleep' into 'master' 
feat(i2c): Support i2c sleep retention on esp32c6/h2

Closes IDF-8458

See merge request espressif/esp-idf!28885
 2024-02-24 09:58:35 +08:00
Lin Rui Hao
00df222cdf Merge branch 'docs/rf_coexistence_api_guides_support_esp32c2' into 'master' 
Docs: RF coexistence api guides support esp32c2

Closes BT-3582

See merge request espressif/esp-idf!28780
 2024-02-23 15:20:45 +08:00
Cao Sen Miao
cf521b60ea feat(i2c): Support i2c sleep retention on esp32c6/h2 2024-02-23 11:28:14 +08:00
linruihao
1d34bb5e8a fix(esp_coex): add support_coexistence soc_caps for esp32c2 and esp32h2 2024-02-21 16:38:46 +08:00
Marius Vikhammer
c0a2043562 fix(system): update reset reasons for C6 and H2 2024-02-20 12:27:09 +08:00
Song Ruo Jing
5276cd4f1d refactor(uart): add support to be able to test LP_UART port 
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
 2024-02-07 14:37:48 +08:00
wuzhenghui
0c2f811ca8
feat(esp_hw_support): support gdma register context sleep retention 2024-02-02 11:21:40 +08:00
Song Ruo Jing
cf93777077 refactor(rtc): move soc/rtc.h from soc to esp_hw_support component 
Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
 2024-01-25 19:15:33 +08:00
Wu Zheng Hui
55f04b3326 Merge branch 'feature/clean_up_retention_context_definitions' into 'master' 
refactor(esp_hw_support): move sleep retention context definition to soc target folder

Closes PM-10

See merge request espressif/esp-idf!26753
 2024-01-24 20:24:02 +08:00
wuzhenghui
f3f12e973c
refactor(esp_hw_support): separate different chip system peripheral regs context defs to target folder 2024-01-23 13:30:01 +08:00
wuzhenghui
9b3dc69908
refactor(esp_hw_support): move regdma structure defination to soc components 2024-01-23 11:51:44 +08:00
Mahavir Jain
9ecd2fd7e3 fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-22 13:34:32 +08:00
Konstantin Kondrashov
261651fc19 Merge branch 'feature/efuse_update' into 'master' 
feat(efuse): Adds new efuses for H2 and C6 chips

See merge request espressif/esp-idf!27672
 2024-01-20 03:10:44 +08:00
Omar Chebib
cdde05335e Merge branch 'refactor/riscv_interrupt' into 'master' 
refactor(riscv): Refactor crosscore interrupts and core interrupt code

Closes IDF-5720, DOC-5177, and IDF-7899

See merge request espressif/esp-idf!27845
 2024-01-19 10:51:04 +08:00
C.S.M
6c5373911a Merge branch 'bugfix/cannot_jump_range' into 'master' 
fix(temperature_sensor): Cannot switch the range smoothly on esp32h2

Closes IDF-9054

See merge request espressif/esp-idf!28530
 2024-01-19 09:44:26 +08:00
Omar Chebib
102d5bbf72 refactor(riscv): added a new API for the interrupts 2024-01-18 16:36:53 +08:00
Cao Sen Miao
2859388f11 fix(temperature_sensor): Cannot switch the range smmothly on esp32h2 2024-01-17 16:55:30 +08:00
KonstantinKondrashov
8802e4d77d feat(efuse): Adds new efuse for esp32h2 2024-01-16 17:46:50 +08:00
laokaiyao
c3c72f02af fix(i2s): fixed incorrect reg base name on C3 
Closes https://github.com/espressif/esp-idf/issues/12643
 2024-01-16 14:12:32 +08:00
Cao Sen Miao
0bf2b35b33 fix(i2c): Use hardware fsm reset on esp32c6/h2/p4 2024-01-16 10:05:05 +08:00
Kevin (Lao Kaiyao)
83d5797967 Merge branch 'feature/parlio_rx_driver' into 'master' 
driver: add parallel IO RX driver

Closes IDF-7002 and IDF-6984

See merge request espressif/esp-idf!23488
 2023-12-29 16:36:24 +08:00
Song Ruo Jing
7f2b85b82b feat(clk): add basic clock support for esp32p4 
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
 2023-12-29 00:37:26 +08:00
laokaiyao
04d267b023 feat(parlio_rx): implement parallel io rx driver 2023-12-27 19:32:12 +08:00
Cao Sen Miao
439bc719fe feat(temperature_sensor): Add temperature sensor support on esp32p4 2023-12-26 16:45:20 +08:00
Roshan Bangar
473f2bdd1e fix(nimble): Added periodic_adv_enh soc_caps for c2, h2 2023-12-20 12:20:11 +05:30
Lou Tian Hao
fedb3d9f9d Merge branch 'change/change_regdma_power_issue_macro' into 'master' 
change(pm): change name SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG

Closes PM-45

See merge request espressif/esp-idf!27934
 2023-12-19 11:19:51 +08:00
Lou Tianhao
d8b1f7207a change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-15 15:04:06 +08:00
Xu Si Yu
6cef08c03d feat(ieee802154): add tx/rx report for IEEE802.15.4 debug 2023-12-14 12:29:57 +08:00
laokaiyao
2b44d62e43 feat(esp32c5): support esp32c5 g0 components 2023-12-08 15:12:24 +08:00
Armando
2c32bd209a change(fpga): added bypass rng configuration 2023-12-05 11:38:35 +08:00
Gao Xu
b9a3dd1b37 Merge branch 'bugfix/fix_adc_cali_error_after_light_sleep_wake_on_h2' into 'master' 
adc: fix calibration error when waking up from light sleep on H2 and enable test

Closes IDF-8569

See merge request espressif/esp-idf!27242
 2023-11-24 18:25:35 +08:00
Jakob Hasse
5f4865e838 Merge branch 'doc/soc_cap_tool' into 'master' 
Doc/soc cap tool

See merge request espressif/esp-idf!27154
 2023-11-23 10:47:01 +08:00
gaoxu
4f81883ccf fix(adc): restore cali registers after light sleep wake up on H2 and enable test 2023-11-20 17:38:34 +08:00
morris
72e414105d Merge branch 'contrib/github_pr_12559' into 'master' 
fix(spi): correct macro REG_SPI_BASE(i) for all targets (GitHub PR)

Closes IDFGH-11421 and IDFGH-11424

See merge request espressif/esp-idf!27085
 2023-11-20 15:55:41 +08:00
Mahavir Jain
9fb38d82a3 Merge branch 'fix/rng_register_prefix_discrepency_newer_targets' into 'master' 
Fix: RNG register prefix discrepancy for ESP32C6 and ESP32H2

Closes DOC-5161 and DOC-5175

See merge request espressif/esp-idf!27212
 2023-11-20 10:53:09 +08:00
Mahavir Jain
7505667e7d Merge branch 'bugfix/esp32h2_ecdsa_hardware_k' into 'master' 
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose

Closes IDF-8508 and IDF-8506

See merge request espressif/esp-idf!26918
 2023-11-17 15:10:12 +08:00
Jakob Hasse
46e44ee154 docs(soc): improved soc caps generation documentation 2023-11-17 10:43:59 +08:00
wanlei
4dcd6d7913 fix(spi): correct some signals and dummy bits docs 2023-11-17 02:39:28 +00:00
TD-er
90eada6993 fix(spi): Correct REG_SPI_BASE(i) macro for all targets 
The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
 2023-11-17 02:39:28 +00:00
harshal.patil
91af44d6e8
fix(soc/esp32h2): Fix llperi_rng_data field discrepancy 2023-11-16 17:49:26 +05:30
wuzhenghui
161bd8bfed change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 2023-11-16 18:11:57 +08:00
Mahavir Jain
94bf4710fa
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose 
In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.

In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
 2023-11-15 09:42:26 +05:30
Song Ruo Jing
46d33e46ef fix(console): enable to select UART1 port for console output 
This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
 2023-11-09 22:32:49 +08:00
gaoxu
0ea0b39725 feat(adc_cali): Add ADC calibration support for ESP32H2 2023-10-31 11:29:30 +08:00
C.S.M
4111b07076 Merge branch 'bugfix/flash_enc_plaintext' into 'master' 
fix(flash_encryption): Fix the issue that XTS_AES Plain text memory size wrong

See merge request espressif/esp-idf!26640
 2023-10-27 18:23:00 +08:00
Cao Sen Miao
420ac840ff fix(flash_encryption): Fix the issue that XTS_AES Plain text memory size wrong 2023-10-26 19:38:42 +08:00
morris
418494800c fix(i2c): read write FIFO memory by volatile 2023-10-26 14:40:07 +08:00
Konstantin Kondrashov
a304cc230e Merge branch 'feature/esp32h2_adds_adc_calib_efuses' into 'master' 
feat(efuse): Adds efuse ADC calibration data for ESP32H2

See merge request espressif/esp-idf!26305
 2023-10-25 15:58:24 +08:00
Cao Sen Miao
8d639492f2 feat(i2c_slave): Add new implementation and API for I2C slave 2023-10-24 18:44:49 +08:00
wuzhenghui
6a436286dc feat(esp_hw_support): add api to gpio driver to support output internal clock on GPIO 2023-10-20 14:35:26 +08:00
Mahavir Jain
2407813a67 Merge branch 'feature/update_esp32c6-h2_apm_api' into 'master' 
apm: updated APM HAL/LL APIs.

See merge request espressif/esp-idf!26368
 2023-10-18 12:26:38 +08:00
Sachin Billore
c106f5caf6 apm: updated APM HAL/LL APIs. 2023-10-17 18:20:36 +05:30
Armando
17063b51e0 feat(soc): added flash operation range macros in ext_mem_defs.h 2023-10-16 17:19:04 +08:00
Michael (XIAO Xufeng)
2308292ca3 Merge branch 'bugfix/revert_pvt' into 'master' 
Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2"

See merge request espressif/esp-idf!26425
 2023-10-16 12:53:07 +08:00
Song Ruo Jing
d73bf72885 Merge branch 'feature/gpio_dump_io_info' into 'master' 
feat(gpio): add a dump API to dump IO configurations

Closes IDFGH-10987

See merge request espressif/esp-idf!26158
 2023-10-13 22:35:59 +08:00
C.S.M
e19324b4fa Merge branch 'bugfix/h2_i2c1_no_signal' into 'master' 
fix(i2c): I2C port 1 doesn't work on esp32h2

See merge request espressif/esp-idf!26416
 2023-10-13 15:01:34 +08:00
Song Ruo Jing
321f628ff5 feat(gpio): add a dump API to dump IO configurations 
Closes https://github.com/espressif/esp-idf/issues/12176
 2023-10-12 17:34:20 +08:00
zlq
9c2d470465 feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64 
MHz
 2023-10-12 14:51:54 +08:00
Xiao Xufeng
28ba080c5e Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2" 
This reverts commit b221f87e00.
 2023-10-12 14:51:54 +08:00
Cao Sen Miao
d7e543583b fix(i2c): I2C port 1 doesn't work on esp32h2 2023-10-11 17:06:39 +08:00
morris
66497af276 feat(hal): enable hal host test 2023-10-11 11:23:24 +08:00
KonstantinKondrashov
071d1cf865 feat(efuse): Adds efuse ADC calibration data for ESP32H2 2023-10-04 16:00:01 +08:00
wuzhenghui
c8083b07bf feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe 2023-09-28 17:41:42 +00:00
Kevin (Lao Kaiyao)
4c6f4b39f1 Merge branch 'feature/support_i2s_on_p4' into 'master' 
feat(i2s): support i2s on esp32p4

Closes IDF-6508

See merge request espressif/esp-idf!24280
 2023-09-29 00:50:04 +08:00
laokaiyao
0b0f25c30d feat(i2s): supported getting the tx sync count and specify interrupt flags 2023-09-28 15:03:27 +08:00
laokaiyao
cf889f3c6d feat(i2s): support i2s on esp32p4 2023-09-28 15:03:27 +08:00
zlq
b221f87e00 feat(volt): chip auto adjust volt for esp32c6 & esp32h2 2023-09-28 05:55:42 +00:00
Kevin (Lao Kaiyao)
9a239b8367 Merge branch 'feature/support_analog_comparator_on_p4' into 'master' 
feat(ana_cmpr): supported analog comparator on esp32p4

Closes IDF-7479

See merge request espressif/esp-idf!24873
 2023-09-27 04:24:09 +08:00
Jiang Jiang Jian
17ae394fd1 Merge branch 'feature/update_esp32h2_sleep_logic' into 'master' 
feat(pm): remove SOC_PM_RETENTION_HAS_CLOCK_BUG for esp32h2

See merge request espressif/esp-idf!26081
 2023-09-26 16:11:25 +08:00
laokaiyao
ff7a11e539 feat(ana_cmpr): supported etm in analog comparator example 2023-09-25 19:57:34 +08:00
laokaiyao
a989ce4ab1 feat(ana_cmpr): supported analog comparator on esp32p4 2023-09-25 19:57:34 +08:00
Ivan Grokhotkov
2ac972e2c7
fix(soc): update SOC_IROM_MASK_HIGH for esp32, c6, h2 for consistency 2023-09-22 16:13:41 +02:00
cjin
40996f804a change: remove has clock bug macro for esp32h2 2023-09-21 11:31:53 +08:00
Planck (Lu Zeyu)
255d499884 fix(ll): fix cpp compile error 
Merges https://github.com/espressif/esp-idf/pull/12093

fix(ll): remove FLAG_ATTR macro

Such kind of operator overload will not work because C++ thinks such overload is ambiguous and it still prefer the built-in one which accepts and returns integer. Manually force type conversion seems to be unavoidable.
 2023-09-14 14:48:12 +08:00
Konstantin Kondrashov
054d4943c5 Merge branch 'feature/esp32p4_update_systimer' into 'master' 
feat(esp_timer): Support systimer for ESP32P4

Closes IDF-7486 and IDF-7487

See merge request espressif/esp-idf!25688
 2023-09-13 19:13:39 +08:00
Konstantin Kondrashov
cbdb799b6f feat(esp_timer): Support systimer for ESP32P4 2023-09-13 19:13:38 +08:00
Marius Vikhammer
573404b328 Merge branch 'bugfix/use_xtal_for_c3_wdt' into 'master' 
fix(wdt): changed ESP32-C3 WDT to use XTAL as clock

Closes IDF-6729

See merge request espressif/esp-idf!25867
 2023-09-13 10:44:38 +08:00
Marius Vikhammer
7a71454930 fix(wdt): changed WDT clock source to XTAL for C6/H2 
Previously it used PLL, but PLL could potentially be powered down by power-management
when CPU frequency changed.
 2023-09-12 09:41:24 +08:00
Marius Vikhammer
ca99f55316 fix(wdt): changed ESP32-C3 WDT to use XTAL as clock 
This clock is unchanged even when CPU/APB frequency changes (e.g. due to esp_pm),
which means timeout period is correct even after such a change.
 2023-09-08 15:12:21 +08:00