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change(hal): control PAU bus clock by hal layer

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This commit is contained in:
wuzhenghui 2024-03-20 20:36:45 +08:00
parent 38fe4e136a
commit 4a64d2fe2c
15 changed files with 53 additions and 43 deletions
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2
components/esp_hw_support/port/pau_regdma.c
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@ -31,7 +31,7 @@ pau_context_t * __attribute__((weak)) IRAM_ATTR PAU_instance(void)
if (pau_hal.dev == NULL) {
pau_hal.dev = &PAU;
periph_module_enable(PERIPH_REGDMA_MODULE);
pau_hal_enable_bus_clock(true);
#if SOC_PAU_IN_TOP_DOMAIN
pau_hal_lp_sys_initialize();
#endif

3
components/esp_system/port/soc/esp32c6/clk.c
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@ -35,6 +35,7 @@
#include "hal/mcpwm_ll.h"
#include "hal/parlio_ll.h"
#include "hal/gdma_ll.h"
#include "hal/pau_ll.h"
#include "hal/spi_ll.h"
#include "hal/clk_gate_ll.h"
#include "hal/lp_core_ll.h"
@ -255,11 +256,11 @@ __attribute__((weak)) void esp_perip_clk_init(void)
#endif
spi_ll_enable_bus_clock(SPI2_HOST, false);
temperature_sensor_ll_bus_clk_enable(false);
pau_ll_enable_bus_clock(false);
periph_ll_disable_clk_set_rst(PERIPH_UHCI0_MODULE);
periph_ll_disable_clk_set_rst(PERIPH_SARADC_MODULE);
periph_ll_disable_clk_set_rst(PERIPH_SDIO_SLAVE_MODULE);
periph_ll_disable_clk_set_rst(PERIPH_REGDMA_MODULE);
#if !CONFIG_ESP_SYSTEM_HW_PC_RECORD
/* Disable ASSIST Debug module clock if PC recoreding function is not used,
* if stack guard function needs it, it will be re-enabled at esp_hw_stack_guard_init */

3
components/esp_system/port/soc/esp32h2/clk.c
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@ -37,6 +37,7 @@
#include "hal/mcpwm_ll.h"
#include "hal/parlio_ll.h"
#include "hal/gdma_ll.h"
#include "hal/pau_ll.h"
#include "hal/spi_ll.h"
#include "hal/clk_gate_ll.h"
#include "hal/temperature_sensor_ll.h"
@ -247,10 +248,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
#endif
spi_ll_enable_bus_clock(SPI2_HOST, false);
temperature_sensor_ll_bus_clk_enable(false);
pau_ll_enable_bus_clock(false);
periph_ll_disable_clk_set_rst(PERIPH_UHCI0_MODULE);
periph_ll_disable_clk_set_rst(PERIPH_SARADC_MODULE);
periph_ll_disable_clk_set_rst(PERIPH_REGDMA_MODULE);
#if !CONFIG_ESP_SYSTEM_HW_PC_RECORD
/* Disable ASSIST Debug module clock if PC recoreding function is not used,
* if stack guard function needs it, it will be re-enabled at esp_hw_stack_guard_init */

10
components/hal/esp32c6/include/hal/clk_gate_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -78,8 +78,6 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
return PCR_TSENS_CLK_EN;
case PERIPH_SDIO_SLAVE_MODULE:
return PCR_SDIO_SLAVE_CLK_EN;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CLK_EN;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CLK_EN;
default:
@ -161,8 +159,6 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
return PCR_DS_RST_EN;
case PERIPH_SDIO_SLAVE_MODULE:
return PCR_SDIO_SLAVE_RST_EN;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_RST_EN;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_RST_EN;
default:
@ -229,8 +225,6 @@ static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
return PCR_TSENS_CLK_CONF_REG;
case PERIPH_SDIO_SLAVE_MODULE:
return PCR_SDIO_SLAVE_CONF_REG;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CONF_REG;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CONF_REG;
default:
@ -297,8 +291,6 @@ static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
return PCR_TSENS_CLK_CONF_REG;
case PERIPH_SDIO_SLAVE_MODULE:
return PCR_SDIO_SLAVE_CONF_REG;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CONF_REG;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CONF_REG;
default:

14
components/hal/esp32c6/include/hal/pau_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -13,6 +13,7 @@
#include "soc/soc.h"
#include "soc/pau_reg.h"
#include "soc/pau_struct.h"
#include "soc/pcr_struct.h"
#include "hal/pau_types.h"
#include "hal/assert.h"
@ -20,6 +21,17 @@
extern "C" {
#endif
static inline void pau_ll_enable_bus_clock(bool enable)
{
if (enable) {
PCR.regdma_conf.regdma_clk_en = 1;
PCR.regdma_conf.regdma_rst_en = 0;
} else {
PCR.regdma_conf.regdma_clk_en = 0;
PCR.regdma_conf.regdma_rst_en = 1;
}
}
static inline uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
{
return dev->regdma_conf.flow_err;

8
components/hal/esp32c61/include/hal/clk_gate_ll.h
View File

@ -54,8 +54,6 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
return PCR_ECC_CLK_EN;
case PERIPH_TEMPSENSOR_MODULE:
return PCR_TSENS_CLK_EN;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CLK_EN;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CLK_EN;
default:
@ -103,8 +101,6 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
CLEAR_PERI_REG_MASK(PCR_HMAC_CONF_REG, PCR_HMAC_RST_EN);
}
return PCR_SHA_RST_EN;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_RST_EN;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_RST_EN;
default:
@ -145,8 +141,6 @@ static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
return PCR_ECC_CONF_REG;
case PERIPH_TEMPSENSOR_MODULE:
return PCR_TSENS_CLK_CONF_REG;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CONF_REG;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CONF_REG;
default:
@ -187,8 +181,6 @@ static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
return PCR_ECC_CONF_REG;
case PERIPH_TEMPSENSOR_MODULE:
return PCR_TSENS_CLK_CONF_REG;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CONF_REG;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CONF_REG;
default:

10
components/hal/esp32h2/include/hal/clk_gate_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -78,8 +78,6 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
return PCR_ECDSA_CLK_EN;
case PERIPH_TEMPSENSOR_MODULE:
return PCR_TSENS_CLK_EN;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CLK_EN;
// case PERIPH_RNG_MODULE:
// return PCR_WIFI_CLK_RNG_EN;
// case PERIPH_WIFI_MODULE:
@ -153,8 +151,6 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
CLEAR_PERI_REG_MASK(PCR_ECDSA_CONF_REG, PCR_ECDSA_RST_EN);
}
return PCR_ECC_RST_EN;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_RST_EN;
case PERIPH_AES_MODULE:
if (enable == true) {
// Clear reset on digital signature, otherwise AES unit is held in reset
@ -268,8 +264,6 @@ static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
return PCR_ECDSA_CONF_REG;
case PERIPH_TEMPSENSOR_MODULE:
return PCR_TSENS_CLK_CONF_REG;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CONF_REG;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CONF_REG;
default:
@ -337,8 +331,6 @@ static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
return PCR_ECDSA_CONF_REG;
case PERIPH_TEMPSENSOR_MODULE:
return PCR_TSENS_CLK_CONF_REG;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CONF_REG;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CONF_REG;
default:

14
components/hal/esp32h2/include/hal/pau_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -13,6 +13,7 @@
#include "soc/soc.h"
#include "soc/pau_reg.h"
#include "soc/pau_struct.h"
#include "soc/pcr_struct.h"
#include "hal/pau_types.h"
#include "hal/assert.h"
@ -20,6 +21,17 @@
extern "C" {
#endif
static inline void pau_ll_enable_bus_clock(bool enable)
{
if (enable) {
PCR.regdma_conf.regdma_clk_en = 1;
PCR.regdma_conf.regdma_rst_en = 0;
} else {
PCR.regdma_conf.regdma_clk_en = 0;
PCR.regdma_conf.regdma_rst_en = 1;
}
}
static inline __attribute__((always_inline)) uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
{
return dev->regdma_conf.flow_err;

8
components/hal/esp32p4/include/hal/clk_gate_ll.h
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@ -47,8 +47,6 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
return HP_SYS_CLKRST_REG_CRYPTO_ECDSA_CLK_EN;
case PERIPH_ISP_MODULE:
return HP_SYS_CLKRST_REG_ISP_CLK_EN;
case PERIPH_REGDMA_MODULE:
return HP_SYS_CLKRST_REG_REGDMA_SYS_CLK_EN;
default:
return 0;
}
@ -105,8 +103,6 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
return HP_SYS_CLKRST_REG_RST_EN_ECDSA;
case PERIPH_EMAC_MODULE:
return LP_CLKRST_RST_EN_EMAC;
case PERIPH_REGDMA_MODULE:
return HP_SYS_CLKRST_REG_RST_EN_REGDMA;
default:
return 0;
}
@ -132,8 +128,6 @@ static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
return HP_SYS_CLKRST_PERI_CLK_CTRL25_REG;
case PERIPH_EMAC_MODULE:
return LP_CLKRST_HP_CLK_CTRL_REG;
case PERIPH_REGDMA_MODULE:
return HP_SYS_CLKRST_SOC_CLK_CTRL0_REG;
default:
abort();
return 0;
@ -160,8 +154,6 @@ static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
return HP_SYS_CLKRST_HP_RST_EN2_REG;
case PERIPH_EMAC_MODULE:
return LP_CLKRST_HP_SDMMC_EMAC_RST_CTRL_REG;
case PERIPH_REGDMA_MODULE:
return HP_SYS_CLKRST_HP_RST_EN0_REG;
default:
abort();
return 0;

13
components/hal/esp32p4/include/hal/pau_ll.h
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@ -11,15 +11,28 @@
#include <stdlib.h>
#include <stdbool.h>
#include "soc/soc.h"
#include "soc/hp_sys_clkrst_struct.h"
#include "soc/pau_reg.h"
#include "soc/pau_struct.h"
#include "hal/pau_types.h"
#include "hal/pau_hal.h"
#include "hal/assert.h"
#ifdef __cplusplus
extern "C" {
#endif
static inline void pau_ll_enable_bus_clock(bool enable)
{
if (enable) {
HP_SYS_CLKRST.soc_clk_ctrl1.reg_regdma_sys_clk_en = 1;
HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_regdma = 0;
} else {
HP_SYS_CLKRST.soc_clk_ctrl1.reg_regdma_sys_clk_en = 0;
HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_regdma = 1;
}
}
static inline uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
{
return dev->regdma_conf.flow_err;

7
components/hal/include/hal/pau_hal.h
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@ -22,6 +22,13 @@ typedef struct {
pau_dev_t *dev;
} pau_hal_context_t;
/**
* @brief Enable the bus clock of REGDMA module
* @param hal regdma hal context
* @param enable enable or disable the module clock
*/
#define pau_hal_enable_bus_clock(enable) pau_ll_enable_bus_clock(enable)
/**
* @brief Set regdma entry link address
*

1
components/soc/esp32c6/include/soc/periph_defs.h
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@ -44,7 +44,6 @@ typedef enum {
PERIPH_SYSTIMER_MODULE,
PERIPH_SARADC_MODULE,
PERIPH_TEMPSENSOR_MODULE,
PERIPH_REGDMA_MODULE,
PERIPH_ASSIST_DEBUG_MODULE,
/* LP peripherals */
PERIPH_LP_I2C0_MODULE,

1
components/soc/esp32c61/include/soc/periph_defs.h
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@ -32,7 +32,6 @@ typedef enum {
PERIPH_SYSTIMER_MODULE,
PERIPH_SARADC_MODULE,
PERIPH_TEMPSENSOR_MODULE,
PERIPH_REGDMA_MODULE,
PERIPH_ASSIST_DEBUG_MODULE,
/* Peripherals clock managed by the modem_clock driver must be listed last in the enumeration */
PERIPH_WIFI_MODULE,

1
components/soc/esp32h2/include/soc/periph_defs.h
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@ -43,7 +43,6 @@ typedef enum {
PERIPH_SYSTIMER_MODULE,
PERIPH_SARADC_MODULE,
PERIPH_TEMPSENSOR_MODULE,
PERIPH_REGDMA_MODULE,
PERIPH_ASSIST_DEBUG_MODULE,
/* Peripherals clock managed by the modem_clock driver must be listed last in the enumeration */
PERIPH_BT_MODULE,

1
components/soc/esp32p4/include/soc/periph_defs.h
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@ -69,7 +69,6 @@ typedef enum {
PERIPH_UHCI_MODULE,
PERIPH_PCNT_MODULE,
PERIPH_ASSIST_DEBUG_MODULE,
PERIPH_REGDMA_MODULE,
/* LP peripherals */
PERIPH_LP_I2C0_MODULE,
PERIPH_LP_UART0_MODULE,