Cao Sen Miao
86aa4df5b5
ESP32-H2: Introduce new target for ESP32H2
2022-11-23 14:38:05 +08:00
laokaiyao
8677216576
esp32h2: renaming esp32h2 to esp32h4
2022-11-08 17:05:33 +08:00
C.S.M
86aa012c26
Merge branch 'feature/bringup_i2c_esp32c6' into 'master'
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I2C: Add i2c support for ESP32C6
Closes IDF-5326 and IDF-5327
See merge request espressif/esp-idf!20905
2022-11-08 11:56:15 +08:00
Cao Sen Miao
803fc3fbe0
I2C: Add i2c support for ESP32C6
2022-11-07 14:12:53 +08:00
morris
a25123f703
twai: bringup on esp32c6
2022-11-04 17:40:29 +08:00
KonstantinKondrashov
1f9260d790
all: Apply new version logic (major * 100 + minor)
2022-11-03 08:36:23 +00:00
Armando
260ee86c37
rtc: united sar peripheral control
2022-10-27 16:51:25 +08:00
Song Ruo Jing
6d24e8bcf4
gpio: Add support for esp32c6
2022-10-18 12:38:36 +08:00
morris
b562754a2f
rmt: support esp32c6
2022-09-17 04:56:49 +00:00
laokaiyao
bae4944b90
i2s: bringup i2s on esp32c6
2022-09-15 20:03:39 +08:00
laokaiyao
7197e987cb
i2s: add XTAL clock source
2022-09-15 19:32:06 +08:00
morris
5f550b2a13
rmt,gptimer: don't support rc_fast clock source for c6 and h2
...
The RC_FAST clock source on ESP32C6 and ESP32H2 can't be calibrated.
Which makes it impossible to work stable for peripherals like timer, RMT
2022-09-14 14:40:28 +00:00
morris
a1030307f1
gptimer: bringup driver on esp32c6
2022-09-13 10:50:58 +08:00
gaoxu
5934ba731e
SPI: Fix SPI wrong dummy bits on ESP32H2
2022-09-09 01:54:53 +00:00
Simon
e923c15859
Merge branch 'refactor/i2c_hal' into 'master'
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I2C: Refactor i2c hal and ll(pre-MR of I2C driver-NG)
See merge request espressif/esp-idf!19750
2022-09-02 10:47:35 +08:00
Cao Sen Miao
31b88a4c88
I2C: Refactor i2c hal and ll
2022-09-01 15:53:59 +08:00
wuzhenghui
1d299a8976
esp32c6: add hal support
2022-09-01 12:37:51 +08:00
wuzhenghui
c31aaeda2a
ll: add reset interface to rtc_cntl_ll
2022-08-31 01:59:36 +00:00
Gao Xu
0da21aca0d
Merge branch 'bugfix/fix_spi_hd_quad_issue_esp32c3' into 'master'
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essl_spi: fix wrong dummy cycle under quad spi mode ant add a test to verify spi quad mod
Closes IDF-5182 and IDF-5181
See merge request espressif/esp-idf!18680
2022-08-30 10:53:11 +08:00
morris
995b89fbb6
gptimer: add API to get captured count value
2022-08-25 17:55:19 +08:00
gaoxu
3610b14aef
SPI : fix wrong dummy cycle on quad mode and put get-command function in spi_ll.h
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1.The dummy_bits is set to 4 in ESP32C3/C2, therefore, the data transmission started too early.This commit fix this issue by changing dummy_bits to 8.
2.Put the spi command the spi defintion in spi_types.h
3.Put the function which get spi command or dummy bits in spi_ll.h
2022-08-23 10:46:56 +08:00
Song Ruo Jing
72a15e3c7a
Merge branch 'bugfix/gpio_usb_pin_pupd' into 'master'
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gpio: fix USB D+ pin cannot disable pullup
Closes IDFGH-7984
See merge request espressif/esp-idf!19191
2022-08-22 17:18:05 +08:00
songruojing
01143bd732
gpio: fix USB D+ pin cannot disable pullup
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Internally, disable usb serial jtag DP pin's pullup when calling gpio_ll_pullup_dis and rtcio_ll_pullup_disable
At usb serial jtag setup/install, re-enable DP pin's pullup
Closes https://github.com/espressif/esp-idf/issues/9495
2022-08-19 15:05:28 +08:00
Michael (XIAO Xufeng)
746f4b814c
uart: move frequency of clock sources out of HAL
2022-08-15 18:55:43 +00:00
morris
6f2ac1ce2a
rmt: add iram safe test
...
Closes https://github.com/espressif/esp-idf/issues/9487
2022-08-12 11:30:14 +08:00
morris
cf4cfc69ed
esp_adc: add test with -O0
2022-08-02 23:07:06 +08:00
morris
a5a171926b
rmt: add test with -O0
2022-08-02 23:07:06 +08:00
morris
031adc01c4
gpio: add test with -O0
2022-08-02 23:07:06 +08:00
morris
7faf1bee73
gptimer: add test with -O0
2022-08-02 22:53:36 +08:00
Armando
f325ad2211
mmu: fix wrong mmu end check
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In mmu code, we follow the rule that the `end` address shouldn't be
touched. This commit fix wrong end address check in mmu_ll.h
2022-07-27 10:22:09 +00:00
morris
d94432fea8
systimer: refactor hal to accomodate more xtal choices
2022-07-25 16:08:52 +08:00
laokaiyao
edee3ee3cd
i2s: add slot sequence table
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Closes: https://github.com/espressif/esp-idf/issues/9208
When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
2022-07-21 15:52:39 +08:00
laokaiyao
90866e99fb
i2s: add basic examples for STD/TDM/PDM mode
2022-07-21 15:52:39 +08:00
morris
4154eaec93
sdm: clean up soc/hal/ll code
2022-07-20 14:59:50 +08:00
Song Ruo Jing
4734b1433b
Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master'
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gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report
Closes IDF-4901
See merge request espressif/esp-idf!18805
2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen)
9f6f61345b
Merge branch 'feature/adc_driver_ng' into 'master'
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ADC Driver NG
Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979
See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5
I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2
2022-07-19 11:41:42 +08:00
Armando
5b523a3313
esp_adc: new esp_adc component and adc drivers
2022-07-15 18:31:00 +08:00
songruojing
0c4b9a0101
gpio: Fix HAL bad bit shift operation on gpio_num_t reported from coverity
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All gpio hal and ll functions input arguments gpio_num_t are changed to uint32_t type.
Validation of gpio num should be guaranteed from the driver layer.
2022-07-15 16:51:25 +08:00
Ivan Grokhotkov
5b54ae76d4
esp_timer, hal: add support for non-integer systimer frequency
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When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:
1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.
For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.
This introduced two possible issues:
1. Overflow when multiplying systimer counter by 5
- Should not be an issue, since systimer counter is 52-bit, so
counter * 5 is no more than 55-bit.
2. The code needs to perform:
- divide by 5: when converting from microseconds to ticks
- divide by 52: when converting from ticks to microseconds
The latter potentially introduces a performance issue for the
esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Michael (XIAO Xufeng)
a58362a429
Merge branch 'feature/efuse_rev_major_minor' into 'master'
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efuse: Adds major and minor versions
See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
morris
a92cce9861
Merge branch 'bugfix/calib_i2c_clk' into 'master'
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I2C: Make I2C clock frequency accurate
Closes IDF-5363
See merge request espressif/esp-idf!18686
2022-07-06 20:52:31 +08:00
Cao Sen Miao
e218723e0e
I2C: Make I2C clock frequency accurate
2022-07-06 11:58:08 +08:00
GengYuchao
d145c337e0
Enable rpa_moudle reset function
2022-07-05 20:50:31 +08:00
KonstantinKondrashov
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
morris
7863c1bc45
Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
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Bugfix/fix rtc freq err for h2 beta1
See merge request espressif/esp-idf!18682
2022-07-04 16:46:17 +08:00
Omar Chebib
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
GengYuchao
10fd1daa10
Add ETM clk gate defines for h2
2022-06-30 17:02:00 +08:00
Armando
31b3f31ef4
ext_mem: make memory region check strict
2022-06-28 14:17:44 +08:00
Mahavir Jain
dd24639215
Merge branch 'esp32h2/enable_ecc_accelerator' into 'master'
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esp32h2: Enable ECC accelerator
Closes IDF-3397
See merge request espressif/esp-idf!18647
2022-06-23 20:06:26 +08:00
Cao Sen Miao
2c0651a671
Add regi2c enable/disable reference count
2022-06-23 15:36:44 +08:00
Cao Sen Miao
3a820462ac
temperature_sensor: Add temperature sensor support for ESP32-C2
2022-06-23 15:36:43 +08:00
Sachin Parekh
6cfc9c365f
esp32h2: Enable ECC accelerator
2022-06-23 12:59:13 +05:30
Omar Chebib
8fae0f0753
G0: Support Xtensa targets for G0-only compilation
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G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Omar Chebib
752026a174
Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
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G0: RISC-V targets have now an independent G0 layer
See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
laokaiyao
28b8fc6a7e
i2s: update documents for driver-NG
2022-06-15 10:30:04 +08:00
laokaiyao
0fe3bb8ab7
i2s: update examples and unit-tests
2022-06-15 10:29:06 +08:00
laokaiyao
621d0aa942
i2s: Introduced a brand new driver
2022-06-15 10:29:06 +08:00
Darian
e213e66ba3
Merge branch 'refactor/esp_hw_support_cpu' into 'master'
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esp_hw_support: Add new esp_cpu.h abstraction
Closes IDF-4769
See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
2fd784c97a
G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h"
2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
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G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
a8a3756b38
hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
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This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:
- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead
Also updated soc_hal.h as follows:
- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.
This commit also updates the XCHAL_ERRATUM_572 workaround by
- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
2022-06-14 14:40:03 +08:00
Darian Leung
149872131a
hal: Move dedicated GPIO LL and HAL
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This commit moves the dedicated GPIO LL and HAL functions from
cpu_ll.h to dedic_gpio_cpu_ll.h.
- cpu_ll_enable_cycle_count() has also been removed due to lack of feasible usage scenarios
2022-06-14 14:38:29 +08:00
songruojing
c8752cee6a
clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem
2022-06-13 17:47:50 +08:00
Cao Sen Miao
6589daabb9
MMU: Add configurable mmu page size support on ESP32C2
2022-06-08 19:34:31 +08:00
Cao Sen Miao
6a2d3509dc
spi_flash: Making XMC flash works more stable when brownout detected
2022-06-02 10:38:55 +08:00
KonstantinKondrashov
ac4c7d99fe
dport: Move DPORT workaround to G0
2022-05-31 13:44:18 +08:00
morris
4352c39e3e
Merge branch 'feature/cache_c2_support' into 'master'
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cache: access error & illegal error ll functions
Closes IDF-3820
See merge request espressif/esp-idf!18203
2022-05-30 11:40:11 +08:00
Armando
8532d09259
cache: access error & illegal error ll functions
2022-05-23 15:00:47 +08:00
jiangguangming
9c6afee12f
flash mmap: abstract R/W MMU table instead of reg access
2022-05-20 16:46:27 +08:00
Omar Chebib
477bc9e64c
I2C: Fix SCL period timings on ESP targets
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The output frequency is now more accurate as the SCL period timings have been fixed.
This fix applies for ESP32, ESP32S3, ESP32C3, ESP32C2 and ESP32H2
2022-05-18 05:36:08 +00:00
morris
722fde218d
uart: add default source clock for all targets
2022-05-09 11:26:30 +08:00
Armando
49747bb486
adc: create common adc hal layer
2022-05-07 19:20:44 +08:00
Armando (Dou Yiwen)
76be0c2624
Merge branch 'bugfix/fix_esp32_mmu_init_issue' into 'master'
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mmu: add ll functions for mmu unmap
Closes OCD-526 and IDF-4962
See merge request espressif/esp-idf!17868
2022-05-05 22:21:18 +08:00
Armando
e09787d851
mmu: fix macro MMU_ENTRY_NUM and add new macro MMU_MAX_PADDR_PAGE_NUM
2022-04-27 11:35:07 +08:00
Armando
2764cd5682
mmu: simplify mmu_hal_init
2022-04-27 11:35:07 +08:00
jiangguangming
63ac5e4a99
mmu: add ll func used to invalidate the mmu entry
2022-04-27 11:35:07 +08:00
Simon
e4d85807ea
Merge branch 'feature/spi_flash_esp8684_support' into 'master'
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spi_flash: refactor spi_flash clock configuration logic and support esp32c2
Closes IDF-4474, IDF-4025, and IDF-4066
See merge request espressif/esp-idf!16602
2022-04-27 11:05:45 +08:00
Konstantin Kondrashov
df30b362a8
efuse: Validates data after burning and re-burnes it if necessary
2022-04-27 01:10:41 +08:00
Cao Sen Miao
4418a855ba
spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2
2022-04-26 15:22:37 +08:00
laokaiyao
b99ced08a2
i2s: fix only right case
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Closes: https://github.com/espressif/esp-idf/issues/8538
2022-04-23 07:38:45 +00:00
Darian
7c5cf3988f
Merge branch 'bugfix/twai_ll_parse_frame_buffer_typo' into 'master'
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TWAI: Fix twai_ll_parse_frame_buffer() typo
Closes IDFGH-7140
See merge request espressif/esp-idf!17875
2022-04-22 21:29:59 +08:00
Darian Leung
09dc46552b
twai: Fix twai_ll_parse_frame_buffer() typo
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Closes https://github.com/espressif/esp-idf/issues/8743
2022-04-22 15:25:39 +08:00
Anton Maklakov
f4c190cadd
Merge branch 'bugfix/abs_arguments' into 'master'
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fix warnings: abs() use again
Closes GCC-240
See merge request espressif/esp-idf!17846
2022-04-22 09:30:23 +08:00
morris
4280164be4
rmt: add more clock source caps
2022-04-21 13:59:47 +00:00
Anton Maklakov
7a066b7b56
components: correct abs() use for unsigned argument
2022-04-21 12:22:01 +07:00
morris
373d9b3dbc
Merge branch 'feature/default_clk_for_gptimer' into 'master'
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clk_tree: added default clock source for peripherals (GPTimer, RMT, LCD, TempSensor)
Closes IDF-4894
See merge request espressif/esp-idf!17759
2022-04-19 18:02:40 +08:00
songruojing
534346f4bb
ledc: Provide support for esp32c2 and esp32h2
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LEDC examples, unit test, and programming guide are all updated.
2022-04-14 08:15:14 +00:00
morris
f32a89826c
clk_tree: added default clock source for peripheral
2022-04-14 15:44:56 +08:00
songruo
60bb5c913d
clk_tree: prework of introducing clk subsystem control
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1. Clean up clk usage in IDF, replace rtc_clk_xtal/apb_freq_get with
upper level API esp_clk_xtal/apb_freq
2. Fix small errors and wrong comments related to clock
3. Add clk_tree_defs.h to provide an unified clock id for each chip
Modify the NGed drivers to adopt new clock ids
2022-04-11 12:09:06 +08:00
Wu Zheng Hui
506768c9fa
Merge branch 'feature/esp32h2beta2_chip_env' into 'master'
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Support esp32h2beta2 chip
See merge request espressif/esp-idf!17503
2022-03-31 09:51:12 +08:00
laokaiyao
f29d329e55
esp32h2beta2: fixed reg base name
2022-03-29 15:17:23 +08:00
Armando
fe9c6cde4f
spi: support spi on h2
2022-03-29 11:54:08 +08:00
laokaiyao
f17edba20b
i2s: extract std/pdm/tdm modes
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Type structures of these modes are defined. Driver and HAL layer are modified to fit these concepts.
2022-03-22 10:14:45 +08:00
Armando (Dou Yiwen)
36457b1346
Merge branch 'refactor/adc_unify_adc_unit' into 'master'
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adc: adc single driver NG pre-step - unify adc_ll_num_t and adc_unit_t
See merge request espressif/esp-idf!17408
2022-03-18 20:29:36 +08:00
Armando
386363cafd
adc: unify adc_ll_num_t and adc_unit_t
2022-03-18 11:36:50 +08:00
Jiang Jiang Jian
10f3aba770
Merge branch 'feature/final_h2' into 'master'
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Add support in Nimble for ESP32H2
See merge request espressif/esp-idf!16329
2022-03-15 16:03:24 +08:00
morris
98e19b3355
Merge branch 'contrib/github_pr_8496' into 'master'
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SPI LCD support large color transfers (GitHub PR)
Closes IDFGH-6874
See merge request espressif/esp-idf!17391
2022-03-14 22:22:00 +08:00
Rahul Tank
f376bb5d05
Add support in Nimble for ESP32H2
2022-03-14 11:57:53 +05:30
Michael (XIAO Xufeng)
aab535fe4a
Merge branch 'bugfix/regi2c_ctrl_spinlock_s2' into 'master'
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hw_support: fixed regi2c not protected by lock on ESP32S2
See merge request espressif/esp-idf!16653
2022-03-13 02:47:53 +08:00
Michael (XIAO Xufeng)
d5bdf95580
hw_support: fixed regi2c not protected by lock on ESP32S2
2022-03-13 00:24:08 +08:00
Armando (Dou Yiwen)
6ed3ffbbf1
Merge branch 'refactor/remove_redundant_rom_cache_dependency' into 'master'
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cache: remove redundant rom cache dependency in bootloader
Closes IDF-4523
See merge request espressif/esp-idf!17077
2022-03-12 10:11:39 +08:00
Armando
c1cbd7bbf6
cache/mmu: implememnt cache and mmu hal APIs in bootloader
2022-03-11 22:43:11 +08:00
morris
2c7cfdd784
spi: define tranfer max bit length in LL
2022-03-10 13:40:43 +08:00
morris
9f55712c03
rmt: document and improve LL driver
2022-03-09 10:58:12 +08:00
Zim Kalinowski
0440aca4e3
Merge branch 'feature/reevaluate_headers_include_dirs' into 'master'
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esp_hw_support/esp_system: Re-evaluate header inclusions and include directories
See merge request espressif/esp-idf!16763
2022-03-08 01:32:24 +08:00
Simon
4bf4a020a6
Merge branch 'refactor/abstract_temperature_sensor' into 'master'
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temperature_sensor: Refactor temperature sensor to new APIs (follow rule of driverNG) and support esp32s3
Closes IDF-3665, IDF-3367, and IDF-1793
See merge request espressif/esp-idf!16787
2022-03-07 20:17:39 +08:00
Sudeep Mohanty
a9fda54d39
esp_hw_support/esp_system: Re-evaluate header inclusions and include directories
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This commit updates the visibility of various header files and cleans up
some unnecessary inclusions. Also, this commit removes certain header
include paths which were maintained for backward compatibility.
2022-03-07 11:18:08 +05:30
Cao Sen Miao
b248046bcb
Temperature_sensor: Create new temperature sensor API
2022-03-04 18:13:35 +08:00
songruojing
c8c137f2b7
esp32h2: support GPIO peripheral, IO_MUX, GPIO matrix.
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Generic GPIO example is supported as well.
2022-03-04 11:25:05 +08:00
songruojing
24a60c12c6
uart: Provide support for esp32c2 and esp32h2
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UART examples, unit test, and programming guide are all updated.
2022-03-02 11:29:13 +08:00
wuzhenghui
1a4d4b9cd6
remove esp32h2 rev1/2 unsupported efuse field
2022-02-28 19:37:43 +08:00
Kevin (Lao Kaiyao)
cc1d89ebba
Merge branch 'feature/i2c_support_on_esp8684_esp32h2' into 'master'
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i2c: support i2c on esp32c2 and esp32h2
Closes IDF-3918
See merge request espressif/esp-idf!16444
2022-02-28 13:59:02 +08:00
Konstantin Kondrashov
44e5ac2c59
Merge branch 'feature/efuse_hal' into 'master'
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hal: Adds efuse hal layer
See merge request espressif/esp-idf!16354
2022-02-28 13:38:43 +08:00
KonstantinKondrashov
9605f3eb1a
soc: Adds efuse hal
...
Replaced eFuse ROM funcs with hal layer
2022-02-24 22:20:09 +08:00
Alexey Gerenkov
dea45a9d72
riscv: Use semihosting to set breakpoint and watchpoint when running under debugger
2022-02-24 08:55:40 +00:00
laokaiyao
cf353c505a
i2c: support esp32h2
2022-02-23 15:19:37 +08:00
Marius Vikhammer
06d8a5bf33
Merge branch 'bugfix/inline_intrmask_from_isr' into 'master'
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freertos: always inline xPortSetInterruptMaskFromISR and vPortClearInterruptMaskFromISR
Closes IDFGH-6669
See merge request espressif/esp-idf!16970
2022-02-23 01:05:40 +00:00
Marius Vikhammer
ca6f76d831
spi flash: fix cache accessed while disabled issues at -O0
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mask_get_id and gpio_hal_iomux_func_sel were called while cache
is disabled, but were not inlined as expected at -0O.
Force these functions to always be inlined.
2022-02-07 11:33:33 +08:00
laokaiyao
c4cfb654d2
uart: support light sleep on esp32s3
2022-01-25 17:43:02 +08:00
Ivan Grokhotkov
876f4d6a1c
vfs: add support for semihosting on ESP32-C3
2022-01-14 17:29:03 +01:00
morris
8cdcb4e291
rmt: move RMT item definition from soc to driver
2022-01-06 21:43:12 +08:00
Harshit Malpani
2c84db95d2
freertos: fix build warnings with -Wsign-conversion CFLAG
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Closes https://github.com/espressif/esp-idf/issues/4946
2021-12-27 13:31:34 +05:30
morris
2c810f8451
timer: save alarm value in driver layer
2021-12-23 11:39:32 +08:00
Armando
4dc0d6b2fe
adc: support adc dma driver on all chips
2021-12-16 00:19:15 +00:00
laokaiyao
f21020ce04
esp32h2: update reg and struct for beta2
2021-11-24 12:34:17 +08:00
Omar Chebib
1e8a0909f6
LEDC: divisor calculation will now be rounded up when necessary
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Closes https://github.com/espressif/esp-idf/issues/7722
2021-11-11 12:21:22 +08:00
Omar Chebib
aa2ca7dd94
LEDC: improved support for ESP32-C3 and refactored divisor calculation
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As ESP32C3 does not have support for REF_TICK source clock, it is now not
possible to select it anymore.
Auto cfg clock has been improved for all boards.
2021-11-11 12:21:15 +08:00
morris
83d16aa00c
gdma: support IRAM interrupt
2021-11-08 16:14:51 +08:00
Cao Sen Miao
09487761cf
ESP8684: add freertos, hal, esp_system support
2021-11-06 17:33:44 +08:00
Alexey Gerenkov
bb9cd84cdc
debug_stubs: Refactor and add support for RISCV
2021-11-04 01:33:24 +03:00
laokaiyao
f37595dee9
i2s: fix ws signal polarity in tdm mode
2021-10-26 11:12:30 +08:00
morris
e2275b1f63
gptimer: clean up hal and ll for driver-ng
2021-10-20 18:40:08 +08:00
Zim Kalinowski
a7c9949dd9
Fixed build problem when icluding gpio_ll.h from cpp file
2021-10-17 14:29:31 +08:00
laokaiyao
7264c0e59a
i2s_rec_example: add support for esp32s3
2021-10-01 16:05:04 +01:00
SalimTerryLi
bd89dcc683
RMT: add loop_autostop driver support for esp32s3
2021-09-24 15:24:45 +08:00
morris
20ef511d0a
Merge branch 'bugfix/fix_reg_name_charactor_err' into 'master'
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bugfix: fix reg name character error
See merge request espressif/esp-idf!14169
2021-09-18 07:10:57 +00:00
Wu Zheng Hui
1080e4f6a2
rename APB_CTRL ro SYS_CON
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save
2021-09-16 20:57:57 +08:00
wuzhenghui
b2c028085a
fix reg name character error
2021-09-15 21:51:20 +08:00
morris
502e132e5d
Merge branch 'feature/fast_gpio_c3' into 'master'
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fast gpio support on esp32-c3
Closes IDF-3783
See merge request espressif/esp-idf!14986
2021-09-14 06:09:34 +00:00
Wang Meng Yang
a885c42cda
Merge branch 'example/controller_hci_uart_for_esp32s3' into 'master'
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examples: added support of ESP32-S3 chip in controller_hci_uart example
Closes BT-1906
See merge request espressif/esp-idf!14935
2021-09-08 06:02:18 +00:00
morris
6cec256a34
fast_gpio: driver support on esp32c3
2021-09-06 19:39:09 +08:00
laokaiyao
c5afd7ce34
i2s: fix write failure on ESP32 in 32bit slave mode
2021-09-03 17:36:44 +08:00
laokaiyao
0ff3dd9778
i2s: fix mono support issue
2021-09-02 14:33:36 +08:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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update all struct headers to be more "standardized":
- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199
added helper macros to force peripheral registers being accessed in 32 bitwidth
added a check script into ci
2021-08-30 13:50:58 +08:00
Marius Vikhammer
2206c5315e
Merge branch 'bugfix/aes_unaligned_access' into 'master'
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aes: fix unaligned access
Closes IDFGH-5506
See merge request espressif/esp-idf!14659
2021-08-27 01:33:44 +00:00
wangmengyang
c053ef0541
examples: added support of ESP32-S3 chip in controller_hci_uart example
2021-08-26 14:24:32 +08:00
sly
11dfd802e0
esp32h2: add rtc clock support
2021-08-26 11:25:39 +08:00
Marius Vikhammer
3907634d20
aes: fix potential unaligned access of buffers
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https://github.com/espressif/esp-idf/issues/7236
2021-08-25 10:48:26 +08:00
morris
0c41837b06
Merge branch 'refactor/timer_group-reg_file-update' into 'master'
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refactor/timer_group update reg headers for c3 and s2
Closes IDF-3690
See merge request espressif/esp-idf!14761
2021-08-23 04:30:59 +00:00