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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Add regi2c enable/disable reference count
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3a820462ac
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2c0651a671
@ -18,7 +18,6 @@
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#include "esp_log.h"
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#include "esp_efuse_rtc_calib.h"
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#include "hal/temperature_sensor_ll.h"
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#include "hal/regi2c_ctrl_ll.h"
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#include "driver/temp_sensor_types_legacy.h"
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#include "esp_private/periph_ctrl.h"
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@ -28,10 +27,6 @@ static const char *TAG = "tsens";
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#define TSENS_DAC_FACTOR (27.88)
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#define TSENS_SYS_OFFSET (20.52)
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extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
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#define RTC_TEMP_SENSOR_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
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#define RTC_TEMP_SENSOR_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
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typedef struct {
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int index;
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int offset;
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@ -68,11 +63,8 @@ esp_err_t temp_sensor_set_config(temp_sensor_config_t tsens)
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err = ESP_ERR_INVALID_STATE;
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}
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temperature_sensor_ll_set_clk_div(tsens.clk_div);
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RTC_TEMP_SENSOR_ENTER_CRITICAL();
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regi2c_ctrl_ll_i2c_saradc_enable();
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temperature_sensor_ll_set_range(dac_offset[tsens.dac_offset].reg_val);
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temperature_sensor_ll_enable(true);
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RTC_TEMP_SENSOR_EXIT_CRITICAL();
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ESP_LOGI(TAG, "Config range [%d°C ~ %d°C], error < %d°C",
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dac_offset[tsens.dac_offset].range_min,
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dac_offset[tsens.dac_offset].range_max,
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@ -102,6 +94,7 @@ esp_err_t temp_sensor_start(void)
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ESP_LOGE(TAG, "Is already running or not be configured");
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err = ESP_ERR_INVALID_STATE;
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}
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regi2c_saradc_enable();
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periph_module_enable(PERIPH_TEMPSENSOR_MODULE);
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temperature_sensor_ll_enable(true);
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temperature_sensor_ll_clk_enable(true);
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@ -112,6 +105,7 @@ esp_err_t temp_sensor_start(void)
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esp_err_t temp_sensor_stop(void)
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{
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regi2c_saradc_disable();
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temperature_sensor_ll_enable(false);
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tsens_hw_state = TSENS_HW_STATE_CONFIGURED;
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return ESP_OK;
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@ -25,15 +25,10 @@
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#include "esp_efuse_rtc_calib.h"
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#include "esp_private/periph_ctrl.h"
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#include "hal/temperature_sensor_ll.h"
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#include "hal/regi2c_ctrl_ll.h"
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#include "soc/temperature_sensor_periph.h"
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static const char *TAG = "temperature_sensor";
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extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
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#define TEMPERATURE_SENSOR_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
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#define TEMPERATURE_SENSOR_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
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typedef enum {
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TEMP_SENSOR_FSM_INIT,
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TEMP_SENSOR_FSM_ENABLE,
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@ -103,11 +98,9 @@ esp_err_t temperature_sensor_install(const temperature_sensor_config_t *tsens_co
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tsens->tsens_attribute->range_max,
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tsens->tsens_attribute->error_max);
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TEMPERATURE_SENSOR_ENTER_CRITICAL();
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regi2c_ctrl_ll_i2c_saradc_enable();
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regi2c_saradc_enable();
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temperature_sensor_ll_set_range(tsens->tsens_attribute->reg_val);
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temperature_sensor_ll_enable(false); // disable the sensor by default
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TEMPERATURE_SENSOR_EXIT_CRITICAL();
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tsens->fsm = TEMP_SENSOR_FSM_INIT;
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*ret_tsens = tsens;
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@ -126,6 +119,7 @@ esp_err_t temperature_sensor_uninstall(temperature_sensor_handle_t tsens)
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free(s_tsens_attribute_copy);
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}
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s_tsens_attribute_copy = NULL;
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regi2c_saradc_disable();
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periph_module_disable(PERIPH_TEMPSENSOR_MODULE);
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free(tsens);
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@ -70,6 +70,13 @@ void regi2c_analog_cali_reg_read(void);
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void regi2c_analog_cali_reg_write(void);
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#endif //#if ADC_CALI_PD_WORKAROUND
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/* Enable/Disable regi2c_saradc with calling these two functions.
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With reference count protection inside.
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Internal use only.
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*/
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void regi2c_saradc_enable(void);
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void regi2c_saradc_disable(void);
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#ifdef __cplusplus
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}
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#endif
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@ -10,9 +10,13 @@
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "hal/regi2c_ctrl.h"
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#include "hal/regi2c_ctrl_ll.h"
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#include "esp_hw_log.h"
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static portMUX_TYPE mux = portMUX_INITIALIZER_UNLOCKED;
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static DRAM_ATTR __attribute__((unused)) const char *TAG = "REGI2C";
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uint8_t IRAM_ATTR regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add)
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{
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portENTER_CRITICAL_SAFE(&mux);
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@ -76,4 +80,35 @@ void IRAM_ATTR regi2c_analog_cali_reg_write(void)
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}
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}
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/**
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* REGI2C_SARADC reference count
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*/
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static int s_i2c_saradc_enable_cnt;
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void regi2c_saradc_enable(void)
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{
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regi2c_enter_critical();
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s_i2c_saradc_enable_cnt++;
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if (s_i2c_saradc_enable_cnt == 1) {
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regi2c_ctrl_ll_i2c_saradc_enable();
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}
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regi2c_exit_critical();
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}
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void regi2c_saradc_disable(void)
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{
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regi2c_enter_critical();
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s_i2c_saradc_enable_cnt--;
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if (s_i2c_saradc_enable_cnt < 0){
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regi2c_exit_critical();
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ESP_HW_LOGE(TAG, "REGI2C_SARADC is already disabled");
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} else if (s_i2c_saradc_enable_cnt == 0) {
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regi2c_ctrl_ll_i2c_saradc_disable();
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}
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regi2c_exit_critical();
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}
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#endif //#if ADC_CALI_PD_WORKAROUND
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@ -38,6 +38,28 @@ static inline void regi2c_ctrl_ll_i2c_apll_enable(void)
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CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, I2C_APLL_M);
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}
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/**
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* @brief Enable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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{
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// Not used on ESP32, but leave a blank function here.
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// I2C_SARADC is only used for enabling some analog features. However,
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// ESP32 does not use it to support those features.
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// In order to make it convenient for compiling other targets, left a blank function here.
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}
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/**
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* @brief Disable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
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{
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// Not used on ESP32, but leave a blank function here.
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// I2C_SARADC is only used for enabling some analog features. However,
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// ESP32 does not use it to support those features.
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// In order to make it convenient for compiling other targets, left a blank function here.
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}
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#ifdef __cplusplus
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}
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#endif
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@ -40,7 +40,7 @@ static inline __attribute__((always_inline)) void regi2c_ctrl_ll_bbpll_calibrati
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}
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/**
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* @brief Enable I2C_SAR
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* @brief Enable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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{
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@ -48,6 +48,15 @@ static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PU);
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}
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/**
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* @brief Disable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
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{
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CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, ANA_I2C_SAR_FORCE_PU);
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PD);
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}
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#ifdef __cplusplus
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}
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#endif
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@ -40,7 +40,7 @@ static inline __attribute__((always_inline)) void regi2c_ctrl_ll_bbpll_calibrati
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}
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/**
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* @brief Enable I2C_SAR
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* @brief Enable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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{
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@ -48,6 +48,15 @@ static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PU);
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}
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/**
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* @brief Disable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
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{
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CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, ANA_I2C_SAR_FORCE_PU);
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PD);
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}
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#ifdef __cplusplus
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}
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#endif
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@ -65,7 +65,7 @@ static inline __attribute__((always_inline)) bool regi2c_ctrl_ll_bbpll_calibrati
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}
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/**
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* @brief Enable I2C_SAR
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* @brief Enable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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{
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@ -73,6 +73,15 @@ static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PU);
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}
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/**
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* @brief Disable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
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{
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CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, ANA_I2C_SAR_FORCE_PU);
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PD);
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}
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#ifdef __cplusplus
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}
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#endif
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@ -39,16 +39,22 @@ static inline void regi2c_ctrl_ll_i2c_apll_enable(void)
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}
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/**
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* @brief Enable I2C_SAR
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* @brief Enable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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{
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CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_SAR_I2C_FORCE_PD_M);
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SET_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_SAR_I2C_FORCE_PU_M);
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CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, I2C_SAR_M);
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_SAR_CFG2_M);
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}
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/**
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* @brief Disable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
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{
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CLEAR_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_SAR_CFG2_M);
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}
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#ifdef __cplusplus
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}
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#endif
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@ -35,11 +35,19 @@ static inline void regi2c_ctrl_ll_i2c_bbpll_enable(void)
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_enable(void)
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{
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SET_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG, RTC_CNTL_SAR_I2C_PU);
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CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, I2C_SAR_M);
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_SAR_CFG2_M);
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}
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/**
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* @brief Disable the I2C internal bus to do I2C read/write operation to the SAR_ADC register
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*/
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static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
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{
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CLEAR_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_SAR_CFG2_M);
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}
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/**
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* @brief Start BBPLL self-calibration
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*/
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