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https://github.com/espressif/esp-idf.git
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Merge branch 'contrib/github_pr_8496' into 'master'
SPI LCD support large color transfers (GitHub PR) Closes IDFGH-6874 See merge request espressif/esp-idf!17391
This commit is contained in:
commit
98e19b3355
@ -15,12 +15,15 @@
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#endif
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#include "esp_lcd_panel_io_interface.h"
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#include "esp_lcd_panel_io.h"
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#include "hal/spi_ll.h"
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#include "driver/spi_master.h"
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#include "driver/gpio.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_lcd_common.h"
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#define LCD_SPI_MAX_DATA_SIZE (SPI_LL_DATA_MAX_BIT_LEN / 8)
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static const char *TAG = "lcd_panel.io.spi";
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static esp_err_t panel_io_spi_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size);
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@ -33,7 +36,7 @@ typedef struct {
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spi_transaction_t base;
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struct {
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unsigned int dc_gpio_level: 1;
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unsigned int trans_is_color: 1;
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unsigned int en_trans_done_cb: 1;
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} flags;
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} lcd_spi_trans_descriptor_t;
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@ -250,18 +253,53 @@ static esp_err_t panel_io_spi_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
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ret = spi_device_polling_transmit(spi_panel_io->spi_dev, &lcd_trans->base);
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ESP_GOTO_ON_ERROR(ret, err, TAG, "spi transmit (polling) command failed");
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// sending LCD color data
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lcd_trans->flags.trans_is_color = 1;
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lcd_trans->flags.dc_gpio_level = spi_panel_io->flags.dc_data_level; // set D/C line to data mode
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lcd_trans->base.length = color_size * 8; // transaction length is in bits
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lcd_trans->base.tx_buffer = color;
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if (spi_panel_io->flags.dc_as_cmd_phase) { // encoding DC value to SPI command phase when necessary
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lcd_trans->base.cmd = spi_panel_io->flags.dc_data_level;
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}
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// color data is usually large, using queue+blocking mode
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ret = spi_device_queue_trans(spi_panel_io->spi_dev, &lcd_trans->base, portMAX_DELAY);
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ESP_GOTO_ON_ERROR(ret, err, TAG, "spi transmit (queue) color failed");
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spi_panel_io->num_trans_inflight++;
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// split to chunks if required:
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// the SPI bus has a maximum transaction size determined by SPI_USR_MOSI_DBITLEN's bit width
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do {
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size_t chunk_size = color_size;
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if (spi_panel_io->num_trans_inflight < spi_panel_io->queue_size) {
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// get the next available transaction
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lcd_trans = &spi_panel_io->trans_pool[spi_panel_io->num_trans_inflight];
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} else {
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// transaction pool has used up, recycle one transaction
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ret = spi_device_get_trans_result(spi_panel_io->spi_dev, &spi_trans, portMAX_DELAY);
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ESP_GOTO_ON_ERROR(ret, err, TAG, "recycle spi transactions failed");
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lcd_trans = __containerof(spi_trans, lcd_spi_trans_descriptor_t, base);
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spi_panel_io->num_trans_inflight--;
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}
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memset(lcd_trans, 0, sizeof(lcd_spi_trans_descriptor_t));
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// SPI per-transfer size has its limitation, if the color buffer is too big, we need to split it into multiple trunks
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if (chunk_size > LCD_SPI_MAX_DATA_SIZE) {
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// cap the transfer size to the maximum supported by the bus
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chunk_size = LCD_SPI_MAX_DATA_SIZE;
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} else {
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// mark en_trans_done_cb only at the last round to avoid premature completion callback
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lcd_trans->flags.en_trans_done_cb = 1;
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}
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lcd_trans->base.user = spi_panel_io;
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lcd_trans->flags.dc_gpio_level = spi_panel_io->flags.dc_data_level; // set D/C line to data mode
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lcd_trans->base.length = chunk_size * 8; // transaction length is in bits
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lcd_trans->base.tx_buffer = color;
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if (spi_panel_io->flags.dc_as_cmd_phase) { // encoding DC value to SPI command phase when necessary
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lcd_trans->base.cmd = spi_panel_io->flags.dc_data_level;
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}
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if (spi_panel_io->flags.octal_mode) {
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// use 8 lines for transmitting command, address and data
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lcd_trans->base.flags |= (SPI_TRANS_MULTILINE_CMD | SPI_TRANS_MULTILINE_ADDR | SPI_TRANS_MODE_OCT);
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}
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// color data is usually large, using queue+blocking mode
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ret = spi_device_queue_trans(spi_panel_io->spi_dev, &lcd_trans->base, portMAX_DELAY);
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ESP_GOTO_ON_ERROR(ret, err, TAG, "spi transmit (queue) color failed");
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spi_panel_io->num_trans_inflight++;
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// move on to the next chunk
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color = (const uint8_t *)color + chunk_size;
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color_size -= chunk_size;
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} while (color_size > 0); // continue while we have remaining data to transmit
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err:
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return ret;
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@ -280,7 +318,7 @@ static void lcd_spi_post_trans_color_cb(spi_transaction_t *trans)
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{
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esp_lcd_panel_io_spi_t *spi_panel_io = trans->user;
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lcd_spi_trans_descriptor_t *lcd_trans = __containerof(trans, lcd_spi_trans_descriptor_t, base);
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if (lcd_trans->flags.trans_is_color) {
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if (lcd_trans->flags.en_trans_done_cb) {
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if (spi_panel_io->on_color_trans_done) {
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spi_panel_io->on_color_trans_done(&spi_panel_io->base, NULL, spi_panel_io->user_ctx);
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}
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@ -71,9 +71,10 @@ void test_spi_lcd_common_initialize(esp_lcd_panel_io_handle_t *io_handle, esp_lc
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TEST_ESP_OK(esp_lcd_new_panel_io_spi((esp_lcd_spi_bus_handle_t)TEST_SPI_HOST_ID, &io_config, io_handle));
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}
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#define TEST_IMG_SIZE (200 * 200 * sizeof(uint16_t))
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static void lcd_panel_test(esp_lcd_panel_io_handle_t io_handle, esp_lcd_panel_handle_t panel_handle)
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{
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#define TEST_IMG_SIZE (100 * 100 * sizeof(uint16_t))
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uint8_t *img = heap_caps_malloc(TEST_IMG_SIZE, MALLOC_CAP_DMA);
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TEST_ASSERT_NOT_NULL(img);
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@ -87,10 +88,10 @@ static void lcd_panel_test(esp_lcd_panel_io_handle_t io_handle, esp_lcd_panel_ha
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for (int i = 0; i < 200; i++) {
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uint8_t color_byte = esp_random() & 0xFF;
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int x_start = esp_random() % (TEST_LCD_H_RES - 100);
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int y_start = esp_random() % (TEST_LCD_V_RES - 100);
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int x_start = esp_random() % (TEST_LCD_H_RES - 200);
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int y_start = esp_random() % (TEST_LCD_V_RES - 200);
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memset(img, color_byte, TEST_IMG_SIZE);
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esp_lcd_panel_draw_bitmap(panel_handle, x_start, y_start, x_start + 100, y_start + 100, img);
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esp_lcd_panel_draw_bitmap(panel_handle, x_start, y_start, x_start + 200, y_start + 200, img);
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}
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// turn off screen
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esp_lcd_panel_disp_off(panel_handle, true);
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@ -99,7 +100,6 @@ static void lcd_panel_test(esp_lcd_panel_io_handle_t io_handle, esp_lcd_panel_ha
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TEST_ESP_OK(spi_bus_free(TEST_SPI_HOST_ID));
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TEST_ESP_OK(gpio_reset_pin(TEST_LCD_BK_LIGHT_GPIO));
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free(img);
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#undef TEST_IMG_SIZE
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}
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TEST_CASE("lcd_panel_spi_io_test", "[lcd]")
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@ -1,16 +1,8 @@
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*******************************************************************************
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* NOTICE
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@ -49,6 +41,8 @@ extern "C" {
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#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
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#define SPI_LL_GET_HW(ID) ((ID)==0? &SPI1:((ID)==1? &SPI2 : &SPI3))
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 24)
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/**
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* The data structure holding calculated clock configuration. Since the
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* calculation needs long time, it should be calculated during initialization and
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#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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/**
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* The data structure holding calculated clock configuration. Since the
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* calculation needs long time, it should be calculated during initialization and
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#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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/**
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* The data structure holding calculated clock configuration. Since the
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* calculation needs long time, it should be calculated during initialization and
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@ -1,16 +1,8 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*******************************************************************************
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* NOTICE
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@ -48,6 +40,8 @@ extern "C" {
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#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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/**
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* The data structure holding calculated clock configuration. Since the
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* calculation needs long time, it should be calculated during initialization and
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@ -43,6 +43,8 @@ extern "C" {
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#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):((ID)==1? &GPSPI2 : &GPSPI3))
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 23)
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/**
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* The data structure holding calculated clock configuration. Since the
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* calculation needs long time, it should be calculated during initialization and
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@ -42,6 +42,8 @@ extern "C" {
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#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):((ID)==1? &GPSPI2 : &GPSPI3))
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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/**
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* The data structure holding calculated clock configuration. Since the
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* calculation needs long time, it should be calculated during initialization and
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@ -834,7 +834,6 @@ components/hal/esp32/include/hal/sigmadelta_ll.h
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components/hal/esp32/include/hal/soc_ll.h
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components/hal/esp32/include/hal/spi_flash_encrypted_ll.h
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components/hal/esp32/include/hal/spi_flash_ll.h
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components/hal/esp32/include/hal/spi_ll.h
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components/hal/esp32/include/hal/touch_sensor_hal.h
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components/hal/esp32/include/hal/touch_sensor_ll.h
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components/hal/esp32/include/hal/trace_ll.h
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@ -879,7 +878,6 @@ components/hal/esp32h2/include/hal/sigmadelta_ll.h
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components/hal/esp32h2/include/hal/soc_ll.h
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components/hal/esp32h2/include/hal/spi_flash_encrypted_ll.h
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components/hal/esp32h2/include/hal/spi_flash_ll.h
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components/hal/esp32h2/include/hal/spi_ll.h
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components/hal/esp32h2/include/hal/spimem_flash_ll.h
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components/hal/esp32h2/include/hal/twai_ll.h
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components/hal/esp32h2/include/hal/uhci_ll.h
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