Commit Graph

157 Commits

Author SHA1 Message Date
morris
16677b0d3c global: make periph enable/disable APIs private
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
2021-11-08 10:37:47 +08:00
Cao Sen Miao
09487761cf ESP8684: add freertos, hal, esp_system support 2021-11-06 17:33:44 +08:00
Alexey Gerenkov
bb9cd84cdc debug_stubs: Refactor and add support for RISCV 2021-11-04 01:33:24 +03:00
Mahavir Jain
bdeaeb8d7f esp_system: enable "cache disable but cache accessed" interrupt for ESP32-S3 2021-10-20 15:16:25 +05:30
Omar Chebib
8048677b4c Xtensa: Branch and jump intructions referencing a relative label have been replaced
As branches/jumps on Xtensa have a maximum range for the destination, it is
unsafe to refer to a label to another compilation unit in a branch/jump instruction.
The labels have been replaced by absolute addresses.
2021-10-19 12:21:12 +08:00
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
baohongde
006a10b050 components/doc: Update doc about high-level interrupt
some bugfix.
2021-09-09 20:40:09 +08:00
baohongde
6d63fe06fa components/os: add config option to choose system check intterupt level. 2021-09-09 11:29:12 +08:00
baohongde
8a4696d25a components/os: Fix live lock int bt isr using ocd multicore debug
components/os: Fix live lock in bt isr immediately
2021-09-09 11:29:08 +08:00
baohongde
d1db2df316 components/bt: High level interrupt in bluetooth
components/os: Move ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and ETS_DPORT_INUM to l5 interrupt

components/os: high level interrupt(5)

components/os: hli_api: meta queue: fix out of bounds access, check for overflow

components/os: hli: don't spill registers, instead save them to a separate region

Level 4 interrupt has a chance of preempting a window overflow or underflow exception.
Therefore it is not possible to use standard context save functions,
as the SP on entry to Level 4 interrupt may be invalid (e.g. in WindowUnderflow4).

Instead, mask window overflows and save the entire general purpose register file,
plus some of the special registers.
Then clear WindowStart, allowing the C handler to execute without spilling the old windows.
On exit from the interrupt handler, do everything in reverse.

components/bt: using high level interrupt in lc

components/os: Add DRAM_ATTR to avoid feature `Allow .bss segment placed in external memory`

components/bt: optimize code structure

components/os: Modify the BT assert process to adapt to coredump and HLI

components/os: Disable exception mode after saving special registers

To store some registers first, avoid stuck due to live lock after disabling exception mode

components/os: using dport instead of AHB in BT to fix live lock

components/bt: Fix hli queue send error

components/bt: Fix CI fail

# Conflicts:
#	components/bt/CMakeLists.txt
#	components/bt/component.mk
#	components/bt/controller/bt.c
#	components/bt/controller/lib
#	components/esp_common/src/int_wdt.c
#	components/esp_system/port/soc/esp32/dport_panic_highint_hdl.S
#	components/soc/esp32/include/soc/soc.h
2021-09-09 11:29:06 +08:00
sly
11dfd802e0 esp32h2: add rtc clock support 2021-08-26 11:25:39 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support
brownout init fixed
2021-08-25 11:02:47 +08:00
Jiang Jiang Jian
6e1f8a68b9 Merge branch 'feature/support_esp32s3_wifi_lightsleep' into 'master'
support esp32s3 wifi lightsleep

Closes IDF-1781

See merge request espressif/esp-idf!14569
2021-08-06 12:51:46 +00:00
Li Shuai
d73a09cd8b light sleep: add wifi mac sleep support for esp32s3 2021-08-04 21:58:33 +08:00
Li Shuai
366d0a724a light sleep: set wifi light sleep clock source to rtc slow clock 2021-08-04 21:31:47 +08:00
Konstantin Kondrashov
29f581fc70 freertos(esp32s3): SysTick uses systimer 2021-08-04 20:33:44 +08:00
Konstantin Kondrashov
4972605b16 esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt 2021-08-03 14:35:29 +08:00
Wangjialin
2b986fbd49 For esp_restart API, reset uart0 core first, then reset uart0 apb side, so as to prevent uart output garbage after cpu reset. (UART0 RST bits will be cleared in ROM)
Add UART0/1 core reset on esp32c3, in case uart driver would also reset uart hardwares.
2021-07-21 11:41:04 +08:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master'
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
2021-07-18 08:06:38 +00:00
Angus Gratton
bbbbd5cf0c esp32s2: FPGA can boot to Hello World 2021-07-16 10:50:06 +10:00
Omar Chebib
0771bd1711 espsystem: Rearchitecture and fix eh_frame_parser bugs
eh_frame_parser is architecture independent, thus the files have
been rearchitectured. Some bugs have been fixed in the test.
A README file has also been added to eh_frame_parser host test
directory.

eh_frame_parser is now able to detect empty gaps in .eh_frame_hdr
table (missing DWARF information).
Fix a bug occuring when parsing backtraces originated from abort().
Fix build missing dependencies issue.
2021-07-15 12:47:51 +08:00
Omar Chebib
b967dc0dbf espsystem: add support for RISC-V panic backtrace
Add .eh_frame and .eh_frame_hdr sections to the binary (can be
enabled/disabled within menuconfig). These sections are parsed
when a panic occurs. Their DWARF instructions are decoded and
executed at runtime, to retrieve the whole backtrace. This
parser has been tested on both RISC-V and x86 architectures.

This feature needs esptool's merge adjacent ELF sections feature.
2021-07-13 15:42:40 +08:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
5e3689ae0f esp32h2: update esp_system and esp_hw_support to support esp32h2 2021-07-01 19:53:11 +08:00
Shu Chen
7d4b2617e1 esp32h2: copy esp_system and esp_hw_support from esp32c3
Copy the esp32c3 code without any change:
 * components/esp_hw_support/include/soc/esp32h2
 * components/esp_hw_support/port/esp32h2
 * components/esp_system/port/soc/esp32h2
2021-07-01 19:53:11 +08:00
Angus Gratton
57fa883127 esp32s3: Remove APB frequency RTC register
Usage of this register changed between ESP32-S3 beta2 and the
final chip.
2021-06-29 17:38:46 +10:00
Marius Vikhammer
f124536948 system: add support for reset reason hint on S3 2021-06-15 13:39:51 +08:00
Jiang Jiang Jian
efb9f87951 Merge branch 'bugfix/fix_728_series_reboot_failure' into 'master'
[system]: Fix two  (re)boot failure issues on ESP32S3Beta

Closes WIFI-3548, WIFI-3559, and IDF-3170

See merge request espressif/esp-idf!13268
2021-04-30 03:20:47 +00:00
wuzhenghui
57d43d1bc5 fix 728 series reboot failure 2021-04-29 03:10:47 +00:00
Michael (XIAO Xufeng)
a0d13a31ec uart: fix misleading files for UART2
Includes: header files, ld files and clk.c

ESP32-C3 only have UART0 and UART1.
2021-04-27 17:40:19 +08:00
Omar Chebib
bb9aa806f7 panic: handlers can now be placed in flash
By unchecking "Place panic handler code in IRAM" in the menuconfig,
the panic handlers will be placed in flash. Of course, flash cache must
be activated when entering panic handlers.
2021-04-15 11:58:46 +08:00
Renz Bagaporo
8762bfebde esp_system: move asysnc memcpy to esp_hw_support 2021-04-07 17:53:37 +08:00
Renz Bagaporo
a7bac58480 esp32: move system api to esp_system 2021-03-31 19:13:03 +08:00
Renz Bagaporo
7d85c42e52 esp32: move brownout and cache err int setup 2021-03-31 19:13:03 +08:00
Renz Bagaporo
cb5a8342d4 esp_system: revert reset of systimer clk at startup 2021-03-25 15:37:48 +08:00
Angus Gratton
fa2946d651 Merge branch 'feature/support_esp32s3_beta_3' into 'master'
Support ESP32S3 beta 3 target

Closes IDF-2908

See merge request espressif/esp-idf!12661
2021-03-23 10:17:58 +00:00
KonstantinKondrashov
aa1338bf23 wdt: Fix timeout and RTC_SLOW_CLK
RTC_SLOW_CLK
ESP32:    150kHz
ESP32-S2:  90kHz
ESP32-S3: 150kHz
ESP32-C3: 150kHz
2021-03-19 00:15:18 +08:00
Marius Vikhammer
2aead8ba57 Support ESP32S3 Beta 3 target
Update ROM API. Port changes from bringup branch.
2021-03-18 10:24:22 +08:00
Angus Gratton
fd164b82b6 Merge branch 'refactor/move_from_xtensa' into 'master'
Movements from xtensa

Closes IDF-2164

See merge request espressif/esp-idf!10556
2021-03-11 00:24:25 +00:00
Angus Gratton
d6f4d99d93 core system: Fix warnings in compilation when assertions are disabled
Adds a CI config for hello world that sets this, to catch future regressions
2021-03-03 10:26:57 +11:00
Renz Bagaporo
1efdcd69d9 xtensa: move out trax 2021-02-26 19:45:48 +08:00
Renz Bagaporo
7e0e91bf76 arch: move debug helpers 2021-02-26 13:34:29 +08:00
Renz Bagaporo
91a5770fd2 arch: move shared stack implementation to esp_system 2021-02-26 13:34:29 +08:00
Angus Gratton
807c8549e1 Merge branch 'bugfix/esp32s2_wakeup_from_light_sleep_fix' into 'master'
esp32s2 light sleep fix

Closes IDFCI-122

See merge request espressif/esp-idf!10269
2021-02-11 07:34:57 +08:00
Michael (XIAO Xufeng)
d7d1dee208 system: reset dma when soft reset 2021-01-25 04:51:40 +00:00
Chen Jian Xing
f71adec8fb Support ESP32S3 (beta2) WiFi 2021-01-25 00:18:42 +08:00
Renz Bagaporo
2dc7b556f3 esp32s2: reset systimer clk on startup 2021-01-22 14:51:50 +08:00
Michael (XIAO Xufeng)
2d3f22918f Merge branch 'feature/gdma_channel_allocator' into 'master'
gdma channel allocator

Closes IDF-2124

See merge request espressif/esp-idf!11570
2021-01-14 10:52:49 +08:00
Angus Gratton
f683db7aea Merge branch 'feature/c3_IDF-2554' into 'master'
global: Uses CCOUNT API instead of XTHAL macro

Closes IDF-2554

See merge request espressif/esp-idf!11954
2021-01-13 12:55:21 +08:00
morris
40a6a0fac6 async_mcp: apply gdma driver 2021-01-13 10:52:27 +08:00
KonstantinKondrashov
dada7cd035 global: Uses CCOUNT API instead of XTHAL macro 2021-01-12 16:24:23 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
Chen Jian Xing
5b44295cb9 esp_wifi: fix esp32c3 code issues
1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
2021-01-10 16:16:28 +08:00
Angus Gratton
61c77d9212 esp_system: Add port-specific esp32c3 files 2020-12-24 13:40:01 +11:00
Angus Gratton
a5aac93051 esp_rom: Small changes for esp32c3 support
Updated from internal commit 6d894813
2020-12-24 13:40:01 +11:00
Renz Bagaporo
4cc6b5571b esp_system: support riscv panic 2020-11-13 07:49:11 +11:00