Support ESP32S3 (beta2) WiFi

This commit is contained in:
Chen Jian Xing 2021-01-25 00:18:42 +08:00 committed by Jiang Jiang Jian
parent 06f22fc4b0
commit f71adec8fb
10 changed files with 989 additions and 19 deletions

View File

@ -76,6 +76,18 @@ entries:
entries:
.wifirxiram+
[sections:wifi_slp_iram]
entries:
.wifislpiram+
[sections:wifi_or_slp_iram]
entries:
.wifiorslpiram+
[sections:wifi_slp_rx_iram]
entries:
.wifislprxiram+
[scheme:default]
entries:
if APP_BUILD_USE_FLASH_SECTIONS = y:
@ -101,6 +113,9 @@ entries:
iram_coredump -> iram_coredump
rtc_coredump -> rtc_coredump
rtc_fast_coredump -> rtc_fast_coredump
wifi_slp_iram -> flash_text
wifi_or_slp_iram -> flash_text
wifi_slp_rx_iram -> flash_text
[scheme:rtc]
entries:
@ -130,3 +145,15 @@ entries:
[scheme:wifi_rx_iram]
entries:
wifi_rx_iram -> iram0_text
[scheme:wifi_slp_iram]
entries:
wifi_slp_iram -> iram0_text
[scheme:wifi_or_slp_iram]
entries:
wifi_or_slp_iram -> iram0_text
[scheme:wifi_slp_rx_iram]
entries:
wifi_slp_rx_iram -> iram0_text

View File

@ -71,7 +71,10 @@ menu "ESP System Settings"
config ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
bool "Enable RTC fast memory for dynamic allocations"
default y
default y if IDF_TARGET_ESP32
default y if IDF_TARGET_ESP32S2
default y if IDF_TARGET_ESP32C3
default n if IDF_TARGET_ESP32S3 # TODO
depends on ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK
help
This config option allows to add RTC fast memory region to system heap with capability

View File

@ -308,6 +308,7 @@ __attribute__((weak)) void esp_perip_clk_init(void)
/* Disable WiFi/BT/SDIO clocks. */
CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, wifi_bt_sdio_clk);
SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_EN);
/* Enable RNG clock. */
periph_module_enable(PERIPH_RNG_MODULE);

View File

@ -1,13 +1,5 @@
idf_build_get_property(idf_target IDF_TARGET)
# remove these when wifi support is ready on esp32-s3
if(${idf_target} STREQUAL "esp32s3")
idf_component_register(INCLUDE_DIRS "include"
REQUIRES esp_event
PRIV_REQUIRES wpa_supplicant nvs_flash esp_netif)
return()
endif()
if(CONFIG_ESP32_NO_BLOBS OR CONFIG_ESP32S2_NO_BLOBS)
set(link_binary_libs 0)
set(ldfragments)

View File

@ -11,3 +11,767 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stddef.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <pthread.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "freertos/semphr.h"
#include "freertos/event_groups.h"
#include "freertos/portmacro.h"
#include "freertos/xtensa_api.h"
#include "esp_types.h"
#include "esp_system.h"
#include "esp_task.h"
#include "esp_intr_alloc.h"
#include "esp_attr.h"
#include "esp_log.h"
#include "esp_event.h"
#include "esp_heap_caps.h"
#include "esp_timer.h"
#include "esp_private/wifi_os_adapter.h"
#include "esp_private/wifi.h"
#include "esp_phy_init.h"
#include "esp32s3/clk.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/rtc.h"
#include "soc/syscon_reg.h"
#include "phy_init_data.h"
#include "driver/periph_ctrl.h"
#include "nvs.h"
#include "os.h"
#include "esp_smartconfig.h"
#include "esp_coexist_internal.h"
#include "esp_coexist_adapter.h"
#define TAG "esp_adapter"
#ifdef CONFIG_PM_ENABLE
extern void wifi_apb80m_request(void);
extern void wifi_apb80m_release(void);
#endif
IRAM_ATTR void *wifi_malloc( size_t size )
{
return malloc(size);
}
IRAM_ATTR void *wifi_realloc( void *ptr, size_t size )
{
return realloc(ptr, size);
}
IRAM_ATTR void *wifi_calloc( size_t n, size_t size )
{
return calloc(n, size);
}
static void * IRAM_ATTR wifi_zalloc_wrapper(size_t size)
{
void *ptr = wifi_calloc(1, size);
return ptr;
}
wifi_static_queue_t* wifi_create_queue( int queue_len, int item_size)
{
wifi_static_queue_t *queue = NULL;
queue = (wifi_static_queue_t*)heap_caps_malloc(sizeof(wifi_static_queue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
if (!queue) {
return NULL;
}
queue->handle = xQueueCreate( queue_len, item_size);
return queue;
}
void wifi_delete_queue(wifi_static_queue_t *queue)
{
if (queue) {
vQueueDelete(queue->handle);
free(queue);
}
}
static void * wifi_create_queue_wrapper(int queue_len, int item_size)
{
return wifi_create_queue(queue_len, item_size);
}
static void wifi_delete_queue_wrapper(void *queue)
{
wifi_delete_queue(queue);
}
static bool IRAM_ATTR env_is_chip_wrapper(void)
{
#ifdef CONFIG_IDF_ENV_FPGA
return false;
#else
return true;
#endif
}
static void set_intr_wrapper(int32_t cpu_no, uint32_t intr_source, uint32_t intr_num, int32_t intr_prio)
{
intr_matrix_set(cpu_no, intr_source, intr_num);
}
static void clear_intr_wrapper(uint32_t intr_source, uint32_t intr_num)
{
}
static void set_isr_wrapper(int32_t n, void *f, void *arg)
{
xt_set_interrupt_handler(n, (xt_handler)f, arg);
}
static void * spin_lock_create_wrapper(void)
{
portMUX_TYPE tmp = portMUX_INITIALIZER_UNLOCKED;
void *mux = malloc(sizeof(portMUX_TYPE));
if (mux) {
memcpy(mux,&tmp,sizeof(portMUX_TYPE));
return mux;
}
return NULL;
}
static uint32_t IRAM_ATTR wifi_int_disable_wrapper(void *wifi_int_mux)
{
if (xPortInIsrContext()) {
portENTER_CRITICAL_ISR(wifi_int_mux);
} else {
portENTER_CRITICAL(wifi_int_mux);
}
return 0;
}
static void IRAM_ATTR wifi_int_restore_wrapper(void *wifi_int_mux, uint32_t tmp)
{
if (xPortInIsrContext()) {
portEXIT_CRITICAL_ISR(wifi_int_mux);
} else {
portEXIT_CRITICAL(wifi_int_mux);
}
}
static bool IRAM_ATTR is_from_isr_wrapper(void)
{
return !xPortCanYield();
}
static void IRAM_ATTR task_yield_from_isr_wrapper(void)
{
portYIELD_FROM_ISR();
}
static void * semphr_create_wrapper(uint32_t max, uint32_t init)
{
return (void *)xSemaphoreCreateCounting(max, init);
}
static void semphr_delete_wrapper(void *semphr)
{
vSemaphoreDelete(semphr);
}
static void wifi_thread_semphr_free(void* data)
{
SemaphoreHandle_t *sem = (SemaphoreHandle_t*)(data);
if (sem) {
vSemaphoreDelete(sem);
}
}
static void * wifi_thread_semphr_get_wrapper(void)
{
static bool s_wifi_thread_sem_key_init = false;
static pthread_key_t s_wifi_thread_sem_key;
SemaphoreHandle_t sem = NULL;
if (s_wifi_thread_sem_key_init == false) {
if (0 != pthread_key_create(&s_wifi_thread_sem_key, wifi_thread_semphr_free)) {
return NULL;
}
s_wifi_thread_sem_key_init = true;
}
sem = pthread_getspecific(s_wifi_thread_sem_key);
if (!sem) {
sem = xSemaphoreCreateCounting(1, 0);
if (sem) {
pthread_setspecific(s_wifi_thread_sem_key, sem);
ESP_LOGV(TAG, "thread sem create: sem=%p", sem);
}
}
ESP_LOGV(TAG, "thread sem get: sem=%p", sem);
return (void*)sem;
}
static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
{
return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
}
static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
{
return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
}
static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_tick)
{
if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
} else {
return (int32_t)xSemaphoreTake(semphr, block_time_tick);
}
}
static int32_t semphr_give_wrapper(void *semphr)
{
return (int32_t)xSemaphoreGive(semphr);
}
static void * recursive_mutex_create_wrapper(void)
{
return (void *)xSemaphoreCreateRecursiveMutex();
}
static void * mutex_create_wrapper(void)
{
return (void *)xSemaphoreCreateMutex();
}
static void mutex_delete_wrapper(void *mutex)
{
vSemaphoreDelete(mutex);
}
static int32_t IRAM_ATTR mutex_lock_wrapper(void *mutex)
{
return (int32_t)xSemaphoreTakeRecursive(mutex, portMAX_DELAY);
}
static int32_t IRAM_ATTR mutex_unlock_wrapper(void *mutex)
{
return (int32_t)xSemaphoreGiveRecursive(mutex);
}
static void * queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
{
return (void *)xQueueCreate(queue_len, item_size);
}
static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_tick)
{
if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
} else {
return (int32_t)xQueueSend(queue, item, block_time_tick);
}
}
static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
{
return (int32_t)xQueueSendFromISR(queue, item, hptw);
}
static int32_t queue_send_to_back_wrapper(void *queue, void *item, uint32_t block_time_tick)
{
return (int32_t)xQueueGenericSend(queue, item, block_time_tick, queueSEND_TO_BACK);
}
static int32_t queue_send_to_front_wrapper(void *queue, void *item, uint32_t block_time_tick)
{
return (int32_t)xQueueGenericSend(queue, item, block_time_tick, queueSEND_TO_FRONT);
}
static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_tick)
{
if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
} else {
return (int32_t)xQueueReceive(queue, item, block_time_tick);
}
}
static uint32_t event_group_wait_bits_wrapper(void *event, uint32_t bits_to_wait_for, int clear_on_exit, int wait_for_all_bits, uint32_t block_time_tick)
{
if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
return (uint32_t)xEventGroupWaitBits(event, bits_to_wait_for, clear_on_exit, wait_for_all_bits, portMAX_DELAY);
} else {
return (uint32_t)xEventGroupWaitBits(event, bits_to_wait_for, clear_on_exit, wait_for_all_bits, block_time_tick);
}
}
static int32_t task_create_pinned_to_core_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
{
return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
}
static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle)
{
return (uint32_t)xTaskCreate(task_func, name, stack_depth, param, prio, task_handle);
}
static int32_t IRAM_ATTR task_ms_to_tick_wrapper(uint32_t ms)
{
return (int32_t)(ms / portTICK_PERIOD_MS);
}
static int32_t task_get_max_priority_wrapper(void)
{
return (int32_t)(configMAX_PRIORITIES);
}
static int32_t esp_event_post_wrapper(const char* event_base, int32_t event_id, void* event_data, size_t event_data_size, uint32_t ticks_to_wait)
{
if (ticks_to_wait == OSI_FUNCS_TIME_BLOCKING) {
return (int32_t)esp_event_post(event_base, event_id, event_data, event_data_size, portMAX_DELAY);
} else {
return (int32_t)esp_event_post(event_base, event_id, event_data, event_data_size, ticks_to_wait);
}
}
static void IRAM_ATTR wifi_apb80m_request_wrapper(void)
{
#ifdef CONFIG_PM_ENABLE
wifi_apb80m_request();
#endif
}
static void IRAM_ATTR wifi_apb80m_release_wrapper(void)
{
#ifdef CONFIG_PM_ENABLE
wifi_apb80m_release();
#endif
}
static void IRAM_ATTR timer_arm_wrapper(void *timer, uint32_t tmout, bool repeat)
{
ets_timer_arm(timer, tmout, repeat);
}
static void IRAM_ATTR timer_disarm_wrapper(void *timer)
{
ets_timer_disarm(timer);
}
static void IRAM_ATTR timer_done_wrapper(void *ptimer)
{
ets_timer_done(ptimer);
}
static void IRAM_ATTR timer_setfn_wrapper(void *ptimer, void *pfunction, void *parg)
{
ets_timer_setfn(ptimer, pfunction, parg);
}
static void IRAM_ATTR timer_arm_us_wrapper(void *ptimer, uint32_t us, bool repeat)
{
ets_timer_arm_us(ptimer, us, repeat);
}
static void wifi_reset_mac_wrapper(void)
{
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
}
static void IRAM_ATTR wifi_rtc_enable_iso_wrapper(void)
{
#if CONFIG_MAC_BB_PD
esp_mac_bb_power_down();
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
#endif
}
static void IRAM_ATTR wifi_rtc_disable_iso_wrapper(void)
{
#if CONFIG_MAC_BB_PD
esp_mac_bb_power_up();
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
#endif
}
static void IRAM_ATTR wifi_clock_enable_wrapper(void)
{
periph_module_enable(PERIPH_WIFI_MODULE);
}
static void IRAM_ATTR wifi_clock_disable_wrapper(void)
{
periph_module_disable(PERIPH_WIFI_MODULE);
}
static int get_time_wrapper(void *t)
{
return os_get_time(t);
}
#define WIFI_LIGHT_SLEEP_CLK_WIDTH 12
static uint32_t esp_clk_slowclk_cal_get_wrapper(void)
{
/* The bit width of WiFi light sleep clock calibration is 12 while the one of
* system is 19. It should shift 19 - 12 = 7.
*/
return (esp_clk_slowclk_cal_get() >> (RTC_CLK_CAL_FRACT - WIFI_LIGHT_SLEEP_CLK_WIDTH));
}
static void * IRAM_ATTR malloc_internal_wrapper(size_t size)
{
return heap_caps_malloc(size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
}
static void * IRAM_ATTR realloc_internal_wrapper(void *ptr, size_t size)
{
return heap_caps_realloc(ptr, size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
}
static void * IRAM_ATTR calloc_internal_wrapper(size_t n, size_t size)
{
return heap_caps_calloc(n, size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
}
static void * IRAM_ATTR zalloc_internal_wrapper(size_t size)
{
void *ptr = heap_caps_calloc(1, size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
return ptr;
}
static esp_err_t nvs_open_wrapper(const char* name, uint32_t open_mode, nvs_handle_t *out_handle)
{
return nvs_open(name,(nvs_open_mode_t)open_mode, out_handle);
}
static void esp_log_writev_wrapper(uint32_t level, const char *tag, const char *format, va_list args)
{
return esp_log_writev((esp_log_level_t)level,tag,format,args);
}
static void esp_log_write_wrapper(uint32_t level,const char *tag,const char *format, ...)
{
va_list list;
va_start(list, format);
esp_log_writev((esp_log_level_t)level, tag, format, list);
va_end(list);
}
static esp_err_t esp_read_mac_wrapper(uint8_t* mac, uint32_t type)
{
return esp_read_mac(mac, (esp_mac_type_t)type);
}
static int coex_init_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_init();
#else
return 0;
#endif
}
static void coex_deinit_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
coex_deinit();
#endif
}
static int coex_enable_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_enable();
#else
return 0;
#endif
}
static void coex_disable_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
coex_disable();
#endif
}
static IRAM_ATTR uint32_t coex_status_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_status_get();
#else
return 0;
#endif
}
static void coex_condition_set_wrapper(uint32_t type, bool dissatisfy)
{
#if CONFIG_SW_COEXIST_ENABLE
coex_condition_set(type, dissatisfy);
#endif
}
static int coex_wifi_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_wifi_request(event, latency, duration);
#else
return 0;
#endif
}
static IRAM_ATTR int coex_wifi_release_wrapper(uint32_t event)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_wifi_release(event);
#else
return 0;
#endif
}
static int coex_wifi_channel_set_wrapper(uint8_t primary, uint8_t secondary)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_wifi_channel_set(primary, secondary);
#else
return 0;
#endif
}
static IRAM_ATTR int coex_event_duration_get_wrapper(uint32_t event, uint32_t *duration)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_event_duration_get(event, duration);
#else
return 0;
#endif
}
static int coex_pti_get_wrapper(uint32_t event, uint8_t *pti)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_pti_get(event, pti);
#else
return 0;
#endif
}
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
{
#if CONFIG_SW_COEXIST_ENABLE
coex_schm_status_bit_clear(type, status);
#endif
}
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
{
#if CONFIG_SW_COEXIST_ENABLE
coex_schm_status_bit_set(type, status);
#endif
}
static IRAM_ATTR int coex_schm_interval_set_wrapper(uint32_t interval)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_interval_set(interval);
#else
return 0;
#endif
}
static uint32_t coex_schm_interval_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_interval_get();
#else
return 0;
#endif
}
static uint8_t coex_schm_curr_period_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_curr_period_get();
#else
return 0;
#endif
}
static void * coex_schm_curr_phase_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_curr_phase_get();
#else
return NULL;
#endif
}
static int coex_schm_curr_phase_idx_set_wrapper(int idx)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_curr_phase_idx_set(idx);
#else
return 0;
#endif
}
static int coex_schm_curr_phase_idx_get_wrapper(void)
{
#if CONFIG_SW_COEXIST_ENABLE
return coex_schm_curr_phase_idx_get();
#else
return 0;
#endif
}
static void IRAM_ATTR esp_empty_wrapper(void)
{
}
wifi_osi_funcs_t g_wifi_osi_funcs = {
._version = ESP_WIFI_OS_ADAPTER_VERSION,
._env_is_chip = env_is_chip_wrapper,
._set_intr = set_intr_wrapper,
._clear_intr = clear_intr_wrapper,
._set_isr = set_isr_wrapper,
._ints_on = xt_ints_on,
._ints_off = xt_ints_off,
._is_from_isr = is_from_isr_wrapper,
._spin_lock_create = spin_lock_create_wrapper,
._spin_lock_delete = free,
._wifi_int_disable = wifi_int_disable_wrapper,
._wifi_int_restore = wifi_int_restore_wrapper,
._task_yield_from_isr = task_yield_from_isr_wrapper,
._semphr_create = semphr_create_wrapper,
._semphr_delete = semphr_delete_wrapper,
._semphr_take = semphr_take_wrapper,
._semphr_give = semphr_give_wrapper,
._wifi_thread_semphr_get = wifi_thread_semphr_get_wrapper,
._mutex_create = mutex_create_wrapper,
._recursive_mutex_create = recursive_mutex_create_wrapper,
._mutex_delete = mutex_delete_wrapper,
._mutex_lock = mutex_lock_wrapper,
._mutex_unlock = mutex_unlock_wrapper,
._queue_create = queue_create_wrapper,
._queue_delete = (void(*)(void *))vQueueDelete,
._queue_send = queue_send_wrapper,
._queue_send_from_isr = queue_send_from_isr_wrapper,
._queue_send_to_back = queue_send_to_back_wrapper,
._queue_send_to_front = queue_send_to_front_wrapper,
._queue_recv = queue_recv_wrapper,
._queue_msg_waiting = (uint32_t(*)(void *))uxQueueMessagesWaiting,
._event_group_create = (void *(*)(void))xEventGroupCreate,
._event_group_delete = (void(*)(void *))vEventGroupDelete,
._event_group_set_bits = (uint32_t(*)(void *,uint32_t))xEventGroupSetBits,
._event_group_clear_bits = (uint32_t(*)(void *,uint32_t))xEventGroupClearBits,
._event_group_wait_bits = event_group_wait_bits_wrapper,
._task_create_pinned_to_core = task_create_pinned_to_core_wrapper,
._task_create = task_create_wrapper,
._task_delete = (void(*)(void *))vTaskDelete,
._task_delay = vTaskDelay,
._task_ms_to_tick = task_ms_to_tick_wrapper,
._task_get_current_task = (void *(*)(void))xTaskGetCurrentTaskHandle,
._task_get_max_priority = task_get_max_priority_wrapper,
._malloc = malloc,
._free = free,
._event_post = esp_event_post_wrapper,
._get_free_heap_size = esp_get_free_internal_heap_size,
._rand = esp_random,
._dport_access_stall_other_cpu_start_wrap = esp_empty_wrapper,
._dport_access_stall_other_cpu_end_wrap = esp_empty_wrapper,
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
._phy_disable = esp_phy_disable,
._phy_enable = esp_phy_enable,
._phy_update_country_info = esp_phy_update_country_info,
._read_mac = esp_read_mac_wrapper,
._timer_arm = timer_arm_wrapper,
._timer_disarm = timer_disarm_wrapper,
._timer_done = timer_done_wrapper,
._timer_setfn = timer_setfn_wrapper,
._timer_arm_us = timer_arm_us_wrapper,
._wifi_reset_mac = wifi_reset_mac_wrapper,
._wifi_clock_enable = wifi_clock_enable_wrapper,
._wifi_clock_disable = wifi_clock_disable_wrapper,
._wifi_rtc_enable_iso = wifi_rtc_enable_iso_wrapper,
._wifi_rtc_disable_iso = wifi_rtc_disable_iso_wrapper,
._esp_timer_get_time = esp_timer_get_time,
._nvs_set_i8 = nvs_set_i8,
._nvs_get_i8 = nvs_get_i8,
._nvs_set_u8 = nvs_set_u8,
._nvs_get_u8 = nvs_get_u8,
._nvs_set_u16 = nvs_set_u16,
._nvs_get_u16 = nvs_get_u16,
._nvs_open = nvs_open_wrapper,
._nvs_close = nvs_close,
._nvs_commit = nvs_commit,
._nvs_set_blob = nvs_set_blob,
._nvs_get_blob = nvs_get_blob,
._nvs_erase_key = nvs_erase_key,
._get_random = os_get_random,
._get_time = get_time_wrapper,
._random = os_random,
._slowclk_cal_get = esp_clk_slowclk_cal_get_wrapper,
._log_write = esp_log_write_wrapper,
._log_writev = esp_log_writev_wrapper,
._log_timestamp = esp_log_timestamp,
._malloc_internal = malloc_internal_wrapper,
._realloc_internal = realloc_internal_wrapper,
._calloc_internal = calloc_internal_wrapper,
._zalloc_internal = zalloc_internal_wrapper,
._wifi_malloc = wifi_malloc,
._wifi_realloc = wifi_realloc,
._wifi_calloc = wifi_calloc,
._wifi_zalloc = wifi_zalloc_wrapper,
._wifi_create_queue = wifi_create_queue_wrapper,
._wifi_delete_queue = wifi_delete_queue_wrapper,
._coex_init = coex_init_wrapper,
._coex_deinit = coex_deinit_wrapper,
._coex_enable = coex_enable_wrapper,
._coex_disable = coex_disable_wrapper,
._coex_status_get = coex_status_get_wrapper,
._coex_condition_set = coex_condition_set_wrapper,
._coex_wifi_request = coex_wifi_request_wrapper,
._coex_wifi_release = coex_wifi_release_wrapper,
._coex_wifi_channel_set = coex_wifi_channel_set_wrapper,
._coex_event_duration_get = coex_event_duration_get_wrapper,
._coex_pti_get = coex_pti_get_wrapper,
._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
._coex_schm_interval_set = coex_schm_interval_set_wrapper,
._coex_schm_interval_get = coex_schm_interval_get_wrapper,
._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
._coex_schm_curr_phase_idx_set = coex_schm_curr_phase_idx_set_wrapper,
._coex_schm_curr_phase_idx_get = coex_schm_curr_phase_idx_get_wrapper,
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
};
coex_adapter_funcs_t g_coex_adapter_funcs = {
._version = COEX_ADAPTER_VERSION,
._task_yield_from_isr = task_yield_from_isr_wrapper,
._semphr_create = semphr_create_wrapper,
._semphr_delete = semphr_delete_wrapper,
._semphr_take_from_isr = semphr_take_from_isr_wrapper,
._semphr_give_from_isr = semphr_give_from_isr_wrapper,
._semphr_take = semphr_take_wrapper,
._semphr_give = semphr_give_wrapper,
._is_in_isr = xPortInIsrContext,
._malloc_internal = malloc_internal_wrapper,
._free = free,
._esp_timer_get_time = esp_timer_get_time,
._magic = COEX_ADAPTER_MAGIC,
};

View File

@ -11,3 +11,175 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef PHY_INIT_DATA_H
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
#include "esp_phy_init.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
// constrain a value between 'low' and 'high', inclusive
#define LIMIT(val, low, high) ((val < low) ? low : (val > high) ? high : val)
#define PHY_INIT_MAGIC "PHYINIT"
// define the lowest tx power as LOWEST_PHY_TX_POWER
#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 52)
#define PHY_TX_POWER_OFFSET 44
#define PHY_TX_POWER_NUM 5
#if CONFIG_ESP32_SUPPORT_MULTIPLE_PHY_INIT_DATA_BIN
#define PHY_CRC_ALGORITHM 1
#define PHY_COUNTRY_CODE_LEN 2
#define PHY_INIT_DATA_TYPE_OFFSET 126
#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
#endif
static const char phy_init_magic_pre[] = PHY_INIT_MAGIC;
/**
* @brief Structure containing default recommended PHY initialization parameters.
*/
static const esp_phy_init_data_t phy_init_data= { {
3,
3,
0x05,
0x09,
0x06,
0x05,
0x03,
0x06,
0x05,
0x04,
0x06,
0x04,
0x05,
0x00,
0x00,
0x00,
0x00,
0x05,
0x09,
0x06,
0x05,
0x03,
0x06,
0x05,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0xfc,
0xfc,
0xfe,
0xf0,
0xf0,
0xf0,
0xe0,
0xe0,
0xe0,
0x18,
0x18,
0x18,
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 84),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 72),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 66),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 60),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 56),
LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 52),
0,
1,
1,
2,
2,
3,
4,
5,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
} };
static const char phy_init_magic_post[] = PHY_INIT_MAGIC;
#if CONFIG_ESP32_SUPPORT_MULTIPLE_PHY_INIT_DATA_BIN
/**
* @brief PHY init data control infomation structure
*/
typedef struct {
uint8_t control_info_checksum[4]; /*!< 4-byte control infomation checksum */
uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */
uint8_t check_algorithm; /*!< check algorithm */
uint8_t version; /*!< PHY init data bin version */
uint8_t number; /*!< PHY init data bin number */
uint8_t length[2]; /*!< Length of each PHY init data bin */
uint8_t reserved[19]; /*!< 19-byte reserved */
} __attribute__ ((packed)) phy_control_info_data_t;
/**
* @brief Country corresponds to PHY init data type structure
*/
typedef struct {
char cc[PHY_COUNTRY_CODE_LEN];
uint8_t type;
} phy_country_to_bin_type_t;
#endif
#ifdef __cplusplus
}
#endif
#endif /* PHY_INIT_DATA_H */

@ -1 +1 @@
Subproject commit 55635ec1783027dc31ba0df690d90931abed2db7
Subproject commit 21001cb8acd9f193aed4ec17e632ea861233e7e0

View File

@ -42,6 +42,9 @@
#elif CONFIG_IDF_TARGET_ESP32C3
#include "soc/rtc_cntl_reg.h"
#include "soc/syscon_reg.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "soc/rtc_cntl_reg.h"
#include "soc/syscon_reg.h"
#endif
#if CONFIG_IDF_TARGET_ESP32
@ -220,7 +223,7 @@ void esp_phy_enable(void)
coex_bt_high_prio();
#endif
#if CONFIG_BT_ENABLED && CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_BT_ENABLED && (CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3)
extern void coex_pti_v2(void);
coex_pti_v2();
#endif

View File

@ -161,3 +161,11 @@
// Remove them when GDMA driver API is ready
#define SOC_GDMA_SPI2_DMA_CHANNEL (1)
#define SOC_GDMA_SPI3_DMA_CHANNEL (2)
#define SOC_GDMA_SHA_DMA_CHANNEL (3)
#define SOC_GDMA_AES_DMA_CHANNEL (4)
/*-------------------------- WI-FI HARDWARE TSF CAPS -------------------------------*/
#define SOC_WIFI_HW_TSF (1)
/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
#define SOC_COEX_HW_PTI (1)

View File

@ -174,24 +174,24 @@ extern "C" {
#define SYSTEM_WIFI_CLK_EN_REG SYSCON_WIFI_CLK_EN_REG
/* SYSTEM_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030 ; */
/*description: */
#define SYSTEM_WIFI_CLK_EN 0xFFFFFFFF
#define SYSTEM_WIFI_CLK_EN 0x00FB9FCF
#define SYSTEM_WIFI_CLK_EN_M ((SYSTEM_WIFI_CLK_EN_V) << (SYSTEM_WIFI_CLK_EN_S))
#define SYSTEM_WIFI_CLK_EN_V 0xFFFFFFFF
#define SYSTEM_WIFI_CLK_EN_V 0x00FB9FCF
#define SYSTEM_WIFI_CLK_EN_S 0
/* Mask for all Wifi clock bits - 0, 1, 2, 3, 6, 7, 8, 9, 10, 15, 19, 20, 21
Bit15 not included here because of the bit now can't be cleared */
#define SYSTEM_WIFI_CLK_WIFI_EN 0x003807cf
#define SYSTEM_WIFI_CLK_WIFI_EN 0x0
#define SYSTEM_WIFI_CLK_WIFI_EN_M ((SYSTEM_WIFI_CLK_WIFI_EN_V) << (SYSTEM_WIFI_CLK_WIFI_EN_S))
#define SYSTEM_WIFI_CLK_WIFI_EN_V 0x7cf
#define SYSTEM_WIFI_CLK_WIFI_EN_V 0x0
#define SYSTEM_WIFI_CLK_WIFI_EN_S 0
/* Mask for all Bluetooth clock bits - 11, 16, 17 */
#define SYSTEM_WIFI_CLK_BT_EN 0x61
#define SYSTEM_WIFI_CLK_BT_EN 0x0
#define SYSTEM_WIFI_CLK_BT_EN_M ((SYSTEM_WIFI_CLK_BT_EN_V) << (SYSTEM_WIFI_CLK_BT_EN_S))
#define SYSTEM_WIFI_CLK_BT_EN_V 0x61
#define SYSTEM_WIFI_CLK_BT_EN_S 11
#define SYSTEM_WIFI_CLK_BT_EN_V 0x0
#define SYSTEM_WIFI_CLK_BT_EN_S 0
/* Mask for clock bits used by both WIFI and Bluetooth, bit 0, 3, 6, 7, 8, 9 */
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
/* Digital team to check */
//bluetooth baseband bit11