Armando (Dou Yiwen)
9f6f61345b
Merge branch 'feature/adc_driver_ng' into 'master'
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ADC Driver NG
Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979
See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5
I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2
2022-07-19 11:41:42 +08:00
Armando
5b523a3313
esp_adc: new esp_adc component and adc drivers
2022-07-15 18:31:00 +08:00
songruojing
0c4b9a0101
gpio: Fix HAL bad bit shift operation on gpio_num_t reported from coverity
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All gpio hal and ll functions input arguments gpio_num_t are changed to uint32_t type.
Validation of gpio num should be guaranteed from the driver layer.
2022-07-15 16:51:25 +08:00
Ivan Grokhotkov
2e37218ce5
soc, hal: remove XTAL_CLK_FREQ
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XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4
esp_timer, hal: add support for non-integer systimer frequency
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When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:
1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.
For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.
This introduced two possible issues:
1. Overflow when multiplying systimer counter by 5
- Should not be an issue, since systimer counter is 52-bit, so
counter * 5 is no more than 55-bit.
2. The code needs to perform:
- divide by 5: when converting from microseconds to ticks
- divide by 52: when converting from ticks to microseconds
The latter potentially introduces a performance issue for the
esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Michael (XIAO Xufeng)
a58362a429
Merge branch 'feature/efuse_rev_major_minor' into 'master'
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efuse: Adds major and minor versions
See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f
Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
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support c2 26M/32M xtal for bbpll
Closes IDF-5485
See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
Cao Sen Miao
e218723e0e
I2C: Make I2C clock frequency accurate
2022-07-06 11:58:08 +08:00
cje
e16165f263
support c2 26M/32M xtal for bbpll
2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
Armando
31b3f31ef4
ext_mem: make memory region check strict
2022-06-28 14:17:44 +08:00
Cao Sen Miao
2c0651a671
Add regi2c enable/disable reference count
2022-06-23 15:36:44 +08:00
Cao Sen Miao
3a820462ac
temperature_sensor: Add temperature sensor support for ESP32-C2
2022-06-23 15:36:43 +08:00
Omar Chebib
752026a174
Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
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G0: RISC-V targets have now an independent G0 layer
See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
Darian
e213e66ba3
Merge branch 'refactor/esp_hw_support_cpu' into 'master'
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esp_hw_support: Add new esp_cpu.h abstraction
Closes IDF-4769
See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
2fd784c97a
G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h"
2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
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G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
a8a3756b38
hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
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This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:
- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead
Also updated soc_hal.h as follows:
- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.
This commit also updates the XCHAL_ERRATUM_572 workaround by
- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
2022-06-14 14:40:03 +08:00
Darian Leung
149872131a
hal: Move dedicated GPIO LL and HAL
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This commit moves the dedicated GPIO LL and HAL functions from
cpu_ll.h to dedic_gpio_cpu_ll.h.
- cpu_ll_enable_cycle_count() has also been removed due to lack of feasible usage scenarios
2022-06-14 14:38:29 +08:00
songruojing
c8752cee6a
clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem
2022-06-13 17:47:50 +08:00
Cao Sen Miao
6589daabb9
MMU: Add configurable mmu page size support on ESP32C2
2022-06-08 19:34:31 +08:00
Geng Yuchao
c1505d045c
Add periph_module needed for BT
2022-06-03 21:47:58 +08:00
Konstantin Kondrashov
b824f68b35
Merge branch 'feature/move_dport_workaround_to_g0' into 'master'
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dport_access: Move DPORT workaround to G0
Closes IDF-2177
See merge request espressif/esp-idf!17961
2022-06-01 12:11:12 +08:00
KonstantinKondrashov
0b22839925
hal(ecp32c2): Adds spi_flash_encrypted_ll
2022-05-31 11:12:21 +00:00
KonstantinKondrashov
ac4c7d99fe
dport: Move DPORT workaround to G0
2022-05-31 13:44:18 +08:00
morris
4352c39e3e
Merge branch 'feature/cache_c2_support' into 'master'
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cache: access error & illegal error ll functions
Closes IDF-3820
See merge request espressif/esp-idf!18203
2022-05-30 11:40:11 +08:00
Armando
8532d09259
cache: access error & illegal error ll functions
2022-05-23 15:00:47 +08:00
jiangguangming
9c6afee12f
flash mmap: abstract R/W MMU table instead of reg access
2022-05-20 16:46:27 +08:00
Omar Chebib
477bc9e64c
I2C: Fix SCL period timings on ESP targets
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The output frequency is now more accurate as the SCL period timings have been fixed.
This fix applies for ESP32, ESP32S3, ESP32C3, ESP32C2 and ESP32H2
2022-05-18 05:36:08 +00:00
morris
722fde218d
uart: add default source clock for all targets
2022-05-09 11:26:30 +08:00
Armando
49747bb486
adc: create common adc hal layer
2022-05-07 19:20:44 +08:00
Armando (Dou Yiwen)
76be0c2624
Merge branch 'bugfix/fix_esp32_mmu_init_issue' into 'master'
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mmu: add ll functions for mmu unmap
Closes OCD-526 and IDF-4962
See merge request espressif/esp-idf!17868
2022-05-05 22:21:18 +08:00
Armando
e09787d851
mmu: fix macro MMU_ENTRY_NUM and add new macro MMU_MAX_PADDR_PAGE_NUM
2022-04-27 11:35:07 +08:00
Armando
2764cd5682
mmu: simplify mmu_hal_init
2022-04-27 11:35:07 +08:00
jiangguangming
63ac5e4a99
mmu: add ll func used to invalidate the mmu entry
2022-04-27 11:35:07 +08:00
Simon
e4d85807ea
Merge branch 'feature/spi_flash_esp8684_support' into 'master'
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spi_flash: refactor spi_flash clock configuration logic and support esp32c2
Closes IDF-4474, IDF-4025, and IDF-4066
See merge request espressif/esp-idf!16602
2022-04-27 11:05:45 +08:00
Konstantin Kondrashov
df30b362a8
efuse: Validates data after burning and re-burnes it if necessary
2022-04-27 01:10:41 +08:00
Cao Sen Miao
4418a855ba
spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2
2022-04-26 15:22:37 +08:00
morris
373d9b3dbc
Merge branch 'feature/default_clk_for_gptimer' into 'master'
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clk_tree: added default clock source for peripherals (GPTimer, RMT, LCD, TempSensor)
Closes IDF-4894
See merge request espressif/esp-idf!17759
2022-04-19 18:02:40 +08:00
songruojing
534346f4bb
ledc: Provide support for esp32c2 and esp32h2
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LEDC examples, unit test, and programming guide are all updated.
2022-04-14 08:15:14 +00:00
morris
f32a89826c
clk_tree: added default clock source for peripheral
2022-04-14 15:44:56 +08:00
Armando (Dou Yiwen)
36457b1346
Merge branch 'refactor/adc_unify_adc_unit' into 'master'
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adc: adc single driver NG pre-step - unify adc_ll_num_t and adc_unit_t
See merge request espressif/esp-idf!17408
2022-03-18 20:29:36 +08:00
Armando
386363cafd
adc: unify adc_ll_num_t and adc_unit_t
2022-03-18 11:36:50 +08:00
morris
98e19b3355
Merge branch 'contrib/github_pr_8496' into 'master'
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SPI LCD support large color transfers (GitHub PR)
Closes IDFGH-6874
See merge request espressif/esp-idf!17391
2022-03-14 22:22:00 +08:00
Michael (XIAO Xufeng)
aab535fe4a
Merge branch 'bugfix/regi2c_ctrl_spinlock_s2' into 'master'
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hw_support: fixed regi2c not protected by lock on ESP32S2
See merge request espressif/esp-idf!16653
2022-03-13 02:47:53 +08:00
Michael (XIAO Xufeng)
d5bdf95580
hw_support: fixed regi2c not protected by lock on ESP32S2
2022-03-13 00:24:08 +08:00
Armando (Dou Yiwen)
6ed3ffbbf1
Merge branch 'refactor/remove_redundant_rom_cache_dependency' into 'master'
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cache: remove redundant rom cache dependency in bootloader
Closes IDF-4523
See merge request espressif/esp-idf!17077
2022-03-12 10:11:39 +08:00
Armando
c1cbd7bbf6
cache/mmu: implememnt cache and mmu hal APIs in bootloader
2022-03-11 22:43:11 +08:00
morris
2c7cfdd784
spi: define tranfer max bit length in LL
2022-03-10 13:40:43 +08:00
Sachin Parekh
bc1d35a14e
esp32c2/hal: Added ECC HAL layer
2022-03-08 14:05:23 +00:00
Sudeep Mohanty
a9fda54d39
esp_hw_support/esp_system: Re-evaluate header inclusions and include directories
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This commit updates the visibility of various header files and cleans up
some unnecessary inclusions. Also, this commit removes certain header
include paths which were maintained for backward compatibility.
2022-03-07 11:18:08 +05:30
songruojing
c8c137f2b7
esp32h2: support GPIO peripheral, IO_MUX, GPIO matrix.
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Generic GPIO example is supported as well.
2022-03-04 11:25:05 +08:00
songruojing
24a60c12c6
uart: Provide support for esp32c2 and esp32h2
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UART examples, unit test, and programming guide are all updated.
2022-03-02 11:29:13 +08:00
Kevin (Lao Kaiyao)
cc1d89ebba
Merge branch 'feature/i2c_support_on_esp8684_esp32h2' into 'master'
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i2c: support i2c on esp32c2 and esp32h2
Closes IDF-3918
See merge request espressif/esp-idf!16444
2022-02-28 13:59:02 +08:00
Konstantin Kondrashov
44e5ac2c59
Merge branch 'feature/efuse_hal' into 'master'
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hal: Adds efuse hal layer
See merge request espressif/esp-idf!16354
2022-02-28 13:38:43 +08:00
KonstantinKondrashov
9605f3eb1a
soc: Adds efuse hal
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Replaced eFuse ROM funcs with hal layer
2022-02-24 22:20:09 +08:00
Alexey Gerenkov
dea45a9d72
riscv: Use semihosting to set breakpoint and watchpoint when running under debugger
2022-02-24 08:55:40 +00:00
laokaiyao
cf353c505a
i2c: support esp32h2
2022-02-23 15:19:37 +08:00
laokaiyao
7da023ceae
i2c: support esp32c2
2022-02-23 15:19:37 +08:00
Marius Vikhammer
06d8a5bf33
Merge branch 'bugfix/inline_intrmask_from_isr' into 'master'
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freertos: always inline xPortSetInterruptMaskFromISR and vPortClearInterruptMaskFromISR
Closes IDFGH-6669
See merge request espressif/esp-idf!16970
2022-02-23 01:05:40 +00:00
Marius Vikhammer
ca6f76d831
spi flash: fix cache accessed while disabled issues at -O0
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mask_get_id and gpio_hal_iomux_func_sel were called while cache
is disabled, but were not inlined as expected at -0O.
Force these functions to always be inlined.
2022-02-07 11:33:33 +08:00
laokaiyao
c4cfb654d2
uart: support light sleep on esp32s3
2022-01-25 17:43:02 +08:00
laokaiyao
cf049e15ed
esp8684: rename target to esp32c2
2022-01-19 11:08:57 +08:00