Commit Graph

1399 Commits

Author SHA1 Message Date
morris
7863c1bc45 Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
Bugfix/fix rtc freq err for h2 beta1

See merge request 
2022-07-04 16:46:17 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
GengYuchao
10fd1daa10 Add ETM clk gate defines for h2 2022-06-30 17:02:00 +08:00
Armando (Dou Yiwen)
e13d7f8351 Merge branch 'bugfix/s2_ap64_psram_crash_issue' into 'master'
psram: fix esp32s2 module with APS6404 PSRAM crash issue

Closes IDF-5361

See merge request 
2022-06-29 11:19:17 +08:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00
morris
7fd9a91034 dma: move from driver to hw_support 2022-06-28 14:17:12 +08:00
Mahavir Jain
c619e2162d Merge branch 'feature/memprot_settings_to_soc_caps' into 'master'
esp_system: move MEMPROT related configuration to soc capability header

Closes IDF-4506

See merge request 
2022-06-24 18:08:19 +08:00
Mahavir Jain
dd24639215 Merge branch 'esp32h2/enable_ecc_accelerator' into 'master'
esp32h2: Enable ECC accelerator

Closes IDF-3397

See merge request 
2022-06-23 20:06:26 +08:00
Cao Sen Miao
3a820462ac temperature_sensor: Add temperature sensor support for ESP32-C2 2022-06-23 15:36:43 +08:00
Sachin Parekh
6cfc9c365f esp32h2: Enable ECC accelerator 2022-06-23 12:59:13 +05:30
Marius Vikhammer
7e60e07a0a Merge branch 'feature/esp8684_sha' into 'master'
mbedtls: enable hw support for SHA on C2

Closes IDF-3830 and IDF-5141

See merge request 
2022-06-23 14:18:49 +08:00
Mahavir Jain
0a12eab32e
esp_system: move MEMPROT related configuration to soc capability header
Closes IDF-4506
2022-06-23 10:29:42 +05:30
Marius Vikhammer
f4c79687f8 SHA: added hardware support for SHA on C2. 2022-06-23 11:01:16 +08:00
Zim Kalinowski
136c873364 Merge branch 'refactor/g0_for_xtensa' into 'master'
G0: Support Xtensa targets for G0-only compilation

Closes IDF-3087

See merge request 
2022-06-23 07:28:37 +08:00
muhaidong
96f86e0bb4 esp_wifi: esp32c2 does not support wifi mesh 2022-06-21 16:48:52 +08:00
muhaidong
b48b9beace esp_wifi: esp32c2 does not support csi. 2022-06-20 21:47:51 +08:00
muhaidong
9a25d06b5f esp_wifi: esp32s2 esp32c3 and esp32s3 support ftm 2022-06-20 21:47:51 +08:00
morris
865937fba3 Merge branch 'bugfix/fix_esp32c2_dose_not_support_wapi' into 'master'
esp_wifi: esp32c2 does not support wapi

Closes IDF-4216

See merge request 
2022-06-20 21:31:54 +08:00
muhaidong
2ccce0ca41 esp_wifi: update comments of WI-FI CAPS in soc_caps.h 2022-06-20 19:43:16 +08:00
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Martin Vychodil
692b9980b5 Merge branch 'feature/memprot_api_unified_s3_2' into 'master'
System/Security: Memprot API unified (ESP32S3)

See merge request 
2022-06-20 17:34:22 +08:00
muhaidong
6ca2804107 esp_wifi: esp32c2 does not support wapi. 2022-06-20 11:42:12 +08:00
Martin Vychodil
339fcbf14d System/Security: Memprot API unified (ESP32S3)
Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
Ivan Grokhotkov
3973db7664
soc: make register access macros compatible with C++20
In C++20, using the result of an assignment to a 'volatile' value is
deprecated.

Breaking change: register "setter" or modification macros can no
longer be used as expressions.

Closes https://github.com/espressif/esp-idf/issues/9170
2022-06-17 18:09:22 +02:00
morris
381b4cb26f Merge branch 'bugfix/undefined_dport_lvl_def' into 'master'
soc(esp32): Expose SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL for all ECO versions

Closes IDFGH-7606

See merge request 
2022-06-16 15:00:24 +08:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request 
2022-06-16 11:53:39 +08:00
KonstantinKondrashov
f428a241c6 soc(esp32): Expose SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL for all ECO versions
It fixes a build issue when ESP32_ECO3_CACHE_LOCK_FIX=y

Closes https://github.com/espressif/esp-idf/issues/9160
2022-06-15 17:42:21 +08:00
laokaiyao
28b8fc6a7e i2s: update documents for driver-NG 2022-06-15 10:30:04 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master'
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request 
2022-06-14 21:11:30 +08:00
morris
919344547b Merge branch 'bugfix/rmt_register_file_s3' into 'master'
rmt: update register file after fixing csv of RMT peripheral (esp32s2/s3)

Closes IDFGH-7537

See merge request 
2022-06-14 18:24:28 +08:00
Michael (XIAO Xufeng)
7b8e5888ca Merge branch 'refactor/add_clk_tree_ll' into 'master'
clk_tree: Stage3 - HAL for clock subsystem

Closes IDF-4334

See merge request 
2022-06-14 17:16:29 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Konstantin Kondrashov
7d942e0a5d Merge branch 'feature/efuse_rst_is_treated_as_poweron_rst' into 'master'
reset_reasons: EFUSE_RST is treated as POWERON_RST + checks errors of eFuse BLOCK0

Closes IDF-3702

See merge request 
2022-06-13 21:26:13 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
morris
4094f13fd3 rmt: fix error in rmt register file
Closes https://github.com/espressif/esp-idf/issues/9100
2022-06-10 18:38:42 +08:00
morris
5daa73d236 Merge branch 'refactor/mcpwm_hal_driver_doc' into 'master'
mcpwm: don't support disable carrier one-shot pulse

Closes IDFGH-7406

See merge request 
2022-06-10 10:28:59 +08:00
KonstantinKondrashov
46f0313d6b reset_reasons: EFUSE_RST is treated as POWERON_RST
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
2022-06-09 17:49:03 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
Michael (XIAO Xufeng)
773715d900 Merge branch 'feature/support_refresh_brownout_v1' into 'master'
spi_flash: send reset when brownout detected on XMC flash

Closes IDF-3882

See merge request 
2022-06-06 16:27:58 +08:00
Mahavir Jain
2acab7c783 Merge branch 'feature/c2_rng_support' into 'master'
esp32c2: Add support for RNG

Closes IDF-4021

See merge request 
2022-06-06 12:38:28 +08:00
Jiang Jiang Jian
b617ccfb4c Merge branch 'feature/esp32c2_eco1_bluetooth_update_0525_for_MR' into 'master'
Support bluetooth for esp32c2 chip

See merge request 
2022-06-04 17:35:17 +08:00
Michael (XIAO Xufeng)
d798662421 Merge branch 'bugfix/s3_sleep_voltage' into 'master'
esp32s3: fixed dangerous power parameters in sleep modes

See merge request 
2022-06-04 00:47:32 +08:00
Geng Yuchao
8012af37d1 Fix soc caps for BT 2022-06-03 21:45:40 +08:00
morris
f7ff7ac4d0 mcpwm: clean up hal driver and add doc 2022-06-02 15:01:18 +08:00
Sachin Parekh
8ad3f2ba57 esp32c2: Add support for RNG 2022-06-02 11:36:23 +08:00
Cao Sen Miao
6a2d3509dc spi_flash: Making XMC flash works more stable when brownout detected 2022-06-02 10:38:55 +08:00
chaijie
e624206ca6 modify voltage param to fit all mode of S3 2022-06-01 21:03:54 +08:00
Michael (XIAO Xufeng)
ab69df3ea7 esp32s3: fixed dangerous power parameters in sleep modes 2022-06-01 21:03:54 +08:00
Konstantin Kondrashov
b824f68b35 Merge branch 'feature/move_dport_workaround_to_g0' into 'master'
dport_access: Move DPORT workaround to G0

Closes IDF-2177

See merge request 
2022-06-01 12:11:12 +08:00
Konstantin Kondrashov
f1d3332eea Merge branch 'bugfix/c3_efuse_fail_bits' into 'master'
soc: Fix efuse fail bits

See merge request 
2022-05-31 21:11:30 +08:00
KonstantinKondrashov
c5a4ab39a7 soc: Fix description of efuse fail bits 2022-05-31 11:21:24 +00:00
KonstantinKondrashov
0b22839925 hal(ecp32c2): Adds spi_flash_encrypted_ll 2022-05-31 11:12:21 +00:00
KonstantinKondrashov
505e18237a bootloader: Support Flash Encryption for ESP32-C2 2022-05-31 11:12:21 +00:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Island
74b7a3fc83 Merge branch 'feature/final_h2_bluedroid_skc_common' into 'master'
Feature/final h2 bluedroid skc common

See merge request 
2022-05-30 21:20:52 +08:00
Jiang Jiang Jian
2bc5d58807 Merge branch 'feature/support_sleep_for_esp32c2' into 'master'
esp32c2: support power management

Closes IDF-4440 and IDF-4617

See merge request 
2022-05-30 17:57:18 +08:00
satish.solanke
3a42007680 Bluedroid porting changes for esp32h2
created common Kconfig for common flag of nimbble and Bluedroid

fix compile error

created common cfg file for controller

fix the compilation error on tip of master

added common controller flags and fixed compilation error

sdkconfig rename for target specific
2022-05-30 08:42:45 +00:00
jingli
93a5087e58 add PM related soc caps about power down rtc slow/fast mem
Supporting rtc slow/fast mem does not mean supporting
rtc slow/fast mem power down.
2022-05-30 15:26:50 +08:00
Jiang Jiang Jian
0e94779b2e Merge branch 'feature/support_esp32c2_wifi_new' into 'master'
Bringup ESP32C2 Wi-Fi

Closes IDF-3905

See merge request 
2022-05-29 18:25:24 +08:00
Jiang Jiang Jian
f3922f1b7f Merge branch 'feature/flash_mmap_refactor' into 'master'
flash mmap: abstract R/W of MMU table instead of reg access

See merge request 
2022-05-29 13:56:37 +08:00
Wu Zheng Hui
b98622c624 efuse: update efuse name 2022-05-28 22:03:16 +08:00
Jessy Chen
7b9b448041 esp_wifi: optimize wifi kconfig 2022-05-28 08:52:55 +00:00
Jessy Chen
0ae391ef07 esp_wifi: enable FTM for esp32c2 & fix pre-commit check 2022-05-28 08:52:55 +00:00
zhangyanjiao
e979e9701f esp_wifi: bringup esp32c2 wifi 2022-05-28 08:52:55 +00:00
jingli
ae127b04cd fix ld err since esp32c2 do not suport config gpio of spi flash via efuse 2022-05-27 19:29:38 +08:00
jingli
9eec740a16 enable external 32k osc for esp32c2 2022-05-27 19:29:29 +08:00
Song Ruo Jing
cf32e49aeb Merge branch 'refactor/cleanup_rtc_h' into 'master'
clk_tree: Prework2 of introducing clock subsystem control

Closes IDF-4934

See merge request 
2022-05-26 09:16:47 +08:00
Sachin Parekh
9a763f4ff2 esp32c2: Enable IRAM/DRAM split using PMP 2022-05-24 21:36:06 +05:30
songruojing
74c99a8a07 rtc_clk: Add alias for the clock tree related enum and macros for backwards compatibility 2022-05-24 22:59:51 +08:00
songruojing
729d70129a clk_tree: add initial docs for clock tree 2022-05-24 22:59:51 +08:00
morris
b26cd91537 doc: added clk_tree definitions to doc 2022-05-24 22:59:51 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
laokaiyao
a5f651ad71 i2s: Update FIFO direct access reg on ESP32 according to the TRM
Closes: https://www.github.com/espressif/esp-idf/issues/8862
2022-05-23 16:28:42 +08:00
jiangguangming
42bc0b0643 soc: remove unused MMU related macros 2022-05-20 16:46:28 +08:00
jiangguangming
9c6afee12f flash mmap: abstract R/W MMU table instead of reg access 2022-05-20 16:46:27 +08:00
Michael (XIAO Xufeng)
0adb814af3 Merge branch 'bugfix/fix_memory_miss_bug_esp32c3_esp32s3' into 'master'
ESP32C3/ESP32S3: Fix cpu crash bug  when wakeup from lightsleep for memory data miss

Closes IDF-162 and IDF-4923

See merge request 
2022-05-18 12:05:08 +08:00
Michael (XIAO Xufeng)
adcdcbaa0e Merge branch 'feat/pm_dbias_refactoring' into 'master'
pm: refactoring dbias related code

See merge request 
2022-05-17 14:42:16 +08:00
chaijie
cc0a5a4edb solve memory error bug when in lightsleep mode 2022-05-16 11:43:00 +08:00
Michael (XIAO Xufeng)
6f507d527c rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
2022-05-14 22:35:41 +08:00
Michael (XIAO Xufeng)
234628b3ea pm: putting dbias and pd_cur code into same function 2022-05-14 02:35:11 +08:00
Jing Li
ac0d16cdc8 Merge branch 'bugfix/fix_cannot_lslp_again_after_ulp_wakeup' into 'master'
sleep: fix cannot lightsleep again after a wakeup from ULP

Closes IDFGH-4396

See merge request 
2022-05-13 22:25:23 +08:00
jingli
abb6bb1181 esp_hw_support/sleep: fix cannot enable sleep reject in some cases
When enable sleep reject before this fix, we have two limitations:
1. it must be light sleep
2. RTC GPIO wakeup source must be set

We require light sleep because `esp_deep_sleep_start` function has
been declared with "noreturn" attribute, So developers don't expect
that this function may return (due to an error or a sleep reject).
But the requirement for RTC GPIO wakeup source is not reasonable for
all chips. This requirement exists because ESP32 only supports RTC GPIO
and SDIO sleep reject sources. But later chips support all sleep reject
sources.

This fix brings the following changes:
for ESP32: RTC GPIO and SDIO sleep reject sources can be enabled
           when corresponding wakeup source is set.

for later chips: all sleep reject sources can be enabled when
                 corresponding wakeup source is set.
2022-05-12 19:09:57 +08:00
Marius Vikhammer
c8617fe965 docs: fix all doxygen warnings
Doxygen warnings would previously not result in a failed pipeline.
Fixed this as well as all current warnings.
2022-05-12 14:50:03 +08:00
Michael (XIAO Xufeng)
36074b9812 pm: add powerdown for int_8m on ESP32-C2 and ESP32-H2
Also move the xtal fpu logic to sleep_modes.c
2022-05-11 11:36:34 +08:00
Michael (XIAO Xufeng)
2905cbbe03 pm: fixed RTC8M domain power issues
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
2022-05-11 11:30:47 +08:00
morris
523c51818c Merge branch 'feature/c2_soc_hwsupport_code' into 'master'
ESP32-C2 (729) RTC update (Clock, PM)

Closes IDF-3833 and IDF-4874

See merge request 
2022-05-11 11:23:57 +08:00
morris
df5872b3a4 Merge branch 'feature/support_i2c_on_esp32h2' into 'master'
i2c: support i2c on esp32h2

Closes IDF-4155

See merge request 
2022-05-10 22:48:05 +08:00
zlq
6336f8191e C2 rtc code 2022-05-09 17:50:54 +08:00
morris
722fde218d uart: add default source clock for all targets 2022-05-09 11:26:30 +08:00
Armando (Dou Yiwen)
03aeac1dde Merge branch 'refactor/adc_hal_common_layer' into 'master'
adc: create common adc hal layer

See merge request 
2022-05-08 15:45:56 +08:00
Armando
49747bb486 adc: create common adc hal layer 2022-05-07 19:20:44 +08:00
morris
2fb43820c2 driver_ng: implement new rmt driver
The legacy driver can't handle the breaking change between esp chips

very well.

And it's not elegant to extend new feature like DMA, ETM.

The new driver can return a opaque handle for each RMT channel.

An obvious transaction concept was also introduced.

TX and RX functionalities are splited out.
2022-05-07 10:34:50 +00:00
morris
3f66660444 Merge branch 'feature/bringup_esp32c2eco1' into 'master'
esp32c2:ECO1 ROM update

Closes IDF-4933

See merge request 
2022-05-06 18:06:26 +08:00
Simon
0b00831703 Merge branch 'bugfix/i2c_timeout_issue' into 'master'
I2C: Patch for solving watchdog timeout issue

Closes IDFGH-6923, IDFGH-6463, and IDFGH-5558

See merge request 
2022-05-06 10:38:38 +08:00
Armando (Dou Yiwen)
76be0c2624 Merge branch 'bugfix/fix_esp32_mmu_init_issue' into 'master'
mmu: add ll functions for mmu unmap

Closes OCD-526 and IDF-4962

See merge request 
2022-05-05 22:21:18 +08:00
wuzhenghui
17b3d139d5 hal: use systimer HAL IMPL in ESP32C2 ROM 2022-05-05 17:41:11 +08:00
wuzhenghui
b530632f33 esp32c2: fix soc_caps defines 2022-05-05 17:41:11 +08:00
Cao Sen Miao
9a9f10e4c9 I2C: patch for solving watchdog timeout issue 2022-05-05 14:36:49 +08:00
morris
9ab4abfb46 hw_support: move rtc_ctrl from driver to hw_support 2022-04-29 14:28:09 +08:00