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535 Commits

Author SHA1 Message Date
Cao Sen Miao
67b4ba33dd spi_flash: add support for th 1M flash 2022-01-10 12:39:09 +08:00
Jakob Hasse
ee24264c75 feat (bootloader): added rng sampling 
Set maximum RNG query frequency to save value known from tests
 2022-01-03 16:24:41 +05:30
Aditya Patwardhan
2a2d8f5cbc efuse_example_test: Fix the example test 
*Unify the log messages when UART ROM Download mode is kept enabled
 2021-12-08 16:11:59 +08:00
Aditya Patwardhan
2c0081b286 secure_boot: Fix warning when UART ROM DL mode is disabled 
*Additionally use updated calls to enable rom secure download mode
 2021-12-08 16:11:59 +08:00
Mahavir Jain
5f7037d143 bootloader: add anti-FI checks around secure version in anti-rollback scheme 2021-11-29 18:49:22 +05:30
Gustavo Henrique Nihei
6f6538f053 bootloader_support: Fix unused-but-set-variable compiler warning 
When building with BOOTLOADER_LOG_LEVEL lesser then VERBOSE, an error
code variable was being set but not consumed, resulting in a compiler
warning.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-11-26 01:34:42 -03:00
Gustavo Henrique Nihei
d21ef9b10a bootloader_support: Fix unused-variable compiler warning 
Builds for every chip other than ESP32 resulted in a compiler warning
due to "drom_load_addr_aligned" and "irom_load_addr_aligned" not being
used, besides being possible to actually reuse them.
Furthermore, extended the logic for the other similar variables.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-11-26 01:34:40 -03:00
Gustavo Henrique Nihei
18dc2cfcc2 bootloader_support: Fix and re-enable bootloader_debug_buffer function 
The body of the bootloader_debug_buffer function was conditioned to
macros that were never defined, resulting in deactivated code.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-11-23 09:01:24 -03:00
Mahavir Jain
214d2eeba7 Merge branch 'bugfix/manual_secure_boot_v2_multiple_digest_issue_v4.4' into 'release/v4.4' 
secure_boot_v2: fix issue in pre-flashed digest (manual) workflow (v4.4)

See merge request espressif/esp-idf!15780
 2021-11-10 04:22:55 +00:00
Sachin Parekh
2f39639c20 secure_boot: Do not allow key revocation in bootloader 2021-11-09 15:19:47 +05:30
Mahavir Jain
4ac351247d secure_boot_v2: fix issue in pre-flashed digest (manual) workflow 
This commit fixes issue where empty (unprogrammed) digest slot out of
multiple supported (e.g. 3 for ESP32-C3) could cause issue in
workflow enablement process.

Notes:

1. This issue was applicable for chips supporting "secure-boot-v2"
scheme with multiple digests slots
2. This issue was affecting only manual workflow, where digest of
public was pre-flashed in efuse
3. Change in "flash_encrypt.c" is only for additional safety purpose
 2021-11-08 12:48:12 +08:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Sachin Parekh
bf1dde7233 bootloader: Enable clock glitch detection 
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
 2021-09-02 12:25:12 +05:30
Yuriy Shestakov
87b958c814 Fixed GLITCH_RTC_RST for esp32-c3 revision 3 
* Issue: https://github.com/espressif/esp-idf/issues/7082

Signed-off-by: Yuriy Shestakov <yshestakov@gmail.com>

Closes https://github.com/espressif/esp-idf/issues/7082
Closes https://github.com/espressif/esp-idf/pull/7441
 2021-09-02 12:25:12 +05:30
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support 
brownout init fixed
 2021-08-25 11:02:47 +08:00
Armando (Dou Yiwen)
3e172289b0 Merge branch 'feature/support_octal_flash_120m_str_mode_on_esp32s3' into 'master' 
mspi: support octal flash 120MHz STR mode on esp32s3

Closes IDF-3146

See merge request espressif/esp-idf!14668
 2021-08-20 08:40:02 +00:00
Mahavir Jain
85e1258178 Merge branch 'esp32s3/secure_boot' into 'master' 
bootloader: Enable Secure boot V2 for ESP32-S3

Closes IDF-1787

See merge request espressif/esp-idf!14873
 2021-08-20 06:44:19 +00:00
Michael (XIAO Xufeng)
7649db9712 draft: another patch.. 2021-08-19 17:02:58 +08:00
Sachin Parekh
2d82560ed5 bootloader: Enable Secure boot V2 for ESP32-S3 2021-08-19 14:08:12 +05:30
Armando
d325f4d557 mspi: support octal flash 120M STR mode on esp32s3 2021-08-19 10:44:30 +08:00
Michael (XIAO Xufeng)
8dcfa1b384 spi_flash: fix the corruption of ROM after calling bootloader_execute_flash_command 
The user register, especially dummy related ones, needs to be restored, otherwise the ROM function will not work.

Introduced in dd40123129.
 2021-08-18 23:55:39 +08:00
Mahavir Jain
012c9e26a4 Merge branch 'fixes/secure_boot' into 'master' 
secure_boot/esp32(s2,c3): Disable read protecting of efuses

See merge request espressif/esp-idf!14769
 2021-08-17 05:05:00 +00:00
Michael (XIAO Xufeng)
a0d2efe1be Merge branch 'bugfix/xmc_overerase' into 'master' 
bootloader: add xmc spi_flash startup flow to improve reliability

See merge request espressif/esp-idf!13895
 2021-08-13 15:27:48 +00:00
Sachin Parekh
f430e86c0f secure_boot/esp32(s2,c3): Disable read protecting of efuses 
When secure boot is enabled, disable the ability to read protect
efuses that contain the digest.
 2021-08-13 13:41:59 +05:30
Michael (XIAO Xufeng)
dd40123129 bootloader: add xmc spi_flash startup flow to improve reliability 2021-08-12 17:22:42 +08:00
KonstantinKondrashov
3cf4fbc150 efuse(esp32s2): Added flash_ver, psram_ver, pkg_ver efuses 2021-08-06 13:14:54 +08:00
Omar Chebib
779e7400b0 uart: uart_set_pin function will now use IOMUX whenever possible 
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
 2021-08-04 12:48:30 +08:00
Cao Sen Miao
c29b3e2e36 spi_flash: move the unlock patch to bootloader and add support for GD 2021-07-29 10:46:33 +08:00
KonstantinKondrashov
92448e7bd7 secure_boot: Whole 3 bits are set for SOFT_DIS_JTAG eFuse 2021-07-21 17:19:01 +05:00
Marius Vikhammer
03545feaea Merge branch 'feature/s3_flash_enc' into 'master' 
S3 Flash encryption bringup

Closes IDF-1786 and IDF-2576

See merge request espressif/esp-idf!14259
 2021-07-19 08:56:50 +00:00
Omar Chebib
a7b6ec85b8 Merge branch 'feature/move_memory_layout_to_heap' into 'master' 
G0: Memory layouts are now part of heap components

Closes IDF-1264

See merge request espressif/esp-idf!14028
 2021-07-19 06:23:19 +00:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master' 
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
 2021-07-18 08:06:38 +00:00
Angus Gratton
1a626ef6ca esp32: App can boot on FPGA image 
Includes fix for detecting ESP32 ECO3 on FPGA
 2021-07-16 10:50:06 +10:00
Angus Gratton
192b5925da bootloader: Can boot to IDF scheduler start on internal-use FPGA 
On ESP32 & ESP32-S2. Patch doesn't include changes to make the app run fully.
 2021-07-16 10:50:06 +10:00
Omar Chebib
c4f57af6c9 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
Marius Vikhammer
b8a322195e flash encryption: add flash encryption support for ESP32-S3 2021-07-14 18:46:17 +08:00
Omar Chebib
b967dc0dbf espsystem: add support for RISC-V panic backtrace 
Add .eh_frame and .eh_frame_hdr sections to the binary (can be
enabled/disabled within menuconfig). These sections are parsed
when a panic occurs. Their DWARF instructions are decoded and
executed at runtime, to retrieve the whole backtrace. This
parser has been tested on both RISC-V and x86 architectures.

This feature needs esptool's merge adjacent ELF sections feature.
 2021-07-13 15:42:40 +08:00
morris
3e2d98500f Merge branch 'refactor/common_rom_rtc_apis' into 'master' 
soc: define reset reasons in soc component

Closes IDF-1993

See merge request espressif/esp-idf!9829
 2021-07-13 07:05:25 +00:00
Angus Gratton
d7d28786b2 Merge branch 'bugfix/secure_boot_sig_verify' into 'master' 
secure boot: Fix incorrect handling of mbedtls_ctr_drbg_seed() failure in signature verification

See merge request espressif/esp-idf!14300
 2021-07-13 06:48:25 +00:00
Angus Gratton
4fe4df8770 Merge branch 'feature/bootloader_pin_level_pr7089' into 'master' 
bootloader: Add configurable pin level for factory reset (PR)

Closes IDFGH-5337

See merge request espressif/esp-idf!13956
 2021-07-13 05:39:25 +00:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
Angus Gratton
e3ca61a200 secure boot: Fix incorrect handling of mbedtls_ctr_drbg_seed() failure in signature verification 
Increase the test app optimization level to one that would find this issue.
 2021-07-08 19:17:04 +10:00
Marius Vikhammer
71c1da8952 timer group: add timer group and WDT support for ESP32S3 
Regenerate timer group header files and update LL, check examples
and update docs.
 2021-07-06 16:21:43 +08:00
Angus Gratton
6bbb58c8c2 bootloader: Small cleanup and docs for factory reset level config 
- Add to docs & config descriptions
- Change to a "choice" to become self-documenting
- Keep the bootloader_common_check_long_hold_gpio() function for compatibility
 2021-07-05 12:08:36 +08:00
chegewara
fb7234a13d bootloader: Add selectable level for factory reset pin 
Closes https://github.com/espressif/esp-idf/pull/7089
 2021-07-05 12:08:36 +08:00
Shu Chen
75bd02bd46 esp32h2: add some more fixes and TODOs 2021-07-01 20:36:39 +08:00
Shu Chen
2df4ddf998 esp32h2: fixes after rebase 2021-07-01 19:53:50 +08:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
c0056813f2 esp32h2: add bootloader support 2021-07-01 19:53:11 +08:00
Michael (XIAO Xufeng)
afc2bc94b3 Merge branch 'feature/add_opi_flash_psram_support' into 'master' 
spi flash: opi flash psram support and spi timing tuning  support on 727

Closes IDF-3097

See merge request espressif/esp-idf!12946
 2021-06-28 01:59:19 +00:00
Armando
bc248278f8 spiflash: add octal spi psram support on 727 2021-06-25 19:41:57 +08:00
Cao Sen Miao
f2fe0847d5 usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now 2021-06-18 12:42:41 +08:00
KonstantinKondrashov
57c7ebc4bc flash_encrypt: Adds API to switch flash encryption "Development" to "Release" 2021-06-17 12:58:04 +05:00
Konstantin Kondrashov
f339b3fc96 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 
These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
 2021-06-17 07:21:36 +08:00
Angus Gratton
6961e4b3d5 Merge branch 'bugfix/ulp_overflow_rtc_mem' into 'master' 
ulp: ULP_COPROC_RESERVE_MEM limitation

See merge request espressif/esp-idf!13814
 2021-06-08 07:20:46 +00:00
Michael (XIAO Xufeng)
e005ec0899 Merge branch 'feature/s3_base_support' into 'master' 
soc: S3 base support

See merge request espressif/esp-idf!13827
 2021-06-07 12:07:08 +00:00
Angus Gratton
0f1b24891b Merge branch 'bugfix/esp32_u4wdh_quad_io' into 'master' 
bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip

Closes IDFGH-4353

See merge request espressif/esp-idf!13111
 2021-06-07 04:50:54 +00:00
Marius Vikhammer
19a492bc8d soc: add base support for ESP32-S3 
Updates the following with changes from verification branches:

 * esp_rom linker files
 * rtc_cntl and system reg and struct headers

Also updates:
 * GDMA driver with new register layout
 * esptool submodule commit
 2021-06-07 10:40:14 +08:00
Marius Vikhammer
2f705136e9 bootloader: fix verify_load_addresses wrongly reporting "bad load address range" 
verify_load_addresses would check if load_end was in a certain member range,
but should verify (load_end - 1) which is the actual last byte.
 2021-06-04 12:15:52 +08:00
Jan Brudný
dffe49f305 bootloader: update copyright notice 2021-06-02 14:22:09 +02:00
Angus Gratton
f486736cbf bootloader: Fix "skip validate in deep sleep" on ESP32 & ESP32-S2 
Regression in 83bf2e1ac1, this memory region was shifted from fast to slow RTC
memory (no change on ESP32-C3 as no RTC fast memory on this chip.)
 2021-06-01 18:58:55 +10:00
KonstantinKondrashov
071e00a088 bootloader: Fix a wrong offset in image_load after refactoring 2021-05-26 18:06:11 +08:00
Angus Gratton
e928d57663 Merge branch 'doc/include_bootloader_random' into 'master' 
docs: Add RNG functions to API reference

See merge request espressif/esp-idf!13519
 2021-05-20 09:14:55 +00:00
Angus Gratton
e886aa1da4 Merge branch 'update_copyright_notice_bootloader_support' into 'master' 
bootloader: update copyright notice, part 2

See merge request espressif/esp-idf!13495
 2021-05-19 00:26:35 +00:00
Angus Gratton
e14edecf5f docs: Add random number generation to the API Reference System section 2021-05-18 16:05:42 +10:00
Angus Gratton
ede477ea65 paritition_table: Verify the partition table md5sum when loading the app 
Additionally, always enable the partition MD5 check if flash encryption is on in
Release mode. This ensures the partition table ciphertext has not been modified
(CVE-2021-27926).

The exception is pre-V3.1 ESP-IDF bootloaders and partition tables, which
don't have support for the MD5 entry.
 2021-05-18 01:32:59 +00:00
Cao Sen Miao
8c5819dccb usb_serial_jtag: fix the bug that cannot write with usb_jtag 2021-05-13 13:40:01 +08:00
Jiang Jiang Jian
3c30e688c4 Merge branch 'feature/support_auto_adjust_voltage_storingInEfuse_openGlitchRst' into 'master' 
ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3

See merge request espressif/esp-idf!13395
 2021-05-13 03:49:59 +00:00
Angus Gratton
3f0851a22c Merge branch 'doc/esp_random' into 'master' 
esp_hw_support: Clarify the documentation about hardware RNG entropy

Closes IDF-73

See merge request espressif/esp-idf!13454
 2021-05-11 01:37:37 +00:00
Jan Brudný
a2686dc4eb bootloader: update copyright notice 2021-05-10 04:58:34 +02:00
chaijie
eea76d14bb ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3 
1. add some efuse api to get rtc & digital voltage
2. set dig_rtc voltage to a fix value storing in efuse no mater which cpu frequency
3. modify hardware code in bootloader to fit all c3 ECO3 version
 2021-05-08 17:56:54 +08:00
Angus Gratton
84f2f2932d Merge branch 'bugfix/esp_partition_get_sha256' into 'master' 
bootloader_support: Fix bootloader_common_get_sha256_of_partition when CHECK_SIGNATURE is on

Closes IDFGH-5089

See merge request espressif/esp-idf!12795
 2021-05-07 23:34:56 +00:00
Angus Gratton
4d4e094d81 esp_hw_support: Clarify the documentation about hardware RNG entropy 2021-05-06 16:59:02 +10:00
Michael (XIAO Xufeng)
58490418ad Merge branch 'feature/merge_c3_caps' into 'master' 
soc: merge C3 caps into a single soc_caps.h

See merge request espressif/esp-idf!13337
 2021-05-06 05:56:42 +00:00
KonstantinKondrashov
ca481e18e1 bootloader_support: Used esp_image_get_metadata() instead of esp_image_verify() 
- bootloader_common_get_sha256_of_partition will not do any unnecessery verifies.
- Used esp_image_get_metadata() instead of esp_image_verify().
 2021-05-05 11:53:57 +00:00
KonstantinKondrashov
d9be32629e bootloader: Fixed a case when signed OTA updates fail when debugger is attached due to the wrong image_len. 
And it fixed another case for bootloader_common_get_sha256_of_partition() when CHECK_SIGNATURE is on
- If RSA signature check is on in Kconfig then sha256 was 0xFFFFF...
because image_load gave image_len which pointed to the end of sign blocks.
And image_digest was filled from a wrong position.

Closes https://github.com/espressif/esp-idf/issues/6873
 2021-05-05 11:53:57 +00:00
Jeroen Domburg
2c75f63f89 * ets_delay_us(1) has too much overhead; change logic 
* Fix MR comments
 2021-04-28 16:38:24 +08:00
Marius Vikhammer
504a1e6102 soc: merge C3 caps into a single soc_caps.h 2021-04-28 14:42:35 +08:00
Shubham Patil
c2b0db75e8 bootloader_support: Fix min size of OTA partition in error log 2021-04-22 14:00:42 +05:30
Mahavir Jain
a4f38db53d
bootloader_support: fix min. revision error print for < C3-ECO3 revisions 2021-04-20 14:22:14 +05:30
Mahavir Jain
f9699e2412
bootloader: fix print related to min. chip revision 
Closes https://github.com/espressif/esp-idf/issues/6890
Closes IDFGH-5106
 2021-04-20 14:19:17 +05:30
Angus Gratton
83bf2e1ac1 bootloader: Fix "skip validate on exit deep sleep" when "Use RTC fast memory as heap" is enabled 
RTC region used to store boot partition needs to remain reserved in the app.
 2021-04-15 16:20:58 +10:00
KonstantinKondrashov
9f932a2a18 bootloader: Fix error in Make build system when signature options is on 2021-04-13 11:28:13 +00:00
Michael (XIAO Xufeng)
8cfcf6da7a Merge branch 'bugfix/enable_gpio18_gpio19_esp32c3' into 'master' 
gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3

Closes IDF-2964

See merge request espressif/esp-idf!12753
 2021-04-12 09:39:55 +00:00
Angus Gratton
268b23db96 bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip 
Closes https://github.com/espressif/esp-idf/issues/6191
 2021-04-12 18:49:17 +10:00
Omar Chebib
cd79f3907d gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3 
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
 2021-04-08 14:01:18 +08:00
Angus Gratton
70cab5bd81 Merge branch 'bugfix/ulp_riscv_unintended_wake' into 'master' 
ulp: unintended wakeup in ulp_riscv

See merge request espressif/esp-idf!12894
 2021-04-08 01:52:41 +00:00
chaijie
c101fc3e3d fix c3 hardware bug before ECO3 and optimizate bbpll config: 
1. deepsleep poweron reset bug in high temperature before ECO3;
2. brownout reset bug before ECO2;
3. bbpll voltage low bug before ECO3;
4. need xpd iph for xtal before ECO3;
 2021-03-31 13:08:56 +00:00
Renz Bagaporo
3639c2322b ulp: clear rtc int at initialization 
Closes https://github.com/espressif/esp-idf/issues/6654
 2021-03-31 17:15:55 +08:00
Mahavir Jain
531f14aa31 Merge branch 'feature/secure_boot_v1_add_tip_msg' into 'master' 
secure_boot_v1: Adds a help message in case when sig_block.version is not valid

Closes IDFGH-4982

See merge request espressif/esp-idf!12916
 2021-03-26 04:24:13 +00:00
KonstantinKondrashov
7f40717eb2 secure_boot/SIGNED_ON_UPDATE_NO_SECURE_BOOT: Only the first position of signature blocks is used to verify any update 2021-03-25 12:27:05 +00:00
KonstantinKondrashov
cbbd1e88a5 secure_boot_v1: Adds a help message in case when sig_block.version is not valid 
if sig_block.version is not valid then probably the image without a signature.
 2021-03-25 20:01:52 +08:00
Angus Gratton
fa2946d651 Merge branch 'feature/support_esp32s3_beta_3' into 'master' 
Support ESP32S3 beta 3 target

Closes IDF-2908

See merge request espressif/esp-idf!12661
 2021-03-23 10:17:58 +00:00
Marius Vikhammer
2aead8ba57 Support ESP32S3 Beta 3 target 
Update ROM API. Port changes from bringup branch.
 2021-03-18 10:24:22 +08:00
KonstantinKondrashov
a90f29fced wdt: Updates 2021-03-18 02:31:28 +08:00
Angus Gratton
6a29b45bd4 secure boot v2: Fix issue checking multiple signature blocks on OTA update 2021-03-15 12:30:20 +00:00
Angus Gratton
d709631393 secure boot: Add boot check for SBV2 "check app signature on update" 
As this mode uses the public keys attached to the existing app's signatures to
verify the next app, checking that a signature block is found on boot prevents
the possibility of deploying a non-updatable device from the factory.
 2021-03-15 12:30:20 +00:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot) 
- ESP32 ECO3, ESP32-S2/C3/S3
 2021-03-15 12:30:20 +00:00