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Merge branch 'fixes/secure_boot' into 'master'
secure_boot/esp32(s2,c3): Disable read protecting of efuses See merge request espressif/esp-idf!14769
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commit
012c9e26a4
@ -764,9 +764,17 @@ menu "Security features"
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efuse when Secure Boot is enabled. This prevents any more efuses from being read protected.
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If this option is set, it will remain possible to write the EFUSE_RD_DIS efuse field after Secure
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Boot is enabled. This may allow an attacker to read-protect the BLK2 efuse holding the public
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key digest, causing an immediate denial of service and possibly allowing an additional fault
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injection attack to bypass the signature protection.
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Boot is enabled. This may allow an attacker to read-protect the BLK2 efuse (for ESP32) and
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BLOCK4-BLOCK10 (i.e. BLOCK_KEY0-BLOCK_KEY5)(for other chips) holding the public key digest, causing an
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immediate denial of service and possibly allowing an additional fault injection attack to
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bypass the signature protection.
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NOTE: Once a BLOCK is read-protected, the application will read all zeros from that block
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NOTE: If "UART ROM download mode (Permanently disabled (recommended))" or
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"UART ROM download mode (Permanently switch to Secure mode (recommended))" is set,
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then it is __NOT__ possible to read/write efuses using espefuse.py utility.
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However, efuse can be read/written from the application
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config SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS
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bool "Leave unused digest slots available (not revoke)"
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@ -40,5 +40,11 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
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esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT);
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#if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
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// This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
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// otherwise the Flash Encryption key cannot be read protected
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esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_RD_DIS);
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#endif
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return ESP_OK;
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}
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@ -40,5 +40,20 @@ esp_err_t esp_secure_boot_enable_secure_features(void)
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esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
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#ifndef CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
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bool rd_dis_now = true;
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#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED
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/* If flash encryption is not enabled yet then don't read-disable efuses yet, do it later in the boot
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when Flash Encryption is being enabled */
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rd_dis_now = esp_flash_encryption_enabled();
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#endif
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if (rd_dis_now) {
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ESP_LOGI(TAG, "Prevent read disabling of additional efuses...");
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esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_RD_DIS);
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}
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#else
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ESP_LOGW(TAG, "Allowing read disabling of additional efuses - SECURITY COMPROMISED");
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#endif
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return ESP_OK;
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}
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@ -41,5 +41,11 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
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esp_efuse_write_field_bit(ESP_EFUSE_DIS_BOOT_REMAP);
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esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT);
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#if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
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// This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
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// otherwise the Flash Encryption key cannot be read protected
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esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_RD_DIS);
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#endif
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return ESP_OK;
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}
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@ -40,5 +40,20 @@ esp_err_t esp_secure_boot_enable_secure_features(void)
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esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
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#ifndef CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
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bool rd_dis_now = true;
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#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED
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/* If flash encryption is not enabled yet then don't read-disable efuses yet, do it later in the boot
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when Flash Encryption is being enabled */
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rd_dis_now = esp_flash_encryption_enabled();
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#endif
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if (rd_dis_now) {
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ESP_LOGI(TAG, "Prevent read disabling of additional efuses...");
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esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_RD_DIS);
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}
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#else
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ESP_LOGW(TAG, "Allowing read disabling of additional efuses - SECURITY COMPROMISED");
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#endif
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return ESP_OK;
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}
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