system: support USB_OTG CDC console on ESP32-S3
Closes IDF-2048, IDF-2987, IDFGH-7134, IDFGH-7291, and IDFGH-7835
See merge request espressif/esp-idf!19312
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep
Closes IDFGH-6887
See merge request espressif/esp-idf!20973
1. Remove RTC_CLOCK_BBPLL_POWER_ON_WITH_USB Kconfig option
During sleep, BBPLL clock always gets disabled
esp_restart does not disable BBPLL clock, so that first stage bootloader log can be printed
2. Add a new Kconfig option PM_NO_AUTO_LS_ON_USJ_CONNECTED
When this option is selected, IDF will constantly monitor USB CDC port connection status.
As long as it gets connected to a HOST, automatic light-sleep will not happen.
Closes https://github.com/espressif/esp-idf/issues/8507
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
Remove FPGA build for esp32h2
Initialize the pmu sleep machine constant when pmu is initialized, and calculate
the pmu sleep time adjustment value and hardware configuration value according
to the machine constant during system sleep.
Calibrate fast OSC before each sleep and use the calibration value to calculate
PMU hardware wait cycles when use the fast OSC as the work clock.
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
Remove FPGA build for esp32c6
This commit removes the riscv_interrupts.h header is it has become redundant. The previously
exposed API has been handled as follows:
- "riscv_interrupt_enable()" and "riscv_interrupt_disable()" have been removed. These functions
were declarations only and never had any implementation.
- "riscv_global_interrupts_enable()" and "riscv_global_interrupts_disable()" renamed to
"rv_utils_intr_global_enable()" and "rv_utils_intr_global_disable()" respectively and now
placed in rv_utils.h
Blocking read from cdcacm VFS could return less bytes than requested.
This didn’t match the behaviour of other VFS drivers, and higher level
code could misbehave.
Previously, reset over USB CDC was done by calling esp_restart from
an interrupt handler. This works only until some restart hook function
is registered using esp_register_shutdown_handler, and the hook
function tries to do something that isn’t allowed in an interrupt
handler. One such case is with Wi-Fi. When Wi-Fi driver is installed,
it registers esp_wifi_stop as a shutdown handler function. However
esp_wifi_stop cannot be called from an ISR, and hence we shouldn’t
call esp_restart from an ISR either.
This commit modifies USB CDC driver to call esp_restart by posting it
to esp_timer task.
Closes https://github.com/espressif/esp-idf/issues/7404
Spinlocks themselves do not constitute critical sections as after a spinlock is acquired, interrupts
can remain enabled. However, there are some places where spinlocks are used direclty instead of using
the portMUX_TYPE and portENTER_CRITICAL_...() APIs. This commit fixes those calls.
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:
- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead
Also updated soc_hal.h as follows:
- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.
This commit also updates the XCHAL_ERRATUM_572 workaround by
- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
Moved the following kconfig options out of the target component:
* CONFIG_ESP*_DEFAULT_CPU_FREQ* -> esp_system
* ESP*_REV_MIN -> esp_hw_support
* ESP*_TIME_SYSCALL -> newlib
* ESP*_RTC_* -> esp_hw_support
Where applicable these target specific konfig names were merged into
a single common config, e.g;
CONFIG_ESP*_DEFAULT_CPU_FREQ -> CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
This commit updates the visibility of various header files and cleans up
some unnecessary inclusions. Also, this commit removes certain header
include paths which were maintained for backward compatibility.
If a windowoverflow8 happened after changing the SP, the exception handler would look for
the extra save area by looking at the previous frame's SP. This SP would be a garbage value
and could cause the windowoverflow exception to write to invalid memory ares.
Moved the following kconfig options out of the target component:
* ESP32_X_BROWNOUT_* -> esp_system
* ESP32_X_DEBUG_OCDAWARE -> esp_system
* APP_NO_BLOBS -> build type (main kconfig)
Upstream xtensa exception handling will save PS, PC, and a0 registers
together when saving a minimal context. This commit ppdates the xtensa
exception handling to match upstream behavior.
