alex/esp-idf
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202 Commits

Author SHA1 Message Date
jiangguangming
7c0c5481c8 esp_rom: update rom gpio.h 
Closes https://github.com/espressif/esp-idf/issues/10205
 2022-12-14 15:14:38 +08:00
Cao Sen Miao
283e2c8e5f ESP32H2: Add ROM linker file and support 2022-12-01 10:31:17 +08:00
Jiang Guang Ming
0c4d5cfc51 Merge branch 'bugfix/update_esp_rom_lldesc_header' into 'master' 
esp_rom: remove lldesc_xxx definitions since no actual function bodies

Closes IDFGH-8772

See merge request espressif/esp-idf!21289
 2022-11-30 21:18:07 +08:00
jiangguangming
86126b83fa esp_rom: remove lldesc_xxx definitions since no actual function bodies 
Closes https://github.com/espressif/esp-idf/issues/10204
 2022-11-28 11:27:19 +08:00
C.S.M
28b2deaf24 Merge branch 'feature/add_target_esp32h2' into 'master' 
ESP32-H2: Introduce new target for ESP32H2

See merge request espressif/esp-idf!21190
 2022-11-24 18:31:19 +08:00
Cao Sen Miao
86aa4df5b5 ESP32-H2: Introduce new target for ESP32H2 2022-11-23 14:38:05 +08:00
Omar Chebib
cd21058097 C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT 
Closes https://github.com/espressif/esp-idf/issues/9938
 2022-11-21 16:18:08 +08:00
jiangguangming
08fd77a09a move {target}/rom/miniz.h to a common miniz.h 
- Move {target}/rom/miniz.h to common miniz.h
- Add ESP_ROM_HAS_MZ_CRC32 for ESP32/S2/S3/C3/H4
- Alias mz_crc32 to crc32_le if chips not support ESP_ROM_HAS_MZ_CRC32

Closes https://github.com/espressif/esp-idf/issues/10177
 2022-11-15 15:39:39 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
KonstantinKondrashov
1f9260d790 all: Apply new version logic (major * 100 + minor) 2022-11-03 08:36:23 +00:00
jiangguangming
932045c980 esp_rom: add rom tlsf function prototype instead of void * 2022-10-19 17:54:50 +08:00
wuzhenghui
fca7d70e05 esp32c6: add minimal ci support 
- enable build_template_app
- enable check public headers
- enable g0 components dependency check
 2022-09-26 20:32:13 +08:00
Marius Vikhammer
0a3131998f Merge branch 'bugfix/miniz_header_doc' into 'master' 
esp-rom: fixed error in miniz header documention for tdefl_init

Closes IDFGH-6808

See merge request espressif/esp-idf!19871
 2022-09-01 18:11:02 +08:00
songruojing
688fb18faa esp32c6: add soc/ xxx_periph, xxx_channel, xxx_pins, etc. files 2022-09-01 12:28:06 +08:00
Marius Vikhammer
acc8b8ee0a esp-rom: fixed error in miniz header documention for tdefl_init 
Closes https://github.com/espressif/esp-idf/issues/8435
 2022-08-31 11:36:56 +08:00
wuzhenghui
88c123f805 esp_rom: add esp_rom_software_reset and esp_rom_software_reset_cpu interface 2022-08-31 01:59:36 +00:00
morris
b82d6ce928 md5_hash: fix copyright checker 2022-08-29 15:40:37 +08:00
wuzhenghui
fbeb6195c2 esp_rom: add esp32c6 header files 2022-08-29 15:40:37 +08:00
Jiang Jiang Jian
33b51563dc Merge branch 'feature/mem-corruption-check-when-comprehensif-poisoning' into 'master' 
heap: provide the tlsf_check_hook() definition to implement a check of memory corruption

Closes IDFGH-5643

See merge request espressif/esp-idf!19485
 2022-08-29 12:21:43 +08:00
Guillaume Souchere
b9abad7a89 esp-rom: create a patch of tlsf_check() for target(s) supporting ROM implementation of TLSF 
The tlsf implementation in the ROM does not provide a mechanism
to register a callback to be called in by tlsf_check().

This commit is creating a patch of the tlsf implementation to provide
a definition of the function allowing to register the callback called
in tlsf_check() and add the call of this callback in tlsf_check().

This patch is only compiled for target(s) with ESP_ROM_HAS_HEAP_TLSF
set and ESP_ROM_TLSF_CHECK_PATCH set. For all the other configurations
the environment remains unchanged by those modifications.
 2022-08-26 08:25:38 +02:00
morris
e06c230a1d esp_rom: remove unavailable tjpgd library for esp32c2 2022-08-25 17:49:38 +08:00
songruojing
304a8f142d esp32c6: introduce the target 
Add esp32c6 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32c6`
 2022-08-19 11:13:02 +08:00
Vilem Zavodny
a00e8771a7 tjpgd: Remove ROM patches and tests. 2022-08-17 14:42:45 +02:00
morris
92a44afeba Merge branch 'bugfix/cleanup_rom_spiflash' into 'master' 
esp-rom: remove undefined spi_flash functions from header

Closes IDFGH-109

See merge request espressif/esp-idf!19333
 2022-08-09 10:39:14 +08:00
Marius Vikhammer
cfbe0a035b esp-rom: add missing spi-flash ROM API functions 
Added symbols for the SPI flash API which we export from the ROM interface,
deleted functions which are not exported.

Closes https://github.com/espressif/esp-idf/issues/1212
 2022-08-08 16:34:10 +08:00
Guillaume Souchere
2a29cdcb71 heap: Move the declaration of tlsf_poison_fill_pfunc_set() in esp_rom component 
- The declaration is moved to esp_rom/include/esp32c2/rom/tlsf.h.
- multi_heap_poisoning.h now includes rom/tlsf.h instead of declaring
tlsf_poison_fill_pfunc_set().

Note: If more targets will support an implementation of the TLSF in ROM,
esp_rom will be extended with new headers in the respective target directories
but multi_heap_poisoning.h will remain unchanged.
 2022-08-03 08:28:10 +02:00
wanlei
bb5a95f1aa soc: fix register header files not self-contain 2022-07-29 11:18:06 +08:00
Jing Li
66395a5c00 system/sleep: further fix spi flash/ram current leakage 2022-07-21 19:14:26 +08:00
Jakob Hasse
f8b5ed5d6c refactor (soc, esp_rom)!: removed target-specific ROM dependencies 2022-07-05 13:57:58 +08:00
Konstantin Kondrashov
7d942e0a5d Merge branch 'feature/efuse_rst_is_treated_as_poweron_rst' into 'master' 
reset_reasons: EFUSE_RST is treated as POWERON_RST + checks errors of eFuse BLOCK0

Closes IDF-3702

See merge request espressif/esp-idf!14742
 2022-06-13 21:26:13 +08:00
KonstantinKondrashov
46f0313d6b reset_reasons: EFUSE_RST is treated as POWERON_RST 
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
 2022-06-09 17:49:03 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Wu Zheng Hui
b98622c624 efuse: update efuse name 2022-05-28 22:03:16 +08:00
Sachin Parekh
2c725264f7
esp32c2: Support Secure Boot V2 based on ECDSA scheme 2022-05-11 18:00:03 +05:30
Song Ruo Jing
e13bb580c7 Merge branch 'refactor/gpio_unit_test' into 'master' 
gpio: Clean up unit tests and enable ci ut on some previously disabled test cases

Closes IDF-4620

See merge request espressif/esp-idf!17417
 2022-04-01 18:38:19 +08:00
songruojing
8d84033b8c gpio: Clean up unit tests and enable ci ut on some previously disabled test cases 
Eliminate UT_T1_GPIO runner requirement by routing internally through gpio matrix and by setting gpio pins to GPIO_MODE_INPUT_OUTPUT mode for all interrupt related test cases.
 2022-03-30 15:11:08 +08:00
wuzhenghui
4652f77a7c esp32h2beta2:update rom layout table 2022-03-29 14:13:06 +08:00
Michael (XIAO Xufeng)
aab535fe4a Merge branch 'bugfix/regi2c_ctrl_spinlock_s2' into 'master' 
hw_support: fixed regi2c not protected by lock on ESP32S2

See merge request espressif/esp-idf!16653
 2022-03-13 02:47:53 +08:00
Michael (XIAO Xufeng)
d5bdf95580 hw_support: fixed regi2c not protected by lock on ESP32S2 2022-03-13 00:24:08 +08:00
Armando
c1cbd7bbf6 cache/mmu: implememnt cache and mmu hal APIs in bootloader 2022-03-11 22:43:11 +08:00
Kevin (Lao Kaiyao)
cc1d89ebba Merge branch 'feature/i2c_support_on_esp8684_esp32h2' into 'master' 
i2c: support i2c on esp32c2 and esp32h2

Closes IDF-3918

See merge request espressif/esp-idf!16444
 2022-02-28 13:59:02 +08:00
KonstantinKondrashov
9605f3eb1a soc: Adds efuse hal 
Replaced eFuse ROM funcs with hal layer
 2022-02-24 22:20:09 +08:00
laokaiyao
7da023ceae i2c: support esp32c2 2022-02-23 15:19:37 +08:00
songruojing
b860fa96e0 esp_system: support esp32c2 reset reason 2022-02-15 13:50:22 +08:00
Song Ruo Jing
40d1102ca5 Merge branch 'bugfix/cpu_reset_perip_clk_disable' into 'master' 
esp_system: change range comparsion for reset reason to specifc cpu reset reason comparison

See merge request espressif/esp-idf!15492
 2022-02-10 03:44:15 +00:00
songruojing
c1dedb33fa esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset 2022-02-09 15:54:34 +08:00
morris
ef00bd59dc esp_rom: extract int matrix route and cpu ticks getter 2022-02-09 13:52:20 +08:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
morris
869bed1bb5 soc: don't expose unstable soc header files in public api 2022-01-06 23:10:22 +08:00
Cao Sen Miao
d397464fc4 spi_flash: refactor spi_flash.h to esp_rom_spiflash.h but keep the content in spi_flash.h 2021-12-30 14:12:31 +08:00
Cao Sen Miao
b0decda1e3 bootloader: move bootloader flash support to isolate folders 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3a4db97cec spi_flash: move patch files to common rom patch folder 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3dd1cfea18 spi_flash: refactor spi_flash.h to decline duplicated code 2021-12-30 14:05:12 +08:00
Cao Sen Miao
463cf2cf1c ESP8684: Clean up ESP8684 code, remove useless code, update headers 2021-12-09 18:36:39 +08:00
Mahavir Jain
f667b1039b Fix copyright headers for few include files 2021-11-30 22:25:33 +05:30
lovyan03
cb91b51c52 bugfix: Conflicting declaration error with include<esp_efuse.h>, and Unified secure_boot.h include guard to "pragma once". 2021-11-30 15:46:49 +09:00
Cao Sen Miao
bf6fa70812 ESP8684: update bootloader, bootloader_support, esp_rom 2021-11-06 17:33:44 +08:00
Li Shuai
e8188e5d8f ci: replacing old header with new SPDX header style 2021-10-20 11:36:23 +08:00
Li Shuai
881e1b0fd5 deep sleep: add deep sleep support for esp32s3 2021-10-20 11:36:20 +08:00
Jiang Jiang Jian
3b48b7e663 Merge branch 'Fix/update_reset_reason' into 'master' 
update reset reason for c3/s3/h2

See merge request espressif/esp-idf!14747
 2021-09-18 07:03:50 +00:00
wanglei
c3abbe3866 cache: Update cache.h and autoload api 2021-09-02 02:27:40 +08:00
SalimTerryLi
23e23b697c
rom/tjpgd: unify library & add rom patch 
remove external tjpgd library inside example

enable tjpgd decoding on all chips
 2021-09-01 14:42:17 +08:00
Mahavir Jain
d9fdb9dc3f esp_rom: remove "newlib.h" header 
We found conflict in "sizeof(time_t)" due to inclusion of this
header over toolchain specific "newlib.h".

Moreover, there are no users for this header and implementation
for API is also not available in ROM. Hence removing it.
 2021-08-27 14:33:05 +05:30
Sachin Parekh
2d82560ed5 bootloader: Enable Secure boot V2 for ESP32-S3 2021-08-19 14:08:12 +05:30
wuzhenghui
f913a10a22 update reset reason for c3/s3/h2 2021-08-13 17:45:53 +08:00
Li Shuai
d73a09cd8b light sleep: add wifi mac sleep support for esp32s3 2021-08-04 21:58:33 +08:00
Jakob Hasse
4dd88329c1 [esp_rom]: Partially buildable for linux 
The following files have been ported:
* esp_rom_crc.h
* esp_rom_sys.h
* esp_rom_efuse.h (mostly no-ops)
* esp_rom_md5.h

Integrated Linux-based rom implementation into log
and NVS component.

Added brief host tests for ROM to ensure basic
consistency on Linux.

Added ROM printf host unit tests.

Temporarily added reset reason for Linux in ROM.
 2021-08-03 12:03:24 +08:00
Song Ruo Jing
5d82d7c6ee Merge branch 'typo_fix/fix-length-typo' into 'master' 
docs: Fix length typo

Closes IDFGH-5272

See merge request espressif/esp-idf!14371
 2021-08-02 09:35:15 +00:00
Ato Araki
aea865b360 Fix length typo 
Closes https://github.com/espressif/esp-idf/pull/7037
 2021-07-29 14:44:43 +08:00
Cao Sen Miao
c29b3e2e36 spi_flash: move the unlock patch to bootloader and add support for GD 2021-07-29 10:46:33 +08:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
Shu Chen
37f4cb8b4b esp32h2: add rom code for esp32h2 2021-07-01 19:53:11 +08:00
Angus Gratton
57fa883127 esp32s3: Remove APB frequency RTC register 
Usage of this register changed between ESP32-S3 beta2 and the
final chip.
 2021-06-29 17:38:46 +10:00
Armando
bc248278f8 spiflash: add octal spi psram support on 727 2021-06-25 19:41:57 +08:00
Marius Vikhammer
f124536948 system: add support for reset reason hint on S3 2021-06-15 13:39:51 +08:00
Anton Maklakov
b46b50eaa6 newlib: Add ESP_ROM_HAS_RETARGETABLE_LOCKING capability for C3 and S3 chips 2021-06-07 12:53:45 +07:00
Angus Gratton
9235754d4c esp_rom: Allow passing any type of data pointer to md5, remove unchecked size on digest pointer 2021-05-18 01:32:59 +00:00
Angus Gratton
ede477ea65 paritition_table: Verify the partition table md5sum when loading the app 
Additionally, always enable the partition MD5 check if flash encryption is on in
Release mode. This ensures the partition table ciphertext has not been modified
(CVE-2021-27926).

The exception is pre-V3.1 ESP-IDF bootloaders and partition tables, which
don't have support for the MD5 entry.
 2021-05-18 01:32:59 +00:00
Michael (XIAO Xufeng)
a0d13a31ec uart: fix misleading files for UART2 
Includes: header files, ld files and clk.c

ESP32-C3 only have UART0 and UART1.
 2021-04-27 17:40:19 +08:00
Marius Vikhammer
2aead8ba57 Support ESP32S3 Beta 3 target 
Update ROM API. Port changes from bringup branch.
 2021-03-18 10:24:22 +08:00
Angus Gratton
6a29b45bd4 secure boot v2: Fix issue checking multiple signature blocks on OTA update 2021-03-15 12:30:20 +00:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot) 
- ESP32 ECO3, ESP32-S2/C3/S3
 2021-03-15 12:30:20 +00:00
morris
0f5d1c1c46 rtc: supported disable rom log temporarily 2021-02-22 20:56:43 +08:00
KonstantinKondrashov
43ebb8ea61 efuse: Updates description of uart_print_control efuse 2021-02-08 18:02:55 +08:00
Cao Sen Miao
c1b41ece32 flash_encryption: Quick fixed the issue that block when flash_encryption_write, Related https://github.com/espressif/esp-idf/issues/6322, Related https://github.com/espressif/esp-idf/issues/6254 2021-02-05 20:10:42 +08:00
KonstantinKondrashov
98f726fa4b bootloader/esp32c3: Adds secure boot (not yet supported) 2021-01-19 20:51:13 +08:00
Chen Jian Xing
5b44295cb9 esp_wifi: fix esp32c3 code issues 
1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
 2021-01-10 16:16:28 +08:00
Angus Gratton
a5aac93051 esp_rom: Small changes for esp32c3 support 
Updated from internal commit 6d894813
 2020-12-24 13:40:01 +11:00
Angus Gratton
8929a9cdb1 Merge branch 'feature/aes_hal' into 'master' 
AES: refactor and add HAL layer

See merge request espressif/esp-idf!10979
 2020-12-11 15:39:49 +08:00
morris
c39476d699 esp_rom: added esp_rom_install_uart_printf 2020-12-11 11:45:10 +08:00
Marius Vikhammer
457ce080ae AES: refactor and add HAL layer 
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
 2020-12-10 09:04:47 +00:00
Angus Gratton
b68094199f esp_rom: Add initial ESP32-C3 support 
From internal commit 7761d6e8
 2020-11-30 11:12:56 +11:00
Cao Sen Miao
11188d2143 esp_flash:fix bug about clearing WLE automatically after actions 2020-11-12 16:44:29 +08:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit) 
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
 2020-11-11 07:36:35 +00:00
Ivan Grokhotkov
48f27cb5ab Merge branch 'feature/esp32_ulp_allow_8kb' into 'master' 
esp32: allow up to 8 kB of ULP program size

Closes IDFGH-1772

See merge request espressif/esp-idf!10727
 2020-10-20 04:08:57 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h 
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
 2020-10-17 16:10:15 +08:00
Marius Vikhammer
949fb8e63a SHA: add HAL layer and refactor driver 
Add a LL and HAL layer for SHA.
 2020-10-09 08:24:08 +00:00
Ivan Grokhotkov
ef10c2576f esp32: allow up to 8 kB of ULP program size 
The remaining 4 kB had been reserved for storing RF calibration and
BT stack state since 4e092be6. However, these features never got
implemented. If we ever need to place RF related data into RTC slow
memory, we can do this by creating a variable with RTC_NOINIT_ATTR
instead.

Closes https://github.com/espressif/esp-idf/issues/3993
 2020-10-05 11:41:39 +02:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00