Michael (XIAO Xufeng)
6b5377f11a
gpio: fixed GPIO47 not available issue on ESP32s3
2021-01-04 20:21:06 +08:00
Marius Vikhammer
68608f804c
esp32c3: Misc fixes needed to build & run
2020-12-31 15:20:05 +11:00
chaijie
d505474f78
1. Fix CPU switch to 160M issue;
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2. increase lightsleep voltage to make sure wakeup successfully;
3. add judgement code to whether wait or not when switch CPU frequency.
2020-12-30 12:32:31 +08:00
Marius Vikhammer
eb788deb03
esp_hw_support: merge C3 changes to master
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Merge RTC related C3 changes to master
2020-12-30 12:20:41 +08:00
Angus Gratton
629b4270b4
Merge branch 'feature/c3_mbedtls_merge' into 'master'
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mbedtls: merge changes from C3 to master
Closes IDF-2544 and IDF-2114
See merge request espressif/esp-idf!11718
2020-12-29 12:37:08 +08:00
Angus Gratton
1b0442b963
Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master'
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esp_system: make rtc fast memory to heap configuration unified across chips
Closes IDF-2503
See merge request espressif/esp-idf!11693
2020-12-29 11:41:05 +08:00
Marius Vikhammer
1b6891c5d8
mbedtls: merge changes from C3
2020-12-29 10:56:13 +08:00
Darian Leung
602a747b31
Add USB Host registers and types and LL layer
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This commit adds the register struct, Low Level Layer, and
protocol types for USB Host
2020-12-24 19:43:42 +08:00
Angus Gratton
c3ba995f2c
Merge branch 'ci/ccomp_performance_tests' into 'master'
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unit_test: Refactor all performance tests that rely on cache compensated timer
See merge request espressif/esp-idf!11709
2020-12-24 13:44:52 +08:00
Mahavir Jain
880a63b2e9
esp_system: make rtc fast memory to heap configuration unified across chips
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Closes IDF-2503
2020-12-24 09:46:35 +05:30
Angus Gratton
ed737becde
soc: Move esp32c3 soc_memory_layout.c to soc component
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Was incorrectly placed in esp_hw_support
2020-12-24 13:40:01 +11:00
Angus Gratton
b7f4c46a82
soc: Update esp32c3 soc headers
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From internal commit 6d894813
2020-12-24 10:47:34 +11:00
Angus Gratton
6d6510c39b
soc: Move esp32c3 soc_memory_layout.c to soc component
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Was incorrectly placed in esp_hw_support
2020-12-23 11:49:16 +11:00
Angus Gratton
705d797b41
Merge branch 'feature/esp32c3_drivers' into 'master'
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driver: Add esp32c3
Closes IDF-2363
See merge request espressif/esp-idf!11650
2020-12-23 08:43:31 +08:00
Armando
2d37bfa126
driver: Add adc_digi single conversion mode
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- add lock for single read and continuous read APIs
- update onetime read start singal delay for hardware limitation[*]
- move adc_caps to soc_caps.h
- update license dates
[*] There is a hardware limitation. If the APB clock frequency is high, the
step of this reg signal: ``onetime_start`` may not be captured by the
ADC digital controller (when its clock frequency is too slow). A rough
estimate for this step should be at least 3 ADC digital controller
clock cycle.
2020-12-23 09:53:24 +11:00
Angus Gratton
fa892eb017
soc: Explain units for rtc_clk_cal() function, fix typo
2020-12-23 09:53:24 +11:00
Cao Sen Miao
e338a2e3df
rtc: add function to en/disable the rtc clock
2020-12-23 09:53:24 +11:00
Angus Gratton
f09b8ae7a4
driver: Add esp32c3 ADC driver
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Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Angus Gratton
27a9cf861e
driver: Add esp32c3 drivers (except ADC/DAC) and update tests
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Some ESP32-C3 drivers are still pending.
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Marius Vikhammer
0a95151a75
unit_test: Refactor all performance tests that rely on cache compensated timer
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There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.
This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
2020-12-22 18:56:24 +11:00
boarchuz
06d6146445
fix rtc_gpio_desc_t compilation error
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Closes https://github.com/espressif/esp-idf/pull/6029
Closes https://github.com/espressif/esp-idf/issues/6301
Closes IDFGH-4470
Closes IDFGH-4167
2020-12-21 13:54:52 +05:30
Cao Sen Miao
0736c91d68
soc: Remove cache constants from soc.h
2020-12-17 15:34:13 +11:00
Marius Vikhammer
457ce080ae
AES: refactor and add HAL layer
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Refactor the AES driver and add HAL, LL and caps.
Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Armando
d393699ab6
uart: bringup on esp32c3
2020-11-30 15:23:15 +11:00
Angus Gratton
b68094199f
esp_rom: Add initial ESP32-C3 support
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From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00
Angus Gratton
c29d93986d
soc: Add initial ESP32-C3 support
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From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00
Armando
fb8b905539
uart: add uart support on esp32s3
2020-11-24 19:12:51 +08:00
morris
c5fe158929
doc: fix wrong register description regarding to ethernet SMI
2020-11-16 13:30:49 +08:00
Michael (XIAO Xufeng)
14944b181e
Merge branch 'fix/soc_caps_spi_dummy_output_esp32' into 'master'
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soc_caps.h: remove spi cap that is defined to 0
See merge request espressif/esp-idf!11203
2020-11-16 10:39:27 +08:00
Michael (XIAO Xufeng)
099fca515d
Merge branch 'bugfix/move_crypto_caps' into 'master'
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SHA/RSA: moved all caps to soc_caps.h
Closes IDF-2300
See merge request espressif/esp-idf!11032
2020-11-13 11:06:44 +08:00
Angus Gratton
935e4b4d62
Merge branch 'feature/riscv_arch' into 'master'
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Add RISC-V support
Closes IDF-2359
See merge request espressif/esp-idf!11140
2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe
Updates for riscv support
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* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
longer signed/unsigned int).
Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Michael (XIAO Xufeng)
caf83b88ba
Merge branch 'feature/bringup_i2c_for_s3' into 'master'
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I2C: Add support for esp32s3 and add source clock allocator
Closes IDF-2011
See merge request espressif/esp-idf!10923
2020-11-12 22:12:58 +08:00
Cao Sen Miao
6eee601cf6
i2c: Add supports on esp32s3
2020-11-12 11:32:45 +08:00
morris
dc227c78e1
rmt: fix wrong signal assign on esp32
2020-11-12 10:31:38 +08:00
Michael (XIAO Xufeng)
5b6c965e99
soc_caps.h: remove spi cap that is defined to 0
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According to the caps rule, for unsupported feature we don't define anything.
Remove the define 0 that violates this rule.
2020-11-12 10:29:42 +08:00
Marius Vikhammer
488f46acf5
SHA/RSA: moved all caps to soc_caps.h
2020-11-12 02:15:46 +00:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
3882c2b8ed
Merge branch 'feature/bringup_esp32s3_fpga_update_rmt_driver' into 'master'
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rmt: support esp32s3
Closes IDF-1773
See merge request espressif/esp-idf!10292
2020-11-07 07:15:53 +08:00
Michael (XIAO Xufeng)
d7ce8a537f
Merge branch 'feature/bringup_esp32s3_fpga_rtc_sleep' into 'master'
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feature (rtc): update rtc related code(rtc_sleep rtc_init) to support esp32s3
See merge request espressif/esp-idf!10404
2020-11-05 19:19:36 +08:00
morris
ff976867b3
rmt: split TX and RX in LL driver
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Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
chenjianqiang
9465af0066
rmt: support esp32s3
2020-11-05 19:00:55 +08:00
fuzhibo
93c7cf094e
rtc: update rtc related code(rtc_sleep rtc_init) to support esp32s3
2020-11-04 02:43:41 +00:00
morris
e4c8ec6174
timergroup: move interrupt index into peripheral description file
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1. Added timer_group_periph.c file, describing module global signals
(e.g. interrupt index)
2. Added more caps in soc_caps.h
2020-11-03 18:16:50 +08:00
Michael (XIAO Xufeng)
35faecea1d
Merge branch 'feature/support_sigma_delta_on_s3' into 'master'
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sigma_delta: add periph signal list and support esp32-s3
See merge request espressif/esp-idf!10945
2020-10-30 17:22:02 +08:00
Michael (XIAO Xufeng)
8337f0afa2
spi_flash: fix LL of esp32s3 and add 32-bit support
2020-10-29 18:21:42 +08:00
Michael (XIAO Xufeng)
3bacf35310
esp_flash: support high capacity flash chips (32-bit address)
2020-10-29 18:20:11 +08:00
morris
17808b3ff8
sigma_delta: add periph signal list and support esp32-s3
2020-10-29 11:06:28 +08:00
Renz Bagaporo
6b0a5af73e
soc: move implementations to esp_hw_support
2020-10-28 22:38:50 +08:00
Renz Bagaporo
79887fdc6c
soc: descriptive part occupy whole component
2020-10-28 07:21:29 +08:00