Michael (XIAO Xufeng)
09b827b2c8
Merge branch 'feature/spi_slave_double_board_test_for_slave_transaction' into 'master'
...
spi slave: add a double board test for esp32c3 relating to sending/receiving unaligned data
See merge request espressif/esp-idf!11153
2021-02-05 00:51:24 +08:00
Michael (XIAO Xufeng)
52a76867d1
Merge branch 'bugfix/spi_lose_last_3_bytes' into 'master'
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spi_master: fix an issue where master cannot correctly receive data when using DMA in halfduplex mode.
Closes IDFGH-612
See merge request espressif/esp-idf!11354
2021-02-04 18:35:48 +08:00
Martin Vychodil
69096ddce5
Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
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Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)
Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
Michael (XIAO Xufeng)
baedf7c9bb
Merge branch 'bugfix/potential_cocurrency_issue_in_gdma' into 'master'
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gdma: fix potential cocurrency issue
Closes IDF-2646
See merge request espressif/esp-idf!12001
2021-01-27 15:07:35 +08:00
Michael (XIAO Xufeng)
2b83418141
adc: add fallback calibration method
...
Also:
1. Separate static configuration into init phase to improve
performance
2. Add a init code config layer to avoid duplicated configuration
3. Add a HW_CALIBRATION_V1 caps
2021-01-25 20:30:42 +08:00
Armando
d8a4b247b9
adc_digi: update_adc_api_for_5M_freq_limit
...
The ``adc_digi_config_t`` struct is modified on esp32c3: configuration
of clock divider factors are not provided anymore. The SARADC sampling
frequency is provided instead. In this way, we can handle the frequency
limit better.
2021-01-25 04:51:40 +00:00
Armando
02600309c8
adc: fix some regression issues
2021-01-25 04:51:40 +00:00
Michael (XIAO Xufeng)
d7d1dee208
system: reset dma when soft reset
2021-01-25 04:51:40 +00:00
Jiang Jiang Jian
76bb9565af
Merge branch 'bugfix/fix_wifi_interface_use' into 'master'
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esp_wifi: Modify ESP_IF_WIFI_STA to WIFI_IF_STA
See merge request espressif/esp-idf!12050
2021-01-25 12:18:27 +08:00
Armando
0538dc2d93
spi_slave_hd: add DMA Append Mode feature
2021-01-21 18:53:53 +08:00
xiehang
b8a8fe3f54
esp_wifi: Modify ESP_IF_WIFI_STA to WIFI_IF_STA
2021-01-19 11:55:44 +08:00
morris
914ba4914a
gdma: fix potential cocurrency issue
...
Alloc handle memory first then hook, we can benifit:
1. Don't have to do malloc in a critical section
2. Don't have to do esp_intr_free in a critical section
2021-01-14 20:37:36 +08:00
Michael (XIAO Xufeng)
ea996df725
Merge branch 'feature/rmt_support_user_context_in_translator' into 'master'
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rmt: support user context in translator
Closes IDFGH-4135 and IDFGH-3237
See merge request espressif/esp-idf!10894
2021-01-14 19:26:26 +08:00
morris
95e712039c
rmt: add workaround to get user context in a graceful way
2021-01-14 11:01:41 +08:00
Michael (XIAO Xufeng)
2d3f22918f
Merge branch 'feature/gdma_channel_allocator' into 'master'
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gdma channel allocator
Closes IDF-2124
See merge request espressif/esp-idf!11570
2021-01-14 10:52:49 +08:00
morris
e6d23a35ec
gdma: dynamic alloc DMA channels
2021-01-13 10:52:27 +08:00
KonstantinKondrashov
dada7cd035
global: Uses CCOUNT API instead of XTHAL macro
2021-01-12 16:24:23 +08:00
Armando
2bc1442351
spi_slave: add a dual board test of sending/receiving unalinged data on
...
esp32c3
This test can also be used between ESP32/S2/S3/C3.
2021-01-05 21:26:53 +08:00
Armando
23d08fbe85
spi_master: add a test for HD master to receive data correctly via dma
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Issue Description:
If master is in HD mode, if it sends data without receiving data,
it will still enable the RX DMA because of old version ESP32 silicon issue.
And because there is no correctly linked RX DMA descriptor,
an inlink_dscr_error intr will be seen, which will influence the following RX transactions.
This issue is only found on ESP32.
2021-01-05 19:32:46 +08:00
Angus Gratton
c3ba995f2c
Merge branch 'ci/ccomp_performance_tests' into 'master'
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unit_test: Refactor all performance tests that rely on cache compensated timer
See merge request espressif/esp-idf!11709
2020-12-24 13:44:52 +08:00
Angus Gratton
27a9cf861e
driver: Add esp32c3 drivers (except ADC/DAC) and update tests
...
Some ESP32-C3 drivers are still pending.
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Marius Vikhammer
0a95151a75
unit_test: Refactor all performance tests that rely on cache compensated timer
...
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.
This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
2020-12-22 18:56:24 +11:00
Michael (XIAO Xufeng)
f174cc35a8
Merge branch 'test/disable_sdio_single_core_tests' into 'master'
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ci: disable some sdio_slave tests on single core config
Closes IDFCI-233 and IDFCI-240
See merge request espressif/esp-idf!11492
2020-12-08 11:48:13 +08:00
Cao Sen Miao
d6f0b4af6f
adc_i2s: solve the i2s_adc issue when using wifi
2020-12-07 10:45:04 +08:00
Michael (XIAO Xufeng)
a579011584
ci: disable some sdio_slave tests on single core config
2020-12-07 10:15:35 +08:00
Angus Gratton
beb75b13f2
driver test: Use regular target guards for single-target test files
2020-12-01 10:58:50 +11:00
Angus Gratton
5228d9f9ce
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-12-01 10:58:50 +11:00
Armando
fb8b905539
uart: add uart support on esp32s3
2020-11-24 19:12:51 +08:00
fuzhibo
9162f23c2e
bugfix(dac): fix testcase fail for dac
2020-11-17 12:23:12 +00:00
morris
b7ecccd901
test: fix several test build error
2020-11-16 13:30:49 +08:00
Cao Sen Miao
6eee601cf6
i2c: Add supports on esp32s3
2020-11-12 11:32:45 +08:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
3882c2b8ed
Merge branch 'feature/bringup_esp32s3_fpga_update_rmt_driver' into 'master'
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rmt: support esp32s3
Closes IDF-1773
See merge request espressif/esp-idf!10292
2020-11-07 07:15:53 +08:00
Michael (XIAO Xufeng)
d7ce8a537f
Merge branch 'feature/bringup_esp32s3_fpga_rtc_sleep' into 'master'
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feature (rtc): update rtc related code(rtc_sleep rtc_init) to support esp32s3
See merge request espressif/esp-idf!10404
2020-11-05 19:19:36 +08:00
morris
1be923acb4
rmt: rename always_on to aware_dfs
2020-11-05 19:00:55 +08:00
morris
ff976867b3
rmt: split TX and RX in LL driver
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Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
chenjianqiang
9465af0066
rmt: support esp32s3
2020-11-05 19:00:55 +08:00
fuzhibo
93c7cf094e
rtc: update rtc related code(rtc_sleep rtc_init) to support esp32s3
2020-11-04 02:43:41 +00:00
morris
bc8b56cef7
timergroup: refactor unit test to better support future chip
2020-11-03 18:16:50 +08:00
morris
e4c8ec6174
timergroup: move interrupt index into peripheral description file
...
1. Added timer_group_periph.c file, describing module global signals
(e.g. interrupt index)
2. Added more caps in soc_caps.h
2020-11-03 18:16:50 +08:00
morris
17808b3ff8
sigma_delta: add periph signal list and support esp32-s3
2020-10-29 11:06:28 +08:00
Michael (XIAO Xufeng)
9a394e1aa0
Merge branch 'feature/spi_bringup_esp32s3' into 'master'
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spi: bringup on esp32s3
See merge request espressif/esp-idf!10107
2020-10-27 00:51:42 +08:00
Armando
f7e91ef6c1
spi: esp32s3 bringup for spi
2020-10-26 11:28:34 +08:00
morris
bb1369b922
dedicated gpio: add driver
2020-10-20 21:06:09 +08:00
Michael (XIAO Xufeng)
2e681f4cb5
Merge branch 'bugfix/fix_rs485_ut_fail' into 'master'
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Bugfix/fix RS485 ut fail
See merge request espressif/esp-idf!9448
2020-10-19 16:17:23 +08:00
Alex Lisitsyn
8737584789
Bugfix/fix RS485 ut fail
2020-10-19 16:17:19 +08:00
morris
906dd0ad84
pcnt: replace isr register with isr service in example
2020-10-19 11:56:18 +08:00
Michael (XIAO Xufeng)
c0887582a2
adc_test: fix the failure caused by low expected middle value
2020-10-18 10:32:04 +08:00
Michael (XIAO Xufeng)
1966f00f0b
soc: updates caps usage
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We should define caps as 1 if true. When use the caps macros, #if and
#if ! should be used instead of #ifdef/#ifndef.
2020-10-17 16:10:17 +08:00
Michael (XIAO Xufeng)
647dea9395
soc: combine xxx_caps.h into one soc_caps.h
...
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).
Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h
This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00