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281 Commits

Author SHA1 Message Date
Aditya Patwardhan
44f58ecb51 Merge branch 'fix/c6_bootloader_rng_enable_v5.3' into 'release/v5.3'
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fix(bootloader_support): Fixed pattern in RNG enable function to avoid output on IO0 (v5.3)

See merge request espressif/esp-idf!31905
2024-07-05 16:22:06 +08:00
Aditya Patwardhan
42cf452da3 Merge branch 'fix/disable_ecdsa_key_manager_for_p4_v5.3' into 'release/v5.3'
fix(soc): Disable key manager and ECDSA peripheral support for esp32p4 (v5.3)

See merge request espressif/esp-idf!31768
2024-07-05 13:59:20 +08:00
Michael (XIAO Xufeng)
33c3d327c5 Merge branch 'feat/esp32p4_default_rev_0.1_v5.3' into 'release/v5.3'
feat(esp32p4): make revision v0.1 the default version (v5.3)

See merge request espressif/esp-idf!31601
2024-07-05 10:52:02 +08:00
Jakob Hasse
083db8a169 fix(bootloader_support): Fixed pattern in RNG enable function on C6 to avoid output on IO0 2024-07-04 11:36:31 +02:00
Jiang Jiang Jian
ffe0de9607 Merge branch 'bugfix/fix_idfgh_12600_v5.3' into 'release/v5.3'
fix(coex): fix ESP32 Wi-Fi cant tx after sw_reset with BLE scan

See merge request espressif/esp-idf!31788
2024-07-04 10:56:30 +08:00
Island
32334c7a25 Merge branch 'bugfix/fixed_hci_uart_error_on_esp32c6_esp32h2_v5.3' into 'release/v5.3'
feat(bluetooth/controller): Fixed the issue of unresponsiveness when using hci... (v5.3)

See merge request espressif/esp-idf!31750
2024-07-03 17:21:18 +08:00
Aditya Patwardhan
a56a4b8980 fix(soc): Disable key manager and ECDSA peripheral support for esp32p4
The support is disabled only for ECO1 and below
2024-07-03 15:28:41 +08:00
liuning
9417e857a8 fix(coex): fix ESP32 Wi-Fi cant tx after sw_reset with BLE scan
Closes https://github.com/espressif/esp-idf/issues/13598
2024-06-28 14:33:40 +08:00
Marius Vikhammer
6b1a173030 Merge branch 'docs/fix_ulp_doxygen_comment_v5.3' into 'release/v5.3'
docs(ulp): fix doxygen comment formatting (v5.3)

See merge request espressif/esp-idf!31767
2024-06-28 12:27:57 +08:00
Marius Vikhammer
350d4c03da docs(ulp): fix doxygen comment formatting 2024-06-27 17:08:25 +08:00
zwl
2543313f80 feat(bluetooth/controller): Fixed the issue of unresponsiveness when using hci uart mode on ESP32-C5 2024-06-26 17:33:24 +08:00
zwl
d617f8d5b0 feat(bluetooth/controller): Fixed the issue of unresponsiveness when using hci uart mode on ESP32-C6 and ESP32-H2 2024-06-26 17:33:24 +08:00
Marius Vikhammer
91aab8e6fd Merge branch 'docs/update_c5_esp_timer_docs_v5.3' into 'release/v5.3'
docs(sys-time): add esp32c5 info into programming guide docs (v5.3)

See merge request espressif/esp-idf!31561
2024-06-25 16:59:37 +08:00
Xiaoyu Liu
8cabe4380b docs(sys-time): add esp32c5 info into programming guide docs 2024-06-25 15:35:11 +08:00
Jiang Jiang Jian
4cfea9e864 Merge branch 'feat/put_bt_interface_code_to_rom_v5.3' into 'release/v5.3'
Feat/put bt interface code to rom (v5.3)

See merge request espressif/esp-idf!31549
2024-06-25 13:57:29 +08:00
Jiang Jiang Jian
e7b6fb75d4 Merge branch 'bugfix/fix_phy_cal_data_v5.3' into 'release/v5.3'
fix(phy): add phy calibration data check when mode is not none calibration(v5.3)

See merge request espressif/esp-idf!31480
2024-06-25 11:36:50 +08:00
Jiang Jiang Jian
d83e4bcfbe Merge branch 'fix/trigger_system_reset_in_brownout_isr_v5.3' into 'release/v5.3'
change(esp_system): trigger digital system reset in brownout isr  (v5.3)

See merge request espressif/esp-idf!31683
2024-06-25 09:40:51 +08:00
Jiang Jiang Jian
92c239d9b0 Merge branch 'docs/add_signature_verification_numbers_esp32p4_v5.3' into 'release/v5.3'
docs(secure_boot): Add secure boot signature verification time for esp32p4 (v5.3)

See merge request espressif/esp-idf!31688
2024-06-25 09:40:03 +08:00
Jiang Jiang Jian
e722672fcc Merge branch 'doc/p4_rng_v5.3' into 'release/v5.3'
docs(esp_hw_support): Adjusted RNG docs to reflect P4 changes (v5.3)

See merge request espressif/esp-idf!31658
2024-06-25 09:26:43 +08:00
Jiang Jiang Jian
2d397782d8 Merge branch 'docs/freertos_docs_for_c5_c61_v5.3' into 'release/v5.3'
docs(freertos): Enabled FreeRTOS docs for esp32c5 (v5.3)

See merge request espressif/esp-idf!31538
2024-06-25 01:01:00 +08:00
Jiang Jiang Jian
397b1e51a5 Merge branch 'fix/docs_wifi_get_sta_list_v5.3' into 'release/v5.3'
fix(docs): tcpip_adapter: Document replacement of tcpip_adapter_get_sta_list (v5.3)

See merge request espressif/esp-idf!31170
2024-06-25 00:58:33 +08:00
Jiang Jiang Jian
6c7c212f98 Merge branch 'feat/update-memory-layout-c5-mp_v5.3' into 'release/v5.3'
feat(heap): support heap and update memory layout on esp32c5-mp target (backport v5.3)

See merge request espressif/esp-idf!31040
2024-06-25 00:55:00 +08:00
Jiang Jiang Jian
c56b21bbd5 Merge branch 'bugfix/wifi-6570_v5.3' into 'release/v5.3'
backport v5.3: fix the issue of wifipwr losing its clock during sleep on the esp32c6 eco1

See merge request espressif/esp-idf!31602
2024-06-25 00:29:10 +08:00
Jiang Jiang Jian
8f9467dc2b Merge branch 'feature/support_esp32p4_dcdc_always_on_v5.3' into 'release/v5.3'
feat(esp_hw_support): support esp32p4 dcdc always on during lightsleep (v5.3)

See merge request espressif/esp-idf!31681
2024-06-24 20:12:51 +08:00
Xiao Xufeng
3105644642 feat(esp32p4): make revision v0.1 the default version 2024-06-24 20:11:02 +08:00
chenjianxing
872319ac5e fix(phy): add phy calibration data check when mode is not none calibration 2024-06-24 20:05:09 +08:00
Jiang Jiang Jian
34e5669b7b Merge branch 'bugfix/wpa3_init_crash_v5.3' into 'release/v5.3'
fix(wpa_supplicant): Fix wpa3 AP crash because of dangling pointer (v5.3)

See merge request espressif/esp-idf!31540
2024-06-24 19:58:27 +08:00
Jiang Jiang Jian
11d946582c Merge branch 'bugfix/revert_c5_threshold_changes_v5.3' into 'release/v5.3'
Revert "fix(rom): fixed esprv_int_set_threshold on C5" (v5.3)

See merge request espressif/esp-idf!31507
2024-06-24 19:58:03 +08:00
Jiang Jiang Jian
0a1dc07248 Merge branch 'bugfix/fix_dhcp_pool_issue_on_dhcp_server_v5.3' into 'release/v5.3'
fix(lwip): fixed the dhcp pool error on dhcp server (v5.3)

See merge request espressif/esp-idf!31264
2024-06-24 19:43:41 +08:00
Li Shuai
1ae89b72cb fix(wifi): fix the issue of wifipwr losing its clock during sleep on the esp32c6 eco1 2024-06-24 16:46:17 +08:00
harshal.patil
18470061ab
docs(secure_boot): Add secure boot signature verification time for esp32p4 2024-06-24 12:25:42 +05:30
morris
31439dfd77 Merge branch 'ci/do_not_build_rmt_examples_when_not_supported' into 'release/v5.3'
fix(ci): build rmt examples as long as it's driver support is finished

See merge request espressif/esp-idf!31672
2024-06-24 14:39:37 +08:00
zhangyanjiao
561146f52b fix(lwip): fixed the dhcp pool error on dhcp server 2024-06-24 14:21:28 +08:00
Jiang Jiang Jian
32c12e57da Merge branch 'contrib/github_pr_13951_v5.3' into 'release/v5.3'
Fix stack overflow bug for `examples/bluetooth/esp_hid_device` when using esp32s3 with nimble (GitHub PR) (v5.3)

See merge request espressif/esp-idf!31515
2024-06-24 14:05:08 +08:00
Marius Vikhammer
d6eedc04bf Revert "fix(intr): fixed intr threshhold min level on C5"
This reverts commit a6c2c4149d.
2024-06-24 13:57:57 +08:00
Marius Vikhammer
69ab9d7a17 Revert "fix(rom): fixed esprv_int_set_threshold on C5"
This reverts commit 171e0a21a1.
2024-06-24 13:57:57 +08:00
Shreyas Sheth
33e6eaaabf fix(wpa_supplicant): Fix wpa3 AP crash because of dangling pointer 2024-06-24 13:54:30 +08:00
wuzhenghui
04429c9042
change(esp_hw_support): update xtal_freq after assume to avoid mass print in DFS 2024-06-24 11:56:39 +08:00
wuzhenghui
6eae7bc996
change(esp_system): trigger digital system reset in brownout isr 2024-06-24 11:56:38 +08:00
wuzhenghui
dd5a5f1cf2
feat(esp_hw_support): support DCDC always on 2024-06-24 11:48:23 +08:00
wuzhenghui
79c48b4707
feat(esp_pm): add DCDC always on config 2024-06-24 11:48:18 +08:00
Marius Vikhammer
ce7393f67b Merge branch 'docs/esp32p4_storage_v5.3' into 'release/v5.3'
docs(storage): update esp32p4 storage programming guide (v5.3)

See merge request espressif/esp-idf!31600
2024-06-24 11:35:33 +08:00
Marius Vikhammer
fd6720c2e4 Merge branch 'fix/sdsdpi_example_esp32p4_add_ldo_config_v5.3' into 'release/v5.3'
fix(storage): Fix and update storage examples using SD cards for SoCs with SOC_SDMMC_IO_POWER_EXTERNAL 1 (ESP32-P4) (v5.3)

See merge request espressif/esp-idf!31029
2024-06-24 11:35:03 +08:00
morris
8562e3be12 fix(ci): build rmt examples as long as it's driver support is finished 2024-06-24 10:50:11 +08:00
cjin
f7baa7feb2 fix(ble): added c6 config check for ble light sleep 2024-06-24 10:40:46 +08:00
zwl
a21f65cb5b feat(bluetooth/controller): adjust bt/porting code structure and delete redundant code 2024-06-24 10:40:33 +08:00
zwl
430d65225e feat(bluetooth/controller): update controller api name on ESP32-C5 2024-06-24 10:39:28 +08:00
zwl
064fa71277 feat(bluetooth/controller): update controller api name on ESP32-C2 2024-06-24 10:39:28 +08:00
zwl
9fbec0a819 feat(bluetooth/controller): update controller api name on ESP32-C6 and ESP32-H2 2024-06-24 10:39:28 +08:00
Marius Vikhammer
cabf41c1c6 Merge branch 'ci/disable_c5_build_v5.3' into 'release/v5.3'
ci: disable failing esp32c5 builds (v5.3)

See merge request espressif/esp-idf!31571
2024-06-21 16:45:17 +08:00
Jakob Hasse
357e0f9bf1 docs(esp_hw_support): Adjusted RNG docs to reflect P4 changes 2024-06-21 09:58:08 +02:00
Jiang Jiang Jian
1b8bae3e15 Merge branch 'bugfix/wpa3_sta_mem_leak_v5.3' into 'release/v5.3'
Fix memory leak in wpa3 station mode (Backport v5.3)

See merge request espressif/esp-idf!31636
2024-06-21 13:38:55 +08:00
Marius Vikhammer
5d480b9e89 Merge branch 'ci/fix_misc_c5_ci_errors' into 'release/v5.3'
misc c5 ci errors (v5.3)

See merge request espressif/esp-idf!31625
2024-06-21 10:46:01 +08:00
Shyamal Khachane
9e95b9b29c fix(esp_wifi): Backport some fixes to v5.3
1. Fix issue of station PMF not getting reset when disconnecing from PMF connection
2. Fix a memory leak that occurs when the SAE connection is interrupted
3. Drop any received auth responses that use a different algorithm than the one currently in use
2024-06-20 15:29:05 +05:30
Konstantin Kondrashov
14d93dea75 feat(soc): Update efuse related soc_caps for c61 and c5 (MP/beta3) 2024-06-20 12:23:05 +08:00
Marius Vikhammer
7e5ab45fbb ci(rom): disable rom wdt test on C5 2024-06-20 12:22:56 +08:00
morris
1056a02ba9 Merge branch 'feat/esp32c5_mp_uart_support_v5.3' into 'release/v5.3'
feat(uart): support HP/LP uart on ESP32C5 MP (backport v5.3)

See merge request espressif/esp-idf!31445
2024-06-20 10:31:05 +08:00
Island
8bcedab874 Merge branch 'bugfix/free_memory_before_reattempt_v5.3' into 'release/v5.3'
fix(nimble): Clear resource before re-starting advertising (v5.3)

See merge request espressif/esp-idf!31570
2024-06-19 18:42:40 +08:00
sonika.rathi
dbe5a59412 docs(storage): update esp32p4 storage programming guide 2024-06-19 10:44:58 +02:00
Fu Hanxi
8a668d6c03
ci: disable failing esp32c5 builds 2024-06-18 08:27:00 +02:00
Rahul Tank
81b43829a2 fix(nimble): Clear resource before re-starting advertising 2024-06-18 11:11:29 +05:30
Sudeep Mohanty
ceb6ec92b3 docs(freertos): Enabled FreeRTOS docs for esp32c5
This commit enables the FreeRTOS doc build for esp32c5.
2024-06-17 08:53:48 +02:00
Mohammad-Mohsen Aseman-Manzar
8887599119 Fix stack overflow bug for examples/bluetooth/esp_hid_device when using esp32s3 with nimble
Related to 60354c39a9
2024-06-14 14:28:59 +05:30
Guillaume Souchere
32c6ee8532 change(heap): Remove todo of closed ticket in memory_layout.c files
Leftover closed ticket removed from memory_layout.c on
the following targets:
- esp32c5
- esp32c6
- esp32h2
2024-06-14 08:20:02 +02:00
Guillaume Souchere
2ac0fc1f6a change(heap): Update soc_memory_regions on esp32c5
The array of memory regions is simplyfied by using the
macro defined in soc.h (for beta3 and mp respectively).
2024-06-14 08:20:02 +02:00
Guillaume Souchere
79b7e2cd97 fix(soc): Fix ROM stack start for esp32c5-mp
Update the value SOC_ROM_STACK_START to the expected
value from bootloader.ld memory map.
2024-06-14 08:20:02 +02:00
Jiang Jiang Jian
7d47aecaa8 Merge branch 'bugfix/wifi-5610_v5.3' into 'release/v5.3'
backport v5.3: fix the issue of tbtt interrupt miss caused by beacon monitor

See merge request espressif/esp-idf!31498
2024-06-14 06:51:17 +08:00
Jiang Jiang Jian
e2c042da21 Merge branch 'bugfix/esp32c6_update_ld_v5.3' into 'release/v5.3'
fix(wifi):esp32c6 update ld(Backport v5.3)

See merge request espressif/esp-idf!31499
2024-06-14 06:14:19 +08:00
yinqingzhao
ce145a2c92 fix(wifi):esp32c6 update ld 2024-06-13 20:18:59 +08:00
Li Shuai
a3a9624ca2 fix(esp_wifi): fix the issue of tbtt interrupt miss caused by beacon monitor 2024-06-13 20:17:11 +08:00
Jiang Jiang Jian
e6230e49cb Merge branch 'feat/support_tg_retention_v5.3' into 'release/v5.3'
change(esp_hw_support): do TG WDT/Timer retention by needs (v5.3)

See merge request espressif/esp-idf!31486
2024-06-13 19:55:02 +08:00
Jiang Jiang Jian
9ddf01407f Merge branch 'bugfix/fix_ble_evt_time_v5.3' into 'release/v5.3'
fix(ble/controller): Update esp32 bt-lib (1e63e23) (v5.3)

See merge request espressif/esp-idf!31481
2024-06-13 19:54:30 +08:00
Jiang Jiang Jian
edc2bd8aab Merge branch 'bugfix/esp_rom_clic_thresh_bug_v5.3' into 'release/v5.3'
fix(rom): fixed esprv_int_set_threshold on C5/C61 (v5.3)

See merge request espressif/esp-idf!31490
2024-06-13 18:57:18 +08:00
Jiang Jiang Jian
a70355be55 Merge branch 'fix/fix_not_necessary_public_require_from_esp_system_to_btld_support_v5.3' into 'release/v5.3'
esp_system: fixed not necessary public require to bootloader_support (v5.3)

See merge request espressif/esp-idf!31453
2024-06-13 17:41:59 +08:00
Jiang Jiang Jian
02b60f59db Merge branch 'fix/backport_wifi_fixes_v5.3' into 'release/v5.3'
fix(wifi): backport some wifi fixes to v5.3

See merge request espressif/esp-idf!31476
2024-06-13 17:40:36 +08:00
linruihao
aaf371027d fix(bt/controller): Fixed assert issue caused by DPORT access 2024-06-13 17:37:39 +08:00
Marius Vikhammer
171e0a21a1 fix(rom): fixed esprv_int_set_threshold on C5 2024-06-13 16:47:48 +08:00
zhanghaipeng
f6348050e4 fix(ble/controller): Update esp32 bt-lib (1e63e23)
- Optimized GATT write and notify throughput on ESP32
- Fixed BLE connect timeout after using DTM on ESP32
- Added ke memory debug tools on ESP32
- Fixed memory leak issue when BLE SCAN and other event coexist on ESP32
2024-06-13 16:42:17 +08:00
wuzhenghui
2ab144dc3a
fix(esp_hw_support): set pau entry backup configuration with link update 2024-06-13 14:08:37 +08:00
wuzhenghui
1854036f92
change(esp_hw_support): use union retention link priority definiation 2024-06-13 14:08:37 +08:00
wuzhenghui
26cb10acbf
feat(esp_hw_support): optimize retention link info dump 2024-06-13 14:08:36 +08:00
Li Shuai
a27aa02fa3
fix(esp_hw_support): use iterator for regdma_link_stats to save stack consume
Closes https://github.com/espressif/esp-idf/issues/13288
2024-06-13 14:08:36 +08:00
wuzhenghui
a641428941
fix(ci): use esp_rom_crc32_le in sleep retention frame check 2024-06-13 14:08:35 +08:00
wuzhenghui
d917f0fa1b
ci(esp_driver_gptimer): add gptimer pd_top sleep retention test case 2024-06-13 14:08:35 +08:00
wuzhenghui
8093516420
ci(esp_system): add task watchdog pd_top sleep retention test case 2024-06-13 14:08:35 +08:00
wuzhenghui
3785506ec1
change(esp_driver_gptimer): do gptimer timer target retention by needs 2024-06-13 14:08:34 +08:00
wuzhenghui
ea142bb6d1
change(esp_hw_support): do timergroup watchdogs retention by needs 2024-06-13 14:08:26 +08:00
Jiang Jiang Jian
e282468502 Merge branch 'refactor/avoid_using_git_v5.3' into 'release/v5.3'
fix(tools): Avoiding crashing when Git is not present in system when acquiring IDF version (v5.3)

See merge request espressif/esp-idf!31432
2024-06-13 14:04:49 +08:00
Jiang Jiang Jian
3db95e4f0e Merge branch 'fix/cleanup_unaccessible_sha3_regs_v5.3' into 'release/v5.3'
fix(soc): Cleanup inaccessible SHA_3 registers from the header files (v5.3)

See merge request espressif/esp-idf!31440
2024-06-13 14:04:06 +08:00
Jiang Jiang Jian
ca36dff148 Merge branch 'docs/c5_core_docs_v5.3' into 'release/v5.3'
docs(core): update misc docs for C5 (v5.3)

See merge request espressif/esp-idf!31452
2024-06-13 14:03:45 +08:00
Jiang Jiang Jian
fea0f0cf26 Merge branch 'docs/fix_broken_links_v5.3' into 'release/v5.3'
docs(links): fix broken links found in CI (v5.3)

See merge request espressif/esp-idf!31271
2024-06-13 14:00:26 +08:00
Jiang Jiang Jian
c8264eb519 Merge branch 'docs/fix_doxygen_1_9_8_failure_v5.3' into 'release/v5.3'
docs(doxygen): fix misc issues with new version of doxygen (v5.3)

See merge request espressif/esp-idf!31186
2024-06-13 13:58:40 +08:00
Jiang Jiang Jian
7ac551b870 Merge branch 'docs/esp32p4_apptrace_v5.3' into 'release/v5.3'
docs(app_trace): Update docs for ESP32-P4 (v5.3)

See merge request espressif/esp-idf!31169
2024-06-13 13:58:00 +08:00
Jiang Jiang Jian
c48f84e0ac Merge branch 'fix/gdbgui_version_check_v5.3' into 'release/v5.3'
fix(tools): Use GDGBUI arguments based on its version (v5.3)

See merge request espressif/esp-idf!31037
2024-06-13 13:57:14 +08:00
Jiang Jiang Jian
4641392375 Merge branch 'feature/console_add_sbom_file_v5.3' into 'release/v5.3'
feat(system/console): Added argtable3 SBOM manifest file for SPDX file generation for console component (v5.3)

See merge request espressif/esp-idf!30943
2024-06-13 13:55:39 +08:00
Jiang Jiang Jian
7f0248f39a Merge branch 'docs/add_missing_usb_functions_to_esp32-c3_devkit_user_guides_v5.3' into 'release/v5.3'
Docs: Added missing USB functions to ESP32-C3 DevKit User Guides (v5.3)

See merge request espressif/esp-idf!30860
2024-06-13 13:54:43 +08:00
aditi_lonkar
3ccffd46f1 fix(esp_wifi): Fix for issue in changing opmode when wps is enabled 2024-06-13 11:51:25 +08:00
wangtao@espressif.com
c4bda59c31 fix(wifi): fix sta scan when connected cause bcn timeout loop issue 2024-06-13 11:50:45 +08:00
muhaidong
c3a47bf365 fix(wifi): fix configure gcmp failure issue 2024-06-13 11:50:01 +08:00
zhangyanjiao
687a40df4e fix(wifi): do not send null data when scan start/done for mesh
Closes https://github.com/espressif/esp-idf/issues/13786
2024-06-13 11:49:21 +08:00
muhaidong
3b0e048f0e fix(wifi): fixed disable gcmp choose pairwise cipher wrong issue 2024-06-13 11:48:27 +08:00
yinqingzhao
bbf0d76ac3 fix(wifi):fix data len not correct in he actions 2024-06-13 11:47:52 +08:00
Armando
cb8670e2bc ci(flash): temp disable SOC_SPI_MEM_SUPPORT_WRAP 2024-06-13 11:26:35 +08:00
Armando
d83e7ea505 fix(esp_system): fixed not necessary public require to bootloader_support 2024-06-13 11:26:35 +08:00
morris
f750f4c6f7 Merge branch 'feature/p4_lcdcam_dvp_cam_driver_v5.3' into 'release/v5.3'
feat(cam): add esp32-p4 lcd_cam dvp driver (v5.3)

See merge request espressif/esp-idf!31454
2024-06-13 11:04:54 +08:00
morris
10f8cc42fb Merge branch 'esp32p4/add_adc_support_v5.3' into 'release/v5.3'
feat(adc): support ADC oneshot/continuous mode on ESP32P4(v5.3)

See merge request espressif/esp-idf!31367
2024-06-13 11:00:59 +08:00
Island
321f51d416 Merge branch 'feat/add_hci_log_record_for_nimble_v5.3' into 'release/v5.3'
feat(bt/nimble): support hci log for nimble (backport v5.3)

See merge request espressif/esp-idf!31424
2024-06-13 10:44:16 +08:00
Aditya Patwardhan
e819b8c0b9 Merge branch 'fix/incorrect_pma_config_esp32p4_v5.3' into 'release/v5.3'
fix(esp_hw_support): Fix incorrect PMA configuration for ESP32-P4 (v5.3)

See merge request espressif/esp-idf!31431
2024-06-13 00:06:26 +08:00
zhiweijian
679df9ec6f feat(bt/nimble): support hci log for nimble 2024-06-12 19:24:36 +08:00
gaoxu
a326f15120 feat(adc): support ADC continuous mode on ESP32P4 2024-06-12 18:34:04 +08:00
gaoxu
cfc5da167d feat(soc): rename lp_adc and ahb_dma reg base on p4 2024-06-12 18:16:48 +08:00
gaoxu
e63d6582cc feat(adc): move adc periph enable/reset functions to ll layer 2024-06-12 18:16:45 +08:00
gaoxu
3f5037866b fix(dma): feat(adc): support ADC oneshot mod on ESP32P4 2024-06-12 18:16:41 +08:00
gaoxu
cf123b3626 feat(uart): support HP/LP uart on ESP32C5 MP v5.3 2024-06-12 18:15:22 +08:00
morris
7f0673f634 Merge branch 'refactor/emac_alloc_dma_buffer_v5.3' into 'release/v5.3'
refactor(emac): use heap component API to allocate cached aligned DMA buffer (v5.3)

See merge request espressif/esp-idf!31457
2024-06-12 17:27:30 +08:00
morris
54f30cc94b Merge branch 'feature/esp32c5mp_gdma_support_v5.3' into 'release/v5.3'
feat(gdma): add GDMA support for ESP32C5 MP (v5.3)

See merge request espressif/esp-idf!30897
2024-06-12 17:26:16 +08:00
Ivan Grokhotkov
fd7c809282 Merge branch 'fix/stray_sections_v5.3' into 'release/v5.3'
fix(system): print warning if stray section is found while linking (v5.3)

See merge request espressif/esp-idf!30948
2024-06-12 16:42:12 +08:00
Ivan Grokhotkov
ddbf9936d6 Merge branch 'feature/update-toolchain-to-esp-13.2.0_20240530_v5.3' into 'release/v5.3'
feat(tools): update toolchain version to esp-13.2.0_20240530 (v5.3)

See merge request espressif/esp-idf!31217
2024-06-12 16:35:50 +08:00
Song Ruo Jing
bbc44b486e feat(gdma): add GDMA support for ESP32C5 MP 2024-06-12 15:28:40 +08:00
Island
b4dc51b873 Merge branch 'bugfix/fix_no_mem_coex_issue_v5.3' into 'release/v5.3'
fix(nimble): Added change to handle extra memory for ext adv reattempt (v5.3)

See merge request espressif/esp-idf!31444
2024-06-12 14:10:14 +08:00
Island
46677555ed Merge branch 'bugfix/fix_ble_pktlen_change_v5.3' into 'release/v5.3'
Bugfix/fix ble pktlen change (v5.3)

See merge request espressif/esp-idf!31250
2024-06-12 14:06:39 +08:00
Jiang Jiang Jian
6e2950dde2 Merge branch 'backport/openthread_feature_53' into 'release/v5.3'
Backport some openthread related features (Backport v5.3)

See merge request espressif/esp-idf!30973
2024-06-12 14:03:18 +08:00
morris
c349247236 refactor(emac): use heap component API to allocate cached aligned DMA buffer 2024-06-12 13:51:17 +08:00
morris
367b0c16f1 Merge branch 'refactor/i2s_dma_buffer_allocation_v5.3' into 'release/v5.3'
refactor(i2s): clean up DMA buffer allocation (v5.3)

See merge request espressif/esp-idf!31451
2024-06-12 13:49:38 +08:00
Dong Heng
de0990e58c feat(cam): add esp32-p4 lcd_cam dvp driver 2024-06-12 11:35:51 +08:00
Marius Vikhammer
f1df3eb99b docs(core): update misc docs for C5 2024-06-12 10:24:33 +08:00
morris
7c62ad5434 Merge branch 'feature/ppa_add_test_cases_v5.3' into 'release/v5.3'
feat(ppa): add test cases to test PPA data correctness (v5.3)

See merge request espressif/esp-idf!31448
2024-06-12 10:22:17 +08:00
morris
8ae12473b5 refactor(i2s): clean up DMA buffer allocation 2024-06-12 10:16:24 +08:00
morris
f215c2fd41 Merge branch 'refactor/async_memcpy_allocate_dma_memory_v5.3' into 'release/v5.3'
refactor(async_memcpy): clean up memory allocation code (v5.3)

See merge request espressif/esp-idf!31429
2024-06-12 10:10:11 +08:00
Michael (XIAO Xufeng)
07d53ad11a Merge branch 'bugfix/sdmmc_psram_esp32s3_v5.3' into 'release/v5.3'
fix(sdmmc): fix invalid data when reading/writing PSRAM buffers (v5.3)

See merge request espressif/esp-idf!31362
2024-06-12 03:02:38 +08:00
Michael (XIAO Xufeng)
8377fe746a Merge branch 'fix/spi_sct_fix_descripter_oob_when_lager_then_4092_v5.3' into 'release/v5.3'
fix(spi_master): fix sct mode descripter oob when data lager then 4092 bytes (v5.3)

See merge request espressif/esp-idf!31089
2024-06-12 03:00:58 +08:00
Michael (XIAO Xufeng)
e38e1a0389 Merge branch 'bugfix/check_i2s_intr_alloc_failure_v5.3' into 'release/v5.3'
fix(i2s): check gdma callback register state and add missed port2 on p4 (v5.3)

See merge request espressif/esp-idf!31426
2024-06-12 02:21:20 +08:00
Michael (XIAO Xufeng)
0ef2599e3c Merge branch 'csi/add_no_backup_buffer_usage_verify_v5.3' into 'release/v5.3'
feat(csi): add verify to no backup buffer usage (v5.3)

See merge request espressif/esp-idf!30863
2024-06-12 02:07:32 +08:00
Michael (XIAO Xufeng)
98e99e712f Merge branch 'feature/esp32c5_mp_gpio_support_v5.3' into 'release/v5.3'
Feature/esp32c5 mp gpio support (v5.3)

See merge request espressif/esp-idf!30884
2024-06-12 00:51:06 +08:00
David Čermák
943dd72da0 Merge branch 'feature/esp_emac_improvements_v5.3' into 'release/v5.3'
Feature/esp emac improvements (v5.3)

See merge request espressif/esp-idf!31368
2024-06-11 23:44:01 +08:00
Song Ruo Jing
39d0f4b650 feat(ppa): add test cases to test PPA data correctness 2024-06-11 21:59:05 +08:00
Michael (XIAO Xufeng)
5c618745fe Merge branch 'feat/brownout_support_p4_v5.3' into 'release/v5.3'
feat(brownout): Add brownout detector support on esp32p4 (backport v5.3)

See merge request espressif/esp-idf!31094
2024-06-11 21:21:10 +08:00
Michael (XIAO Xufeng)
dbf8726b47 Merge branch 'feat/esp32p4_xip_psram_v5.3' into 'release/v5.3'
psram: support xip_psram on esp32p4 (v5.3)

See merge request espressif/esp-idf!31044
2024-06-11 21:07:41 +08:00
Rahul Tank
32a2ddceaa fix(nimble): Added change to handle extra memory for ext adv reattempt 2024-06-11 17:43:32 +05:30
harshal.patil
8445486303
fix(soc): Cleanup inaccessible SHA registers from the header files 2024-06-11 14:24:09 +05:30
morris
e207b08e28 Merge branch 'change/rm_esp_dma_x_usage_in_doc_v5_3' into 'release/v5.3'
change(dma): remove esp_dma_x usage in programming guide

See merge request espressif/esp-idf!31430
2024-06-11 16:41:07 +08:00
Jakub Kocka
4f11dd7e21 fix(tools): Avoid crashing when Git is used to acquire IDF version
Closes https://github.com/espressif/esp-idf/issues/13345
2024-06-11 09:39:09 +02:00
morris
1c6a8b4521 Merge branch 'refactor/esp_lcd_io_header_files_v5.3' into 'release/v5.3'
i80_lcd: add help function to allocate draw buffer with proper alignment (v5.3)

See merge request espressif/esp-idf!31428
2024-06-11 15:27:08 +08:00
morris
ffbb1aba5e Merge branch 'feat/isp_dvp_driver_v5.3' into 'release/v5.3'
isp: dvp driver (v5.3)

See merge request espressif/esp-idf!31261
2024-06-11 15:05:26 +08:00
Island
3ffea37812 Merge branch 'bugfix/esp32c2_fixed_some_ble_issues_master_v5.3' into 'release/v5.3'
Bugfix/esp32c2 fixed some ble issues master (v5.3)

See merge request espressif/esp-idf!31232
2024-06-11 14:55:43 +08:00
harshal.patil
0868604664
fix(esp_hw_support): Fix incorrect PMA configuration for ESP32-P4
- As the PMA entry that made some memory regions cacheable was
assigned the highest priority, some intermediate inaccessible
memory regions bypassed protection.

- Added tests for the same

- Verified that even after changing the priority of the PMA entry,
a write operation at SOC_IRAM_LOW + 0x40 (a random RAM cached address)
still needs the same number (29) of CPU cycles.
2024-06-11 12:23:06 +05:30
Armando
0b8952dc2e change(dma): remove esp_dma_x usage in programming guide 2024-06-11 14:35:57 +08:00
zwx
1de232fb98 feat(openthread): update BR lib 2024-06-11 14:25:45 +08:00
Xu Si Yu
15512f4170 fix(openthread): remove the empty task for openthread tasklets 2024-06-11 14:25:45 +08:00
zwx
fd0ea43496 fix(802.15.4): fixed ieee802154 will sleep when only pm enabled 2024-06-11 14:25:02 +08:00
zwx
5887426bad feat(802154): log buffer full message in debug mode only 2024-06-11 14:25:02 +08:00
Xu Si Yu
3860cc8dac feat(openthread): update openthread br lib 2024-06-11 14:25:01 +08:00
Xu Si Yu
3efe49f26a feat(openthread): support openthread ephemeral key 2024-06-11 14:25:01 +08:00
zwx
01e02aec6c fix(802.15.4): fix a risk for receive_at and ignore bit8 for the frame length 2024-06-11 14:25:01 +08:00
zwx
d6a3ed0637 feat(openthread): remove the range for some configurations 2024-06-11 14:25:01 +08:00
zwx
784abd1ae0 feat(openthread): move iperf dependency into cli extension 2024-06-11 14:25:01 +08:00
morris
b8122ec6b3 refactor(async_memcpy): clean up memory allocation code 2024-06-11 13:54:31 +08:00
morris
b6bc597903 feat(i80_lcd): add help function to allocate draw buffer with proper alignment 2024-06-11 13:50:38 +08:00
morris
33ac88cd31 change(esp_lcd): split header files by different IO interface 2024-06-11 13:50:37 +08:00
morris
dafc3b3cd5 Merge branch 'feat/gdma_set_burst_size_v5.3' into 'release/v5.3'
feat(gdma): return alignment constraints required by the GDMA channel (v5.3)

See merge request espressif/esp-idf!31113
2024-06-11 11:59:03 +08:00
Island
bee6044a24 Merge branch 'doc/update_readme_enc_adv_v5.3' into 'release/v5.3'
docs(nimble): Added chip information in enc_adv example README file (v5.3)

See merge request espressif/esp-idf!30773
2024-06-11 11:01:02 +08:00
Island
84660a822a Merge branch 'bugfix/ble_gap_unpair_error_code_v5.3' into 'release/v5.3'
fix(nimble): Added return code in ble_gap_unpair error logs (v5.3)

See merge request espressif/esp-idf!31307
2024-06-11 11:00:49 +08:00
Island
bde502ed27 Merge branch 'bugfix/bleqabr24-549_v5.3' into 'release/v5.3'
fix(ble_mesh): fix issues in mesh deinit_v5.3

See merge request espressif/esp-idf!30540
2024-06-11 11:00:10 +08:00
Island
5634a3260e Merge branch 'feat/add_api_to_set_privacy_mode_v5.3' into 'release/v5.3'
feat(bt/bluedroid): support BLE set privacy mode (v5.3)

See merge request espressif/esp-idf!30906
2024-06-11 10:59:54 +08:00
laokaiyao
cd4c71e20f fix(i2s): add the missed port2 for p4 2024-06-11 10:59:05 +08:00
laokaiyao
ab81888705 fix(i2s): add check to gdma callback register 2024-06-11 10:55:22 +08:00
Jiang Jiang Jian
67f0bfa8bc Merge branch 'fix/ble_mesh_sar_bugfix_v5.3' into 'release/v5.3'
BLE Mesh SAR bugfix (v5.3)

See merge request espressif/esp-idf!30881
2024-06-11 10:49:52 +08:00
Jiang Jiang Jian
421c94ded5 Merge branch 'fix/ble_mesh_gatts_bugfix_v5.3' into 'release/v5.3'
BLE Mesh Gatts bugfix (v5.3)

See merge request espressif/esp-idf!30872
2024-06-11 10:49:09 +08:00
Jiang Jiang Jian
a31806d076 Merge branch 'feature/esp32c6_pu8m_in_sleep_support_v5.3' into 'release/v5.3'
feat(sleep): support 8m force pu in sleep for esp32c6 & esp32h2 (v5.3)

See merge request espressif/esp-idf!30999
2024-06-11 10:48:05 +08:00
Jiang Jiang Jian
da43ec0425 Merge branch 'fix/assert_in_bt_controller_v5.3' into 'release/v5.3'
fix(bt): fix some issues in bluetooth controller(backport v5.3)

See merge request espressif/esp-idf!31321
2024-06-11 10:45:17 +08:00
Jiang Jiang Jian
832337bdee Merge branch 'fix/support_union_lp_io_clk_control_v5.3' into 'release/v5.3'
fix(esp_driver_gpio): manage lp_io module clock by driver (v5.3)

See merge request espressif/esp-idf!31359
2024-06-11 10:45:00 +08:00
Jiang Jiang Jian
9230a25140 Merge branch 'bugfix/fix_lp_half_world_access_v5.3' into 'release/v5.3'
fix(hal): fix LP timer / PMU LL half word access (v5.3)

See merge request espressif/esp-idf!31386
2024-06-11 10:44:34 +08:00
Jiang Jiang Jian
f20f0ae8d1 Merge branch 'doc/update_esp32c6_power_statics_5.3' into 'release/v5.3'
docs(lowpower): updating low-power statistics in Wi-Fi scenarios (v5.3)

See merge request espressif/esp-idf!31209
2024-06-11 10:43:49 +08:00
Jiang Jiang Jian
726ed08ee2 Merge branch 'bugfix/mldv6_report_memory_leak_v5.3' into 'release/v5.3'
fix(esp_netif): Fix mldv6 report memory leak in esp_netif(v5.3)

See merge request espressif/esp-idf!31064
2024-06-11 10:43:14 +08:00
Jiang Jiang Jian
5feffad9a1 Merge branch 'bugfix/pm-108_v5.3' into 'release/v5.3'
backport v5.3: fix the issue of tg0 watchdog reset caused by wifi module retention

See merge request espressif/esp-idf!31011
2024-06-11 10:42:38 +08:00
Jiang Jiang Jian
eac00e82d1 Merge branch 'bugfix/loadprohibited_after_bt_deinit_v5.3' into 'release/v5.3'
Fixed some coexist issues

See merge request espressif/esp-idf!31003
2024-06-11 10:42:16 +08:00
Armando
dbccfbb2e7 change(isp): don't init unnecessary isp pipeline items when doing isp_new_processor 2024-06-11 10:18:16 +08:00
Armando
be9c4ebf44 fix(isp): reverted only raw8 input limits 2024-06-11 10:18:16 +08:00
Armando
de1d006ba3 change(isp): change isp_af_window_t to isp_window_t 2024-06-11 10:18:16 +08:00
Armando
f58b63d31e test(isp_dvp): added isp_dvp test 2024-06-11 10:18:16 +08:00
Armando
9713bd63a4 fix(csi): fixed csi wrong state machine settings 2024-06-11 10:18:16 +08:00
Armando
05f44bddf0 feat(isp): added isp dvp driver 2024-06-11 10:18:16 +08:00
morris
65d9300b5c Merge branch 'bugfix/esp32h2_iomux_retention_v5.3' into 'release/v5.3'
fix(gpio): fix IO 21-27 IOMUX registers not being backed up on ESP32H2 (v5.3)

See merge request espressif/esp-idf!31190
2024-06-11 10:01:07 +08:00
Marius Vikhammer
0a3d59a4fa Merge branch 'docs/update_getting_started_for_esp32p4_support_v5.3' into 'release/v5.3'
Docs/update getting started for esp32p4 support (v5.3)

See merge request espressif/esp-idf!31114
2024-06-11 09:44:13 +08:00
Marius Vikhammer
45c7eb4d4b Merge branch 'feature/make_heap_alloc_caps_align_memory2_v5.3' into 'release/v5.3'
Align memory requested from heap component to hw requirements (v5.3)

See merge request espressif/esp-idf!31195
2024-06-11 09:42:04 +08:00
Marius Vikhammer
a71f265d25 Merge branch 'feature/lp_core_intr_panic_v5_3' into 'release/v5.3'
feat(ulp): support interrupts and panic for C6/P4 LP core (v5.3)

See merge request espressif/esp-idf!31189
2024-06-11 09:41:51 +08:00
Marius Vikhammer
b2dcc24335 Merge branch 'bugfix/clic_intr_thresh_v5.3' into 'release/v5.3'
fix(intr): fixed intr threshhold min level on C5 (v5.3)

See merge request espressif/esp-idf!31272
2024-06-11 09:41:31 +08:00
Marius Vikhammer
88c0ea49e3 Merge branch 'feat/ai_coproc_support_esp32p4_v5.3' into 'release/v5.3'
feat(riscv): add support for PIE coprocessor and HWLP feature (backport v5.3)

See merge request espressif/esp-idf!31020
2024-06-11 09:41:06 +08:00
Michael (XIAO Xufeng)
cc869c6ab5 Merge branch 'refactor/usb_mock_classes_v5.3' into 'release/v5.3'
refactor(usb): Split test device descriptors from mock classes (v5.3)

See merge request espressif/esp-idf!31413
2024-06-11 00:41:53 +08:00
Michael (XIAO Xufeng)
87fd8b41d8 Merge branch 'bugfix/jpeg_error_handle_v5.3' into 'release/v5.3'
fix(jpeg): Modify jpeg deocde/encode error handling logic (backport v5.3)

See merge request espressif/esp-idf!31159
2024-06-10 03:28:52 +08:00
C.S.M
fccc309499 fix(jpeg): Modify jpeg deocde/encode error handling logic (backport v5.3) 2024-06-10 03:28:52 +08:00
Michael (XIAO Xufeng)
9aea2d3395 Merge branch 'fix/peripheral_driver_kconfig_inconsistence_v5.3' into 'release/v5.3'
fix(kconfig): fixed peripheral driver kconfig inconsistencies (v5.3)

See merge request espressif/esp-idf!31294
2024-06-10 03:27:38 +08:00
Darian Leung
6192507987
fix(usb): Make string descriptor checks in unit tests optional
Checking for an exact match for product or serial and string descriptors can
lead to test failures if the USB devices connected to the runner is changed. This
commit adds some kconfig options to make the string descriptor checks optional,
with the product and serial string checks being disabled by default.
2024-06-09 12:34:37 +08:00
Darian Leung
7f61f74aa0
refactor(usb): Split test device descriptors from mock class files
Previously, descriptors of the test devices were stored direclty in the mock
device files (e.g., "mock_[hid|msc].[h|c]"). This commit splits out the device
descriptors to separate files (e.g., "dev_[hid|msc].c") along with getter
functions.

Users that want to run the tests locally on a different device simply need to
update the "dev_[hid|msc].c" file for their device.
2024-06-09 10:43:25 +08:00
Darian Leung
7474a450c2
refactor(usb): Rename mock class files
- Rename "test_usb_mock_..." class files to "mock_..."
- Fixed some codespell issues
- Fixed comment spacing
2024-06-09 10:43:20 +08:00
morris
41515a9086 Merge branch 'feature/parlio_rx_driver_p4_v5.3' into 'release/v5.3'
feat(parlio_rx): supported parlio rx on p4 (v5.3)

See merge request espressif/esp-idf!31096
2024-06-07 22:54:08 +08:00
morris
4787e928a2 Merge branch 'feat/isp_bf_feature_v5.3' into 'release/v5.3'
feat(isp): added isp bf driver (v5.3)

See merge request espressif/esp-idf!31067
2024-06-07 22:52:17 +08:00
morris
c9f8fc0405 Merge branch 'fix/example_blink_esp32h2_v5.3' into 'release/v5.3'
fix(blink): fix sdkconfig defaults name for esp32h2 (v5.3)

See merge request espressif/esp-idf!31340
2024-06-07 22:50:31 +08:00
morris
12d480423b Merge branch 'feature/esp32p4_ppa_driver_support_v5.3' into 'release/v5.3'
feat(ppa): add PPA driver support for ESP32P4 (v5.3)

See merge request espressif/esp-idf!31074
2024-06-07 22:48:49 +08:00
morris
e148263565 Merge branch 'bugfix/mipi_dsi_rgb666_color_pixel_v5.3' into 'release/v5.3'
fix(dsi): fixed wrong RGB666 pixel size (v5.3)

See merge request espressif/esp-idf!31152
2024-06-07 22:47:47 +08:00
morris
5d844e57ed change(rgb_lcd): set DMA transfer burst size 2024-06-07 22:44:18 +08:00
morris
b2ff20d94c change(i80_lcd): set DMA transfer burst size 2024-06-07 22:44:18 +08:00
morris
e8852d5c38 change(async_memcpy): set DMA transfer burst size 2024-06-07 22:44:18 +08:00
morris
2f0c9b3584 feat(gdma): set burst size and return alignment constraint
burst size can affect the buffer alignment
2024-06-07 22:44:18 +08:00
Ondrej Kosta
09cbbaaf7c fix(esp_eth): Fixed another memory leak ESP MAC 2024-06-07 15:26:18 +02:00
Ondrej Kosta
dab7fdd6f0 fix(esp_eth): fixing memory leak and invalid bit shift 2024-06-07 15:26:18 +02:00
Ondrej Kosta
d6b3b8feeb feat(esp_eth): added example to deinit Ethernet 2024-06-07 15:26:18 +02:00
Ondrej Kosta
f6420436eb feat(esp_eth): a new folder structure of the driver and other improvements
Fixed memory leak in emac_esp_new_dma function.

Polished ESP EMAC cache management.

Added emac_periph definitions based on SoC features and improved(generalized) ESP EMAC GPIO
initialization.

Added ESP EMAC GPIO reservation.

Added check for frame error condition indicated by EMAC DMA and created a target test.
2024-06-07 15:26:18 +02:00
Aditya Patwardhan
23cfe0826b Merge branch 'fix/aes_operation_using_psram_memory_with_psram_enc_v5.3' into 'release/v5.3'
Enable AXI-DMA AES-ECC mean access when external memory encryption is enabled (v5.3)

See merge request espressif/esp-idf!30822
2024-06-07 19:17:38 +08:00
Aditya Patwardhan
30ea848335 Merge branch 'feature/update_cjson_version_to_1.7.18_v5.3' into 'release/v5.3'
feat(cjson): update submodule to v1.7.18 (v5.3)

See merge request espressif/esp-idf!31014
2024-06-07 19:17:23 +08:00
wuzhenghui
6a86351373
fix(hal): fix PMU LL half word and byte access 2024-06-07 14:13:40 +08:00
wuzhenghui
e5429b256a
fix(hal): fix LP timer LL half word access 2024-06-07 14:13:39 +08:00
C.S.M
4daaa9c587 fix(bod): Disable fib in bootloader so that interrupt can be triggered properly 2024-06-07 10:38:14 +08:00
wuzhenghui
091da3d631
fix(esp_driver_gpio): manage lp_io module clock by driver
Closes https://github.com/espressif/esp-idf/issues/13683
2024-06-06 19:27:57 +08:00
Ivan Grokhotkov
c8474d48f8
fix(sdmmc): fix invalid data when reading/writing PSRAM buffers
Previous commit has enabled buffers in PSRAM for ESP32-P4. But this
also caused a regression for ESP32-S3, where PSRAM is not DMA capable.
This commit re-introduces the check for esp_ptr_external_ram in case
SOC_SDMMC_PSRAM_DMA_CAPABLE is not set.
2024-06-06 10:44:53 +02:00
Anton Maklakov
6e7a9de65e fix(blink): fix sdkconfig defaults name 2024-06-05 16:30:23 +07:00
gongyantao
6cd960928a fix(bt): fix some issues in bluetooth controller
1: fix return incorrect link key with hci command rd_stored_link_key
2: fix the assert triggered during APB TX
3: fix role switch LMP collision bug
2024-06-05 09:05:29 +08:00
Alexey Lapshin
b07a1470c5 feat(tools): update toolchain version to esp-13.2.0_20240530 2024-06-04 18:35:17 +04:00
Abhinav Kudnar
737b5edd5b fix(nimble): Added return code in ble_gap_unpair error logs 2024-06-04 14:46:13 +05:30
laokaiyao
d9f9f79270 fix(kconfig): fixed peripheral driver kconfig inconsistencies 2024-06-04 10:19:31 +08:00
Marius Vikhammer
a6c2c4149d fix(intr): fixed intr threshhold min level on C5 2024-06-03 12:44:32 +08:00
Marius Vikhammer
fe32b34b20 docs(links): fix broken links found in CI 2024-06-03 12:42:25 +08:00
zhanghaipeng
1542b768fd fix(ble/bluedroid): Optimize BLE stack connect callback name 2024-06-02 17:36:35 +08:00
zhanghaipeng
e10c977834 fix(ble/bluedroid): Fixed BLE no data length change event 2024-06-02 17:36:35 +08:00
zwl
9ab7f325cc ble: fixed ble some issues on esp32c6 and esp32h2 2024-05-31 17:13:31 +08:00
zwl
bbe96641b1 ble: fixed ble some issues on esp32c2 2024-05-31 17:13:31 +08:00
wuzhenghui
3a5ba85419
docs(lowpower): updating low-power statistics in Wi-Fi scenarios 2024-05-30 21:54:32 +08:00
luoxu
a168f4cc9b fix(ble_mesh): fix issues in mesh deinit 2024-05-30 20:37:31 +08:00
Jeroen Domburg
df4195062d change(system): heap_caps_alloc returns aligned memory if caps indicate a need for it
The implicit promise of heap_alloc_caps() and friends is that the memory it
returns is fit for the purpose as requested in the caps field. Before
this commit, that did not happen; e.g. DMA-capable memory wass returned
from a correct region, but not aligned/sized to something the DMA subsystem
can handle.

This commit adds an API to the esp_mm component that is then used by the
heap component to adjust allocation alignment, caps and size dependent on
the hardware requirement of the requested allocation caps.
2024-05-30 16:02:03 +08:00
Song Ruo Jing
8800e9d0e5 fix(gpio): fix IO 21-27 IOMUX registers not being backed up on ESP32H2 2024-05-30 15:13:58 +08:00
Marius Vikhammer
2f1b81cd14 feat(ulp): add pulse counter example for lp core 2024-05-30 14:41:47 +08:00
Marius Vikhammer
87d4172ee5 feat(ulp): add lp core panic handler 2024-05-30 14:41:31 +08:00
Marius Vikhammer
7f9b5deae1 feat(ulp): support interrupts for C6/P4 LP core
Closes https://github.com/espressif/esp-idf/issues/13059
2024-05-30 14:40:23 +08:00
Marius Vikhammer
3d959421b1 docs(doxygen): fix misc issues with new version of doxygen 2024-05-30 13:42:06 +08:00
Li Shuai
52a922f953 fix(wifi): fixed the issue of tg0 watchdog reset caused by wifi module retention 2024-05-29 20:50:53 +08:00
David Cermak
baf6028974 fix(docs): tcpip_adapter: Document replacement of tcpip_adapter_get_sta_list 2024-05-29 13:44:26 +02:00
Alexey Gerenkov
60c2068fef docs(app_trace): Update docs for ESP32-P4 2024-05-29 14:31:34 +03:00
Song Ruo Jing
10f89fe52e fix(ppa): fix mismatching writeback and invalidate data size on the same buffer 2024-05-29 14:35:26 +08:00
morris
b1b182f258 change(dsi): use DW_GDMA as the flow controller
previously the DSI_Bridge was set as the flow controller
2024-05-29 12:32:03 +08:00
morris
1129f0834e fix(dsi): fixed wrong RGB666 pixel size 2024-05-29 12:32:03 +08:00
Armando
58ebdb7ae3 change(image): move image_process driver from bootloader_support to esp_system 2024-05-29 10:02:44 +08:00
Armando
48e06fafea feat(xip_psram): support xip psram feature on esp32p4 2024-05-29 10:02:44 +08:00
Wang Fang
6bb35c551c docs: Updated Getting Started for ESP32-P4 support 2024-05-28 11:52:06 +08:00
gaoxu
0be44b6ccc feat(gpio): fix gpio matrix const input addr on C5 MP 2024-05-27 18:13:58 +08:00
gaoxu
bf604e91a6 feat(gpio): remove io_mux_reg array in gpio_periph.c from c5 2024-05-27 18:13:42 +08:00
laokaiyao
dcc7cf9379 feat(parlio_rx): support parlio rx on p4 2024-05-27 17:20:15 +08:00
C.S.M
5a7a9c0638 test(esp_intr_dump): Fix the esp intr dump expected output because the changes happened in brownout 2024-05-27 16:41:18 +08:00
C.S.M
91cedfe89d feat(brownout): Add brownout detector support on esp32p4 2024-05-27 16:40:45 +08:00
wanlei
0d94b1cd89 fix(spi_master): fix sct mode descripter oob when data lager then 4092 bytes 2024-05-27 15:01:38 +08:00
Song Ruo Jing
1b1005a1d8 feat(ppa): add PPA driver support for ESP32P4 2024-05-27 11:34:47 +08:00
Armando
cc48efc6ec feat(isp): added isp bf driver 2024-05-24 16:46:00 +08:00
WanqQixiang
88b300d064 fix(esp_netif): Fix mldv6 report memory leak in esp_netif 2024-05-24 15:33:55 +08:00
Armando
f9b58b0c73 change(mmu): fix spell issue 2024-05-23 15:42:04 +08:00
luoxu
3a7aafe7d6 fix(ble_mesh): change tx/rx lock to recursive mutex to avoid dead lock 2024-05-23 15:41:58 +08:00
luoxu
e23d24a65d fix(ble_mesh): reference net_buf on correct positions 2024-05-23 15:41:58 +08:00
Armando
687064b2f8 change(cpu_start): added note about internal ram only stage 2024-05-23 15:41:35 +08:00
Armando
168ff6e268 bugfix(cpu_start): check c3 efuse error log on ram app condition
Prior to this commit, esp_efuse_check_errors() is only called when it's
2nd stage btld app.

This commit moves this error check so under all conditions (including
ram app, pure ram app) will check this efuse error
2024-05-23 15:41:30 +08:00
Armando
8e66d38959 refactor(cpu_start): move uni/multi core log later 2024-05-23 15:41:25 +08:00
Roland Dobai
5890c7450d fix(tools): Use GDGBUI arguments based on its version
Closes https://github.com/espressif/esp-idf/issues/13665
2024-05-23 07:35:55 +02:00
luoxu
2c96e097c9 fix(ble_mesh): Create service after service register success 2024-05-23 12:16:46 +08:00
Adam Múdry
f3b7e0502a ci(examples/storage): Enable perf_benchmark spiflash example and build others 2024-05-22 17:00:53 +02:00
Adam Múdry
2f10ca582b fix(storage): Fix SD card examples for SoCs with SOC_SDMMC_IO_POWER_EXTERNAL 1 2024-05-22 17:00:53 +02:00
Omar Chebib
0928ff027b fix(riscv): make HWLP feature use direct saving of lazy saving 2024-05-22 16:58:31 +08:00
Omar Chebib
6eba7a536a feat(riscv): add support for PIE coprocessor and HWLP feature
FreeRTOS tasks may now freely use the PIE coprocessor and HWLP feature.
Just like the FPU, usiing these coprocessors result in the task being pinned
to the core it is currently running on.
2024-05-22 16:58:31 +08:00
nilesh.kale
75faae29a8 feat(cjson): update submodule to v1.7.18
Changelog: https://github.com/DaveGamble/cJSON/releases/tag/v1.7.18
2024-05-22 13:34:31 +05:30
baohongde
0c3a0d6c9a fix(coex): Fixed some coexist issues
- Fixed crash issue in coexist callback
- Fixed coexist scheme status update issue
2024-05-22 11:51:44 +08:00
chenjianhua
9f04d1ac36 fix(bt): Update bt lib for ESP32-C3 and ESP32-S3(a771b7c)
- Fixed assert when starting advertising due to preemption
- Fixed RPA generation after each reboot
- Fixed RPA renew timer start and stop
2024-05-22 11:51:44 +08:00
chaijie@espressif.com
b8d9da5c03 feat(sleep): support 8m force pu in sleep for esp32c6/esp32h2 2024-05-22 11:35:00 +08:00
chenjianhua
52b9c5d666 feat(bt/bluedroid): support BLE set privacy mode 2024-05-22 10:43:37 +08:00
gaoxu
ce7ceb8d9d feat(csi): add verify to no backup buffer usage 2024-05-21 15:36:34 +08:00
Alexey Lapshin
89218b35e4 fix(system): place idf's stray sections while linking 2024-05-20 13:31:04 +04:00
Xiaoyu Liu
9ebc8f02a9 feat(system/console): Added argtable3 SBOM manifest file in console component for SPDX file generation 2024-05-20 15:04:27 +08:00
harshal.patil
0c5bce6918 fix(bootloader_support): Make esp_flash_encrypt.h independent of spi_flash_mmap.h header 2024-05-20 14:40:49 +08:00
harshal.patil
bef1fba3bc fix(mbedtls/crypto_shared_gdma): Enable AXI-DMA enable external memory AES-ECC access
- When external memory encryption is enabled, set the aes_ecc bit of AXI-DMA to enable memory access
2024-05-20 14:40:49 +08:00
gaoxu
7403b8d68d feat(rom): update c5 mp verison rom ld file 2024-05-16 15:03:21 +08:00
gaoxu
f27e117b5b feat(gpio): update gpio docs on ESP32C5 MP version 2024-05-16 15:02:55 +08:00
gaoxu
a621402e1f feat(pm): add SOC_PM_SUPPORTED in soc caps 2024-05-16 15:00:22 +08:00
gaoxu
a08558a853 feat(coredump): replace fun sel function 2024-05-16 14:58:52 +08:00
gaoxu
2cad39aee5 feat(gpio): add gpio support on ESP32C5 MP version 2024-05-16 14:54:27 +08:00
wangning
173bb82f45 docs(esp32c3): Added missing USB functions to esp32-c3 devkit user guides 2024-05-16 10:56:53 +08:00
Rahul Tank
2f6fb59b6b docs(nimble): Added chip information in ble_enc_adv README file 2024-05-15 15:35:33 +05:30
847 changed files with 24640 additions and 12845 deletions

View File

@ -1,4 +1,4 @@
[codespell]
skip = build,*.yuv,components/fatfs/src/*,alice.txt,*.rgb,components/wpa_supplicant/*,components/esp_wifi/*
ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart
ignore-words-list = ser,dout,rsource,fram,inout,shs,ans,aci,unstall,unstalling,hart,wheight,ot
write-changes = true

4
.gitmodules vendored
View File

@ -49,12 +49,12 @@
[submodule "components/json/cJSON"]
path = components/json/cJSON
url = ../../DaveGamble/cJSON.git
sbom-version = 1.7.17
sbom-version = 1.7.18
sbom-cpe = cpe:2.3:a:cjson_project:cjson:{}:*:*:*:*:*:*:*
sbom-supplier = Person: Dave Gamble
sbom-url = https://github.com/DaveGamble/cJSON
sbom-description = Ultralightweight JSON parser in ANSI C
sbom-hash = 87d8f0961a01bf09bef98ff89bae9fdec42181ee
sbom-hash = acc76239bee01d8e9c858ae2cab296704e52d916
[submodule "components/mbedtls/mbedtls"]
path = components/mbedtls/mbedtls

21
Kconfig
View File

@ -607,6 +607,27 @@ mainmenu "Espressif IoT Development Framework Configuration"
default "gcc" if COMPILER_RT_LIB_GCCLIB
default "" if COMPILER_RT_LIB_HOST
choice COMPILER_ORPHAN_SECTIONS
prompt "Orphan sections handling"
default COMPILER_ORPHAN_SECTIONS_PLACE
depends on !IDF_TARGET_LINUX
help
If the linker finds orphan sections, it attempts to place orphan sections after sections of the same
attribute such as code vs data, loadable vs non-loadable, etc.
That means that orphan sections could placed between sections defined in IDF linker scripts.
This could lead to corruption of the binary image. Configure the linker action here.
config COMPILER_ORPHAN_SECTIONS_WARNING
bool "Place with warning"
help
Places orphan sections without a warning message.
config COMPILER_ORPHAN_SECTIONS_PLACE
bool "Place silently"
help
Places orphan sections without a warning/error message.
endchoice
endmenu # Compiler Options
menu "Component config"

View File

@ -17,6 +17,7 @@
#include "esp_image_format.h"
#include "esp_secure_boot.h"
#include "esp_flash_encrypt.h"
#include "spi_flash_mmap.h"
#include "sdkconfig.h"
#include "esp_ota_ops.h"

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
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@ -208,12 +210,55 @@ SECTIONS
*/
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View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
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.dram0.data :
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*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
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*(.gcc_except_table)
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/* C++ constructor and destructor tables, properly ordered: */
@ -218,6 +220,57 @@ SECTIONS
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.riscv.attributes 0: { *(.riscv.attributes) }
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* Discarding .rela.* sections results in the following mapping:
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/DISCARD/ : { *(.rela.*) }
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/**

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
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/* C++ constructor and destructor tables, properly ordered: */
@ -218,6 +220,58 @@ SECTIONS
_etext = .;
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.riscv.attributes 0: { *(.riscv.attributes) }
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View File

@ -139,6 +139,7 @@ SECTIONS
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@ -217,6 +219,58 @@ SECTIONS
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/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@ -138,6 +138,7 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@ -163,6 +164,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@ -216,6 +218,58 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -138,6 +138,7 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@ -163,6 +164,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@ -216,6 +218,58 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@ -138,6 +138,7 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@ -163,6 +164,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@ -216,6 +218,58 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -138,7 +138,7 @@ SECTIONS
.dram0.data :
{
_data_start = ABSOLUTE(.);
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@ -164,6 +164,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@ -217,6 +218,58 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}
/**

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -131,9 +131,15 @@ SECTIONS
_bss_end = ABSOLUTE(.);
} > dram_seg
.dram0.data :
.dram0.bootdesc : ALIGN(0x10)
{
_data_start = ABSOLUTE(.);
*(.data_bootloader_desc .data_bootloader_desc.*) /* Should be the first. Bootloader version info. DO NOT PUT ANYTHING BEFORE IT! */
} > dram_seg
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@ -159,6 +165,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@ -212,6 +219,58 @@ SECTIONS
_etext = .;
} > iram_seg
.riscv.attributes 0: { *(.riscv.attributes) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
/**
* Discarding .rela.* sections results in the following mapping:
* .rela.text.* -> .text.*
* .rela.data.* -> .data.*
* And so forth...
*/
/DISCARD/ : { *(.rela.*) }
}

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -108,6 +108,7 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@ -133,6 +134,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@ -205,4 +207,48 @@ SECTIONS
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
.xtensa.info 0: { *(.xtensa.info) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
}

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -142,6 +142,7 @@ SECTIONS
.dram0.data :
{
*(.dram1 .dram1.*) /* catch stray DRAM_ATTR */
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
@ -167,6 +168,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame_hdr)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
@ -239,6 +241,50 @@ SECTIONS
KEEP (*(.xt.lit .gnu.linkonce.p.*))
}
.xtensa.info 0: { *(.xtensa.info) }
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.debug_pubtypes 0 : { *(.debug_pubtypes) }
/* DWARF 3 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* GNU DWARF 2 extensions */
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
/* DWARF 4 */
.debug_types 0 : { *(.debug_types) }
/* DWARF 5 */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.comment 0 : { *(.comment) }
.note.GNU-stack 0: { *(.note.GNU-stack) }
}
/**

View File

@ -13,6 +13,9 @@
#include "hal/efuse_ll.h"
#include "hal/efuse_hal.h"
#ifndef BOOTLOADER_BUILD
#include "spi_flash_mmap.h"
#endif
#include "hal/spi_flash_ll.h"
#include "rom/spi_flash.h"
#if CONFIG_IDF_TARGET_ESP32

View File

@ -22,7 +22,7 @@
#include "hal/cache_hal.h"
#include "hal/cache_ll.h"
void bootloader_flash_update_id()
void IRAM_ATTR bootloader_flash_update_id()
{
esp_rom_spiflash_chip_t *chip = &rom_spiflash_legacy_data->chip;
chip->device_id = bootloader_read_flash_id();

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2010-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -10,6 +10,7 @@
#include <stdbool.h>
#include "soc/soc.h"
#include "soc/ext_mem_defs.h"
#include "soc/soc_caps.h"
#include "sdkconfig.h"
#include "esp_attr.h"
@ -179,6 +180,31 @@ inline static bool esp_ptr_in_tcm(const void *p) {
#endif //#if SOC_MEM_TCM_SUPPORTED
/** End of the common section that has to be in sync with esp_memory_utils.h **/
/**
* @brief Check if the pointer is in PSRAM vaddr space
*
* @note This function is only used when in bootloader, where the PSRAM isn't initialised.
* This function simply check if the pointer is the in the PSRAM vaddr space.
* The PSRAM vaddr space is not always the same as the actual PSRAM vaddr range used in APP
*
* @param p pointer
*
* @return true: is in PSRAM; false: not in PSRAM
*/
__attribute__((always_inline))
inline static bool esp_ptr_in_extram(const void *p) {
bool valid = false;
#if SOC_IRAM_PSRAM_ADDRESS_LOW
valid |= ((intptr_t)p >= SOC_IRAM_PSRAM_ADDRESS_LOW && (intptr_t)p < SOC_IRAM_PSRAM_ADDRESS_HIGH);
#endif
#if SOC_DRAM_PSRAM_ADDRESS_LOW
valid |= ((intptr_t)p >= SOC_DRAM_PSRAM_ADDRESS_LOW && (intptr_t)p < SOC_DRAM_PSRAM_ADDRESS_HIGH);
#endif
return valid;
}
/** Don't add new functions below **/
#ifdef __cplusplus

View File

@ -9,9 +9,6 @@
#include "esp_attr.h"
#include "esp_err.h"
#include "soc/soc_caps.h"
#ifndef BOOTLOADER_BUILD
#include "spi_flash_mmap.h"
#endif
#include "hal/efuse_ll.h"
#include "sdkconfig.h"

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -37,8 +37,8 @@ esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, ui
esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio_level(uint32_t num_pin, uint32_t delay_sec, bool level)
{
esp_rom_gpio_pad_select_gpio(num_pin);
if (GPIO_PIN_MUX_REG[num_pin]) {
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[num_pin]);
if (((1ULL << num_pin) & SOC_GPIO_VALID_GPIO_MASK) != 0) {
gpio_ll_input_enable(&GPIO, num_pin);
}
esp_rom_gpio_pad_pullup_only(num_pin);
uint32_t tm_start = esp_log_early_timestamp();

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@ -13,7 +13,7 @@
#include "soc/gpio_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/rtc.h"
#include "hal/gpio_hal.h"
#include "hal/gpio_ll.h"
#if CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/usb/cdc_acm.h"
#include "esp32s2/rom/usb/usb_common.h"
@ -63,17 +63,17 @@ void bootloader_console_init(void)
uart_tx_gpio != UART_NUM_0_TXD_DIRECT_GPIO_NUM ||
uart_rx_gpio != UART_NUM_0_RXD_DIRECT_GPIO_NUM) {
// Change default UART pins back to GPIOs
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[UART_NUM_0_RXD_DIRECT_GPIO_NUM], PIN_FUNC_GPIO);
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[UART_NUM_0_TXD_DIRECT_GPIO_NUM], PIN_FUNC_GPIO);
gpio_ll_func_sel(&GPIO, UART_NUM_0_RXD_DIRECT_GPIO_NUM, PIN_FUNC_GPIO);
gpio_ll_func_sel(&GPIO, UART_NUM_0_TXD_DIRECT_GPIO_NUM, PIN_FUNC_GPIO);
// Route GPIO signals to/from pins
const uint32_t tx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_TX_PIN_IDX);
const uint32_t rx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_RX_PIN_IDX);
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_rx_gpio], PIN_FUNC_GPIO);
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
gpio_ll_func_sel(&GPIO, uart_rx_gpio, PIN_FUNC_GPIO);
gpio_ll_input_enable(&GPIO, uart_rx_gpio);
esp_rom_gpio_pad_pullup_only(uart_rx_gpio);
esp_rom_gpio_connect_out_signal(uart_tx_gpio, tx_idx, 0, 0);
esp_rom_gpio_connect_in_signal(uart_rx_gpio, rx_idx, 0);
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_tx_gpio], PIN_FUNC_GPIO);
gpio_ll_func_sel(&GPIO, uart_tx_gpio, PIN_FUNC_GPIO);
// Enable the peripheral
uart_ll_enable_bus_clock(uart_num, true);
uart_ll_reset_register(uart_num);

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@ -14,7 +14,6 @@
#include "bootloader_random.h"
#include "bootloader_clock.h"
#include "bootloader_common.h"
#include "esp_flash_encrypt.h"
#include "esp_cpu.h"
#include "soc/rtc.h"
#include "hal/wdt_hal.h"

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@ -16,7 +16,7 @@
#include "hal/apm_hal.h"
#endif
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION // TODO: IDF-8615 Remove the workaround when APM supported on C5!
#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-8615 Remove the workaround when APM supported on C5!
#include "soc/hp_apm_reg.h"
#include "soc/lp_apm_reg.h"
#include "soc/lp_apm0_reg.h"
@ -36,7 +36,7 @@ void bootloader_init_mem(void)
apm_hal_apm_ctrl_filter_enable_all(false);
#endif
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION // TODO: IDF-8615 Remove the workaround when APM supported on C5!
#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-8615 Remove the workaround when APM supported on C5!
// disable apm filter
REG_WRITE(LP_APM_FUNC_CTRL_REG, 0);
REG_WRITE(LP_APM0_FUNC_CTRL_REG, 0);

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@ -53,7 +53,7 @@ void bootloader_random_enable(void)
// create patterns and set them in pattern table
uint32_t pattern_one = (SAR2_CHANNEL << 2) | SAR2_ATTEN; // we want channel 9 with max attenuation
uint32_t pattern_two = SAR1_ATTEN; // we want channel 0 with max attenuation, channel doesn't really matter here
uint32_t pattern_two = (SAR2_CHANNEL << 2) | SAR1_ATTEN; // we want channel 9 with max attenuation
uint32_t pattern_table = 0 | (pattern_two << 3 * PATTERN_BIT_WIDTH) | pattern_one << 2 * PATTERN_BIT_WIDTH;
REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, pattern_table);

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@ -9,7 +9,7 @@
#include "soc/pmu_reg.h"
#include "soc/regi2c_saradc.h"
#include "soc/hp_sys_clkrst_reg.h"
#include "soc/rtcadc_reg.h"
#include "soc/lp_adc_reg.h"
#include "esp_private/regi2c_ctrl.h"
#include "esp_rom_regi2c.h"

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@ -25,6 +25,7 @@
#include "soc/rtc_periph.h"
#include "soc/timer_periph.h"
#include "hal/mmu_hal.h"
#include "hal/mmu_ll.h"
#include "hal/cache_types.h"
#include "hal/cache_ll.h"
#include "hal/cache_hal.h"
@ -34,6 +35,9 @@
#include "esp_app_desc.h"
#include "esp_secure_boot.h"
#include "esp_flash_encrypt.h"
#ifndef BOOTLOADER_BUILD
#include "spi_flash_mmap.h"
#endif
#include "esp_flash_partitions.h"
#include "bootloader_flash_priv.h"
#include "bootloader_random.h"
@ -43,6 +47,7 @@
#include "bootloader_sha.h"
#include "bootloader_console.h"
#include "bootloader_soc.h"
#include "bootloader_memory_utils.h"
#include "esp_efuse.h"
#include "esp_fault.h"
@ -715,10 +720,20 @@ static void unpack_load_app(const esp_image_metadata_t *data)
// Find DROM & IROM addresses, to configure MMU mappings
for (int i = 0; i < data->image.segment_count; i++) {
const esp_image_segment_header_t *header = &data->segments[i];
bool text_or_rodata = false;
//`SOC_DROM_LOW` and `SOC_DROM_HIGH` are the same as `SOC_IROM_LOW` and `SOC_IROM_HIGH`, reasons are in above `note`
if (header->load_addr >= SOC_DROM_LOW && header->load_addr < SOC_DROM_HIGH) {
text_or_rodata = true;
}
#if SOC_MMU_PER_EXT_MEM_TARGET
if (header->load_addr >= SOC_EXTRAM_LOW && header->load_addr < SOC_EXTRAM_HIGH) {
text_or_rodata = true;
}
#endif
if (text_or_rodata) {
/**
* D/I are shared, but there should not be a third segment on flash
* D/I are shared, but there should not be a third segment on flash/psram
*/
assert(rom_index < 2);
rom_addr[rom_index] = data->segment_data[i];
@ -785,6 +800,20 @@ static void unpack_load_app(const esp_image_metadata_t *data)
}
#endif //#if SOC_MMU_DI_VADDR_SHARED
//unused for esp32
__attribute__((unused))
static bool s_flash_seg_needs_map(uint32_t vaddr)
{
#if SOC_MMU_PER_EXT_MEM_TARGET
//For these chips, segments on PSRAM will be mapped in app
bool is_psram = esp_ptr_in_extram((void *)vaddr);
return !is_psram;
#else
//For these chips, segments on Flash always need to be mapped
return true;
#endif
}
static void set_cache_and_start_app(
uint32_t drom_addr,
uint32_t drom_load_addr,
@ -822,8 +851,13 @@ static void set_cache_and_start_app(
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, drom_page_count * SPI_FLASH_MMU_PAGE_SIZE);
#else
uint32_t actual_mapped_len = 0;
mmu_hal_map_region(0, MMU_TARGET_FLASH0, drom_load_addr_aligned, drom_addr_aligned, drom_size, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, actual_mapped_len);
if (s_flash_seg_needs_map(drom_load_addr_aligned)) {
mmu_hal_map_region(0, MMU_TARGET_FLASH0, drom_load_addr_aligned, drom_addr_aligned, drom_size, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "after mapping rodata, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, actual_mapped_len);
}
//we use the MMU_LL_END_DROM_ENTRY_ID mmu entry as a map page for app to find the boot partition
mmu_hal_map_region(0, MMU_TARGET_FLASH0, MMU_LL_END_DROM_ENTRY_VADDR, drom_addr_aligned, CONFIG_MMU_PAGE_SIZE, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "mapped one page of the rodata, from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", drom_addr_aligned, drom_load_addr_aligned, actual_mapped_len);
#endif
//-----------------------MAP IROM--------------------------
@ -840,8 +874,10 @@ static void set_cache_and_start_app(
ESP_LOGV(TAG, "rc=%d", rc);
ESP_EARLY_LOGV(TAG, "after mapping text, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", irom_addr_aligned, irom_load_addr_aligned, irom_page_count * SPI_FLASH_MMU_PAGE_SIZE);
#else
mmu_hal_map_region(0, MMU_TARGET_FLASH0, irom_load_addr_aligned, irom_addr_aligned, irom_size, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "after mapping text, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", irom_addr_aligned, irom_load_addr_aligned, actual_mapped_len);
if (s_flash_seg_needs_map(irom_load_addr_aligned)) {
mmu_hal_map_region(0, MMU_TARGET_FLASH0, irom_load_addr_aligned, irom_addr_aligned, irom_size, &actual_mapped_len);
ESP_EARLY_LOGV(TAG, "after mapping text, starting from paddr=0x%08" PRIx32 " and vaddr=0x%08" PRIx32 ", 0x%" PRIx32 " bytes are mapped", irom_addr_aligned, irom_load_addr_aligned, actual_mapped_len);
}
#endif
//----------------------Enable corresponding buses----------------

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@ -1,9 +1,12 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdbool.h>
#include "soc/lp_analog_peri_reg.h"
#include "soc/soc.h"
#include "hal/brownout_ll.h"
void bootloader_ana_super_wdt_reset_config(bool enable)
{
@ -12,7 +15,9 @@ void bootloader_ana_super_wdt_reset_config(bool enable)
void bootloader_ana_bod_reset_config(bool enable)
{
//TODO: IDF-7514
REG_CLR_BIT(LP_ANALOG_PERI_FIB_ENABLE_REG, LP_ANALOG_PERI_LP_ANA_FIB_BOD_RST);
brownout_ll_ana_reset_enable(enable);
}
void bootloader_ana_clock_glitch_reset_config(bool enable)

View File

@ -771,8 +771,14 @@ static esp_err_t verify_segment_header(int index, const esp_image_segment_header
static bool should_map(uint32_t load_addr)
{
return (load_addr >= SOC_IROM_LOW && load_addr < SOC_IROM_HIGH)
|| (load_addr >= SOC_DROM_LOW && load_addr < SOC_DROM_HIGH);
bool is_irom = (load_addr >= SOC_IROM_LOW) && (load_addr < SOC_IROM_HIGH);
bool is_drom = (load_addr >= SOC_DROM_LOW) && (load_addr < SOC_DROM_HIGH);
bool is_psram = false;
#if SOC_MMU_PER_EXT_MEM_TARGET
is_psram = (load_addr >= SOC_EXTRAM_LOW) && (load_addr < SOC_EXTRAM_HIGH);
#endif
return (is_irom || is_drom || is_psram);
}
static bool should_load(uint32_t load_addr)
@ -857,7 +863,7 @@ static esp_err_t process_appended_hash_and_sig(esp_image_metadata_t *data, uint3
// Case I: Bootloader part
if (part_offset == ESP_BOOTLOADER_OFFSET) {
// For bootloader with secure boot v1, signature stays in an independant flash
// For bootloader with secure boot v1, signature stays in an independent flash
// sector (offset 0x0) and does not get appended to the image.
#if CONFIG_SECURE_BOOT_V2_ENABLED
// Sanity check - secure boot v2 signature block starts on 4K boundary

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@ -575,7 +575,7 @@ if(CONFIG_BT_ENABLED)
if(CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT)
list(APPEND srcs
"porting/npl/freertos/src/npl_os_freertos.c"
"porting/nimble/src/os_msys_init.c"
"porting/mem/os_msys_init.c"
)
if(CONFIG_BT_CONTROLLER_DISABLED)
@ -585,7 +585,6 @@ if(CONFIG_BT_ENABLED)
endif()
list(APPEND include_dirs
porting/include
porting/nimble/include
porting/npl/freertos/include
porting/transport/include
)
@ -727,7 +726,6 @@ if(CONFIG_BT_ENABLED)
"host/nimble/port/src/nvs_port.c"
)
list(APPEND include_dirs
porting/include
host/nimble/nimble/porting/nimble/include
host/nimble/port/include
host/nimble/nimble/nimble/transport/include
@ -756,9 +754,8 @@ if(CONFIG_BT_ENABLED)
endif()
list(APPEND include_dirs
porting/include
host/nimble/nimble/porting/npl/freertos/include
host/nimble/nimble/porting/nimble/include
host/nimble/nimble/nimble/include
)
endif()

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@ -31,8 +31,8 @@ static const char s_hex_to_char_mapping[16] = {
'8', '9', 'a', 'b', 'c', 'd', 'e', 'f'
};
bt_hci_log_t g_bt_hci_log_data_ctl = {0};
bt_hci_log_t g_bt_hci_log_adv_ctl = {0};
static bt_hci_log_t g_bt_hci_log_data_ctl = {0};
static bt_hci_log_t g_bt_hci_log_adv_ctl = {0};
esp_err_t bt_hci_log_init(void)
{
@ -98,35 +98,35 @@ static char IRAM_ATTR *bt_data_type_to_str(uint8_t data_type)
{
case HCI_LOG_DATA_TYPE_COMMAND:
// hci cmd data
tag = "CMD";
tag = "C";
break;
case HCI_LOG_DATA_TYPE_H2C_ACL:
// host to controller hci acl data
tag = "HAL";
tag = "H";
break;
case HCI_LOG_DATA_TYPE_SCO:
// hci sco data
tag = "SCO";
tag = "S";
break;
case HCI_LOG_DATA_TYPE_EVENT:
// hci event
tag = "EVT";
tag = "E";
break;
case HCI_LOG_DATA_TYPE_ADV:
// controller adv report data
tag = "ADV";
tag = NULL;
break;
case HCI_LOG_DATA_TYPE_C2H_ACL:
// controller to host hci acl data
tag = "CAL";
tag = "D";
break;
case HCI_LOG_DATA_TYPE_SELF_DEFINE:
// self-defining data
tag = "ST";
tag = "S";
break;
default:
// unknown data type
tag = "UK";
tag = "U";
break;
}

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@ -16,7 +16,10 @@
#include "sdkconfig.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port.h"
#endif // CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port_freertos.h"
#ifdef ESP_PLATFORM
@ -28,7 +31,7 @@
#endif
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#include "os/endian.h"
#include "esp_bt.h"

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@ -15,7 +15,9 @@
#include "sdkconfig.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port.h"
#endif // CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port_freertos.h"
#include "esp_private/esp_modem_clock.h"
@ -28,7 +30,7 @@
#endif // CONFIG_SW_COEXIST_ENABLE
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#include "os/endian.h"
#include "esp_bt.h"
@ -121,7 +123,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@ -129,12 +131,12 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
@ -149,15 +151,17 @@ extern void os_msys_deinit(void);
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@ -723,7 +727,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@ -780,13 +784,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
coex_init();
#endif // CONFIG_SW_COEXIST_ENABLE
ret = ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface;
@ -804,11 +801,23 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
goto controller_init_err;
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
esp_ble_change_rtc_freq(slow_clk_freq);
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@ -825,7 +834,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@ -835,13 +844,13 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
controller_init_err:
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
os_msys_deinit();
ble_controller_deinit();
modem_deint:
esp_phy_modem_deinit();
// modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
@ -872,10 +881,11 @@ esp_err_t esp_bt_controller_deinit(void)
// modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
ble_controller_deinit();
#if CONFIG_BT_NIMBLE_ENABLED
/* De-initialize default event queue */
@ -920,7 +930,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@ -948,7 +958,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@ -1082,7 +1092,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1095,7 +1105,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1115,13 +1125,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1141,7 +1151,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@ -1152,7 +1162,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@ -1174,11 +1184,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

View File

@ -15,7 +15,9 @@
#include "sdkconfig.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port.h"
#endif // CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port_freertos.h"
#include "esp_private/esp_modem_clock.h"
@ -28,7 +30,7 @@
#endif // CONFIG_ESP_COEX_ENABLED
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#include "os/endian.h"
#include "esp_bt.h"
@ -123,7 +125,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@ -131,12 +133,12 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
@ -149,17 +151,19 @@ extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@ -551,7 +555,7 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
{
esp_ble_set_wakeup_overhead(overhead);
r_esp_ble_set_wakeup_overhead(overhead);
}
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
@ -577,6 +581,9 @@ esp_err_t controller_sleep_init(void)
goto error;
}
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
#if CONFIG_BT_LE_SLEEP_ENABLE && !CONFIG_MAC_BB_PD
#error "CONFIG_MAC_BB_PD required for BLE light sleep to run properly"
#endif // CONFIG_BT_LE_SLEEP_ENABLE && !CONFIG_MAC_BB_PD
/* Create a new regdma link for BLE related register restoration */
rc = sleep_modem_ble_mac_modem_state_init(1);
assert(rc == 0);
@ -744,7 +751,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@ -821,14 +828,20 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = ble_controller_init(cfg);
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
esp_ble_change_rtc_freq(slow_clk_freq);
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@ -845,7 +858,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@ -856,8 +869,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
ble_controller_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@ -891,7 +905,8 @@ esp_err_t esp_bt_controller_deinit(void)
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
ble_controller_deinit();
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@ -939,7 +954,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@ -967,7 +982,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@ -1101,7 +1116,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1114,7 +1129,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1134,13 +1149,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1160,7 +1175,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@ -1171,7 +1186,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@ -1193,11 +1208,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

View File

@ -15,7 +15,9 @@
#include "sdkconfig.h"
#if CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port.h"
#endif // CONFIG_BT_NIMBLE_ENABLED
#include "nimble/nimble_port_freertos.h"
#include "esp_private/esp_modem_clock.h"
@ -28,7 +30,7 @@
#endif // CONFIG_ESP_COEX_ENABLED
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#include "os/endian.h"
#include "esp_bt.h"
@ -59,8 +61,8 @@
************************************************************************
*/
#define NIMBLE_PORT_LOG_TAG "BLE_INIT"
#define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#define EXT_FUNC_VERSION 0x20221122
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
@ -115,7 +117,7 @@ typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
************************************************************************
*/
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
extern int r_ble_controller_init(esp_bt_controller_config_t *cfg);
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int r_ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
extern int r_ble_log_deinit_async(void);
@ -123,35 +125,37 @@ extern void r_ble_log_async_select_dump_buffers(uint8_t buffers);
extern void r_ble_log_async_output_dump_all(bool output);
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
extern int ble_controller_deinit(void);
extern int ble_controller_enable(uint8_t mode);
extern int ble_controller_disable(void);
extern int r_ble_controller_deinit(void);
extern int r_ble_controller_enable(uint8_t mode);
extern int r_ble_controller_disable(void);
extern int esp_register_ext_funcs (struct ext_funcs_t *);
extern void esp_unregister_ext_funcs (void);
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int r_esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void esp_ble_change_rtc_freq(uint32_t freq);
extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
extern void r_esp_ble_change_rtc_freq(uint32_t freq);
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern int r_ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int r_ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int r_ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern char *ble_controller_get_compile_version(void);
extern int esp_ble_register_bb_funcs(void);
extern void esp_ble_unregister_bb_funcs(void);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _bt_controller_bss_start;
@ -538,9 +542,10 @@ static void sleep_modem_ble_mac_modem_state_deinit(void)
void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
{
esp_ble_set_wakeup_overhead(overhead);
r_esp_ble_set_wakeup_overhead(overhead);
}
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
esp_err_t controller_sleep_init(void)
{
@ -716,7 +721,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
ble_get_npl_element_info(cfg, &npl_info);
r_ble_get_npl_element_info(cfg, &npl_info);
npl_freertos_set_controller_npl_info(&npl_info);
if (npl_freertos_mempool_init() != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
@ -730,10 +735,10 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
*/
ble_npl_eventq_init(nimble_port_get_dflt_eventq());
#endif // CONFIG_BT_NIMBLE_ENABLED
/* Enable BT-related clocks */
modem_clock_module_enable(PERIPH_BT_MODULE);
modem_clock_module_mac_reset(PERIPH_BT_MODULE);
/* Select slow clock source for BT momdule */
#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
esp_bt_rtc_slow_clk_select(MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL);
slow_clk_freq = 100000;
@ -771,6 +776,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#if CONFIG_SW_COEXIST_ENABLE
coex_init();
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
interface_func_t bt_controller_log_interface;
bt_controller_log_interface = esp_bt_controller_log_interface;
@ -791,16 +797,20 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto modem_deint;
}
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
ret = ble_controller_init(cfg);
ret = esp_ble_register_bb_funcs();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "esp_ble_register_bb_funcs failed %d", ret);
goto modem_deint;
}
ret = r_ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "r_ble_controller_init failed %d", ret);
goto modem_deint;
}
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "ble controller commit:[%s]", ble_controller_get_compile_version());
esp_ble_change_rtc_freq(slow_clk_freq);
r_esp_ble_change_rtc_freq(slow_clk_freq);
ble_controller_scan_duplicate_config();
@ -815,10 +825,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
goto free_controller;
}
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
swap_in_place(mac, 6);
esp_ble_ll_set_public_addr(mac);
r_esp_ble_ll_set_public_addr(mac);
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
@ -829,8 +838,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
free_controller:
controller_sleep_deinit();
os_msys_deinit();
ble_controller_deinit();
r_ble_controller_deinit();
modem_deint:
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@ -862,7 +872,8 @@ esp_err_t esp_bt_controller_deinit(void)
modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
modem_clock_module_disable(PERIPH_BT_MODULE);
ble_controller_deinit();
r_ble_controller_deinit();
esp_ble_unregister_bb_funcs();
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
r_ble_log_deinit_async();
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
@ -910,7 +921,7 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
if (ble_controller_enable(mode) != 0) {
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
}
@ -938,7 +949,7 @@ esp_err_t esp_bt_controller_disable(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
}
if (ble_controller_disable() != 0) {
if (r_ble_controller_disable() != 0) {
return ESP_FAIL;
}
#if CONFIG_SW_COEXIST_ENABLE
@ -1072,7 +1083,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1085,7 +1096,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1105,13 +1116,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
if (r_ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1131,7 +1142,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
@ -1142,7 +1153,7 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
@ -1164,11 +1175,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
tx_level = r_ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;

@ -1 +1 @@
Subproject commit 45e328053591081abcd387ec2eecc8add43f4b15
Subproject commit a4d7731a95db8a6cfb98e5068b6757c32ecfaa2a

@ -1 +1 @@
Subproject commit b9a902c3551ef4a2032b6662a4cbb018125ddfda
Subproject commit 8ddd8acac498fcbb76b5a39c5c7d4025238298ab

@ -1 +1 @@
Subproject commit 76ed4114ee7d081435a3c65793b4c8eb1dfaf199
Subproject commit 4b1338827fa19fbacc02dd9e46e76be2b0dd17a9

@ -1 +1 @@
Subproject commit 45dda7a690af994e8e6a41cc3b029506335d169f
Subproject commit 5f428f914114c88470bf0a785f08840c2b35abca

@ -1 +1 @@
Subproject commit 6663362597110007a901eed9c87fa1cff6ac25fe
Subproject commit ed6c0b4e0ab3b8ddce5d8bc65e417b1adcbca5b4

@ -1 +1 @@
Subproject commit 9bf31906cdbef6ac3d271117f1cd439bd411eef5
Subproject commit 2d69367e13a928afb73d1a8c579c0dad98eb9393

View File

@ -96,7 +96,7 @@ esp_err_t esp_ble_mesh_deinit(esp_ble_mesh_deinit_param_t *param)
}
/* Take the Semaphore, wait BLE Mesh de-initialization to finish. */
xSemaphoreTake(semaphore, portMAX_DELAY);
__ASSERT(xSemaphoreTake(semaphore, 3000 / portTICK_PERIOD_MS) == pdTRUE, "BLE Mesh deinit take semaphore failed");
/* Don't forget to delete the semaphore at the end. */
vSemaphoreDelete(semaphore);

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -33,7 +33,10 @@ esp_err_t esp_ble_mesh_init(esp_ble_mesh_prov_t *prov, esp_ble_mesh_comp_t *comp
/**
* @brief De-initialize BLE Mesh module.
*
* @note This function shall be invoked after esp_ble_mesh_client_model_deinit().
* @note
* 1. This function shall be invoked after esp_ble_mesh_client_model_deinit().
* 2. This function is strictly forbidden to run in any BTC Task Context
* (e.g. registered Mesh Event Callback).
*
* @param[in] param: Pointer to the structure of BLE Mesh deinit parameters.
*

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -71,6 +71,29 @@
#include "esp_ble_mesh_provisioning_api.h"
#include "esp_ble_mesh_networking_api.h"
#if CONFIG_BLE_MESH_DEINIT
static SemaphoreHandle_t deinit_comp_semaphore;
#endif
static inline void btc_ble_mesh_prov_cb_to_app_reprocess(esp_ble_mesh_prov_cb_event_t event,
esp_ble_mesh_prov_cb_param_t *param)
{
switch (event) {
#if CONFIG_BLE_MESH_DEINIT
case ESP_BLE_MESH_DEINIT_MESH_COMP_EVT:
assert(deinit_comp_semaphore);
/* Give the semaphore when BLE Mesh de-initialization is finished.
* @note: At nimble host, once this lock is released, it will cause
* the btc task to be deleted.
*/
xSemaphoreGive(deinit_comp_semaphore);
break;
#endif
default:
break;
}
}
static inline void btc_ble_mesh_prov_cb_to_app(esp_ble_mesh_prov_cb_event_t event,
esp_ble_mesh_prov_cb_param_t *param)
{
@ -79,6 +102,8 @@ static inline void btc_ble_mesh_prov_cb_to_app(esp_ble_mesh_prov_cb_event_t even
if (btc_ble_mesh_cb) {
btc_ble_mesh_cb(event, param);
}
btc_ble_mesh_prov_cb_to_app_reprocess(event, param);
}
static inline void btc_ble_mesh_model_cb_to_app(esp_ble_mesh_model_cb_event_t event,
@ -2825,8 +2850,8 @@ void btc_ble_mesh_prov_call_handler(btc_msg_t *msg)
case BTC_BLE_MESH_ACT_DEINIT_MESH:
act = ESP_BLE_MESH_DEINIT_MESH_COMP_EVT;
param.deinit_mesh_comp.err_code = bt_mesh_deinit((struct bt_mesh_deinit_param *)&arg->mesh_deinit.param);
/* Give the semaphore when BLE Mesh de-initialization is finished. */
xSemaphoreGive(arg->mesh_deinit.semaphore);
/* Temporarily save the deinit semaphore and release it after the mesh deinit complete event is handled in the app layer */
deinit_comp_semaphore = arg->mesh_deinit.semaphore;
break;
#endif /* CONFIG_BLE_MESH_DEINIT */
default:

View File

@ -1,7 +1,7 @@
/*
* SPDX-FileCopyrightText: 2017 Nordic Semiconductor ASA
* SPDX-FileCopyrightText: 2015-2016 Intel Corporation
* SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -74,7 +74,7 @@ static struct bt_mesh_conn_cb *bt_mesh_gatts_conn_cb;
static tBTA_GATTS_IF bt_mesh_gatts_if;
static uint8_t bt_mesh_gatts_addr[BLE_MESH_ADDR_LEN];
static uint16_t svc_handle, char_handle;
static future_t *future_mesh;
static future_t *gatts_future_mesh;
/* Static Functions */
static struct bt_mesh_gatt_attr *bt_mesh_gatts_find_attr_by_handle(uint16_t handle);
@ -561,6 +561,9 @@ static void bt_mesh_bta_gatts_cb(tBTA_GATTS_EVT event, tBTA_GATTS *p_data)
case BTA_GATTS_REG_EVT:
if (p_data->reg_oper.status == BTA_GATT_OK) {
bt_mesh_gatts_if = p_data->reg_oper.server_if;
future_ready(gatts_future_mesh, FUTURE_SUCCESS);
} else {
future_ready(gatts_future_mesh, FUTURE_FAIL);
}
break;
case BTA_GATTS_READ_EVT: {
@ -618,27 +621,27 @@ static void bt_mesh_bta_gatts_cb(tBTA_GATTS_EVT event, tBTA_GATTS *p_data)
break;
case BTA_GATTS_CREATE_EVT:
svc_handle = p_data->create.service_id;
BT_DBG("svc_handle %d, future_mesh %p", svc_handle, future_mesh);
if (future_mesh != NULL) {
future_ready(future_mesh, FUTURE_SUCCESS);
BT_DBG("svc_handle %d, gatts_future_mesh %p", svc_handle, gatts_future_mesh);
if (gatts_future_mesh != NULL) {
future_ready(gatts_future_mesh, FUTURE_SUCCESS);
}
break;
case BTA_GATTS_ADD_INCL_SRVC_EVT:
svc_handle = p_data->add_result.attr_id;
if (future_mesh != NULL) {
future_ready(future_mesh, FUTURE_SUCCESS);
if (gatts_future_mesh != NULL) {
future_ready(gatts_future_mesh, FUTURE_SUCCESS);
}
break;
case BTA_GATTS_ADD_CHAR_EVT:
char_handle = p_data->add_result.attr_id;
if (future_mesh != NULL) {
future_ready(future_mesh, FUTURE_SUCCESS);
if (gatts_future_mesh != NULL) {
future_ready(gatts_future_mesh, FUTURE_SUCCESS);
}
break;
case BTA_GATTS_ADD_CHAR_DESCR_EVT:
char_handle = p_data->add_result.attr_id;
if (future_mesh != NULL) {
future_ready(future_mesh, FUTURE_SUCCESS);
if (gatts_future_mesh != NULL) {
future_ready(gatts_future_mesh, FUTURE_SUCCESS);
}
break;
case BTA_GATTS_DELELTE_EVT:
@ -962,11 +965,11 @@ int bt_mesh_gatts_service_register(struct bt_mesh_gatt_service *svc)
if (svc->attrs[i].uuid->type == BLE_MESH_UUID_TYPE_16) {
switch (BLE_MESH_UUID_16(svc->attrs[i].uuid)->val) {
case BLE_MESH_UUID_GATT_PRIMARY_VAL: {
future_mesh = future_new();
gatts_future_mesh = future_new();
bta_uuid_to_bt_mesh_uuid(&bta_uuid, (struct bt_mesh_uuid *)svc->attrs[i].user_data);
BTA_GATTS_CreateService(bt_mesh_gatts_if,
&bta_uuid, 0, svc->attr_count, true);
if (future_await(future_mesh) == FUTURE_FAIL) {
if (future_await(gatts_future_mesh) == FUTURE_FAIL) {
BT_ERR("Failed to add primary service");
return ESP_FAIL;
}
@ -976,11 +979,11 @@ int bt_mesh_gatts_service_register(struct bt_mesh_gatt_service *svc)
break;
}
case BLE_MESH_UUID_GATT_SECONDARY_VAL: {
future_mesh = future_new();
gatts_future_mesh = future_new();
bta_uuid_to_bt_mesh_uuid(&bta_uuid, (struct bt_mesh_uuid *)svc->attrs[i].user_data);
BTA_GATTS_CreateService(bt_mesh_gatts_if,
&bta_uuid, 0, svc->attr_count, false);
if (future_await(future_mesh) == FUTURE_FAIL) {
if (future_await(gatts_future_mesh) == FUTURE_FAIL) {
BT_ERR("Failed to add secondary service");
return ESP_FAIL;
}
@ -993,11 +996,11 @@ int bt_mesh_gatts_service_register(struct bt_mesh_gatt_service *svc)
break;
}
case BLE_MESH_UUID_GATT_CHRC_VAL: {
future_mesh = future_new();
gatts_future_mesh = future_new();
struct bt_mesh_gatt_char *gatts_chrc = (struct bt_mesh_gatt_char *)svc->attrs[i].user_data;
bta_uuid_to_bt_mesh_uuid(&bta_uuid, gatts_chrc->uuid);
BTA_GATTS_AddCharacteristic(svc_handle, &bta_uuid, bt_mesh_perm_to_bta_perm(svc->attrs[i + 1].perm), gatts_chrc->properties, NULL, NULL);
if (future_await(future_mesh) == FUTURE_FAIL) {
if (future_await(gatts_future_mesh) == FUTURE_FAIL) {
BT_ERR("Failed to add characteristic");
return ESP_FAIL;
}
@ -1019,10 +1022,10 @@ int bt_mesh_gatts_service_register(struct bt_mesh_gatt_service *svc)
case BLE_MESH_UUID_ES_CONFIGURATION_VAL:
case BLE_MESH_UUID_ES_MEASUREMENT_VAL:
case BLE_MESH_UUID_ES_TRIGGER_SETTING_VAL: {
future_mesh = future_new();
gatts_future_mesh = future_new();
bta_uuid_to_bt_mesh_uuid(&bta_uuid, svc->attrs[i].uuid);
BTA_GATTS_AddCharDescriptor(svc_handle, bt_mesh_perm_to_bta_perm(svc->attrs[i].perm), &bta_uuid, NULL, NULL);
if (future_await(future_mesh) == FUTURE_FAIL) {
if (future_await(gatts_future_mesh) == FUTURE_FAIL) {
BT_ERR("Failed to add descriptor");
return ESP_FAIL;
}
@ -1768,7 +1771,19 @@ void bt_mesh_gatt_init(void)
CONFIG_BLE_MESH_GATT_PROXY_SERVER
tBT_UUID gatts_app_uuid = {LEN_UUID_128, {0}};
memset(&gatts_app_uuid.uu.uuid128, BLE_MESH_GATTS_APP_UUID_BYTE, LEN_UUID_128);
gatts_future_mesh = future_new();
if (!gatts_future_mesh) {
BT_ERR("Mesh gatts sync lock alloc failed");
return;
}
BTA_GATTS_AppRegister(&gatts_app_uuid, bt_mesh_bta_gatts_cb);
if (future_await(gatts_future_mesh) == FUTURE_FAIL) {
BT_ERR("Mesh gatts app register failed");
return;
}
#endif
#if (CONFIG_BLE_MESH_PROVISIONER && CONFIG_BLE_MESH_PB_GATT) || \

View File

@ -2,7 +2,7 @@
/*
* SPDX-FileCopyrightText: 2017 Intel Corporation
* SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileContributor: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -121,22 +121,22 @@ static bt_mesh_mutex_t seg_rx_lock;
static inline void bt_mesh_seg_tx_lock(void)
{
bt_mesh_mutex_lock(&seg_tx_lock);
bt_mesh_r_mutex_lock(&seg_tx_lock);
}
static inline void bt_mesh_seg_tx_unlock(void)
{
bt_mesh_mutex_unlock(&seg_tx_lock);
bt_mesh_r_mutex_unlock(&seg_tx_lock);
}
static inline void bt_mesh_seg_rx_lock(void)
{
bt_mesh_mutex_lock(&seg_rx_lock);
bt_mesh_r_mutex_lock(&seg_rx_lock);
}
static inline void bt_mesh_seg_rx_unlock(void)
{
bt_mesh_mutex_unlock(&seg_rx_lock);
bt_mesh_r_mutex_unlock(&seg_rx_lock);
}
uint8_t bt_mesh_seg_send_interval(void)
@ -517,6 +517,12 @@ static bool send_next_segment(struct seg_tx *tx, int *result)
net_tx.ctx->net_idx = tx->sub->net_idx;
/**
* Add one to the ref count only if the segment can be further
* processed by the network.
*/
seg = net_buf_ref(seg);
err = bt_mesh_net_send(&net_tx, seg, &seg_sent_cb, tx);
if (err) {
BT_ERR("Send seg %u failed (err %d)", tx->last_seg_n, err);
@ -966,7 +972,18 @@ static int send_seg(struct bt_mesh_net_tx *net_tx, struct net_buf_simple *sdu,
}
}
tx->seg[seg_o] = net_buf_ref(seg);
/**
* If the net buffer allocation of the subsequent
* segments of this segment message fails, it will
* cause the ref count of the previously allocated
* successful segments to not be unref, which will
* cause the net buffer leakage to occur, so it is
* necessary to wait until all the segments have been
* allocated, and then when the segment is confirmed
* that it will be network layer for further processing,
* then ref of the net buffer should be plus one.
*/
tx->seg[seg_o] = seg;
BT_DBG("Seg %u/%u prepared", seg_o, tx->seg_n);
}
@ -975,6 +992,11 @@ static int send_seg(struct bt_mesh_net_tx *net_tx, struct net_buf_simple *sdu,
* tx->seg[0] will be NULL here.
*/
if (tx->seg[0]) {
/**
* Add one to the ref count only if the segment can be further
* processed by the network.
*/
tx->seg[0] = net_buf_ref(tx->seg[0]);
err = bt_mesh_net_send(net_tx, tx->seg[0], &seg_sent_cb, tx);
if (err) {
BT_ERR("Send 1st seg failed (err %d)", err);
@ -2327,8 +2349,8 @@ void bt_mesh_trans_init(void)
seg_rx[i].buf.data = seg_rx[i].buf.__buf;
}
bt_mesh_mutex_create(&seg_tx_lock);
bt_mesh_mutex_create(&seg_rx_lock);
bt_mesh_r_mutex_create(&seg_tx_lock);
bt_mesh_r_mutex_create(&seg_rx_lock);
}
#if CONFIG_BLE_MESH_DEINIT
@ -2338,7 +2360,7 @@ void bt_mesh_trans_deinit(bool erase)
bt_mesh_tx_reset();
bt_mesh_rpl_reset(erase);
bt_mesh_mutex_free(&seg_tx_lock);
bt_mesh_mutex_free(&seg_rx_lock);
bt_mesh_r_mutex_free(&seg_tx_lock);
bt_mesh_r_mutex_free(&seg_rx_lock);
}
#endif /* CONFIG_BLE_MESH_DEINIT */

View File

@ -61,7 +61,7 @@ bool hci_host_check_send_available(void)
void hci_host_send_packet(uint8_t *data, uint16_t len)
{
#if (BT_HCI_LOG_INCLUDED == TRUE)
bt_hci_log_record_hci_data(data[0], data, len);
bt_hci_log_record_hci_data(data[0], &data[1], len - 1);
#endif
#if (BT_CONTROLLER_INCLUDED == TRUE)
esp_vhci_host_send_packet(data, len);

View File

@ -1014,6 +1014,25 @@ esp_err_t esp_ble_dtm_stop(void)
return (btc_transfer_context(&msg, NULL, 0, NULL, NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
esp_err_t esp_ble_gap_set_privacy_mode(esp_ble_addr_type_t addr_type, esp_bd_addr_t addr, esp_ble_privacy_mode_t mode)
{
btc_msg_t msg;
btc_ble_gap_args_t arg;
ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
msg.sig = BTC_SIG_API_CALL;
msg.pid = BTC_PID_GAP_BLE;
msg.act = BTC_GAP_BLE_SET_PRIVACY_MODE;
arg.set_privacy_mode.addr_type = addr_type;
memcpy(arg.set_privacy_mode.addr, addr, sizeof(esp_bd_addr_t));
arg.set_privacy_mode.privacy_mode = mode;
return (btc_transfer_context(&msg, &arg, sizeof(btc_ble_gap_args_t), NULL, NULL)
== BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
#if (BLE_50_FEATURE_SUPPORT == TRUE)
esp_err_t esp_ble_gap_read_phy(esp_bd_addr_t bd_addr)

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@ -228,6 +228,7 @@ typedef enum {
ESP_GAP_BLE_SET_RPA_TIMEOUT_COMPLETE_EVT, /*!< When set the Resolvable Private Address (RPA) timeout completes, the event comes */
ESP_GAP_BLE_ADD_DEV_TO_RESOLVING_LIST_COMPLETE_EVT, /*!< when add a device to the resolving list completes, the event comes*/
ESP_GAP_BLE_VENDOR_CMD_COMPLETE_EVT, /*!< When vendor hci command complete, the event comes */
ESP_GAP_BLE_SET_PRIVACY_MODE_COMPLETE_EVT, /*!< When set privacy mode complete, the event comes */
ESP_GAP_BLE_EVT_MAX, /*!< when maximum advertising event complete, the event comes */
} esp_gap_ble_cb_event_t;
@ -1030,6 +1031,11 @@ typedef struct {
} esp_ble_gap_past_params_t;
#endif // #if (BLE_FEAT_PERIODIC_ADV_SYNC_TRANSFER == TRUE)
typedef enum{
ESP_BLE_NETWORK_PRIVACY_MODE = 0X00, /*!< Network Privacy Mode for peer device (default) */
ESP_BLE_DEVICE_PRIVACY_MODE = 0X01, /*!< Device Privacy Mode for peer device */
} esp_ble_privacy_mode_t;
/**
* @brief Gap callback parameters union
*/
@ -1507,6 +1513,12 @@ typedef union {
uint16_t param_len; /*!< The length of parameter buffer */
uint8_t *p_param_buf; /*!< The point of parameter buffer */
} vendor_cmd_cmpl; /*!< Event parameter of ESP_GAP_BLE_VENDOR_CMD_COMPLETE_EVT */
/**
* @brief ESP_GAP_BLE_SET_PRIVACY_MODE_COMPLETE_EVT
*/
struct ble_set_privacy_mode_cmpl_evt_param {
esp_bt_status_t status; /*!< Indicate privacy mode set operation success status */
} set_privacy_mode_cmpl; /*!< Event parameter of ESP_GAP_BLE_SET_PRIVACY_MODE_COMPLETE_EVT */
} esp_ble_gap_cb_param_t;
/**
@ -2640,6 +2652,21 @@ esp_err_t esp_ble_gap_clear_advertising(void);
*/
esp_err_t esp_ble_gap_vendor_command_send(esp_ble_vendor_cmd_params_t *vendor_cmd_param);
/**
* @brief This function set the privacy mode of the device in resolving list.
*
* @note This feature is not supported on ESP32.
*
* @param[in] addr_type: The address type of the peer identity address (BLE_ADDR_TYPE_PUBLIC or BLE_ADDR_TYPE_RANDOM).
* @param[in] addr: The peer identity address of the device.
* @param[in] mode: The privacy mode of the device.
*
* @return
* - ESP_OK : success
* - other : failed
*/
esp_err_t esp_ble_gap_set_privacy_mode(esp_ble_addr_type_t addr_type, esp_bd_addr_t addr, esp_ble_privacy_mode_t mode);
#ifdef __cplusplus
}
#endif

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@ -5838,6 +5838,13 @@ void bta_dm_ble_gap_add_dev_to_resolving_list(tBTA_DM_MSG *p_data)
p_data->add_dev_to_resolving_list.p_add_dev_to_resolving_list_callback);
}
void bta_dm_ble_gap_set_privacy_mode(tBTA_DM_MSG *p_data)
{
APPL_TRACE_API("%s, privacy_mode = %d", __func__, p_data->ble_set_privacy_mode.privacy_mode);
BTM_BleSetPrivacyMode(p_data->ble_set_privacy_mode.addr_type, p_data->ble_set_privacy_mode.addr,
p_data->ble_set_privacy_mode.privacy_mode, p_data->ble_set_privacy_mode.p_cback);
}
#if (BLE_50_FEATURE_SUPPORT == TRUE)
void bta_dm_ble_gap_dtm_enhance_tx_start(tBTA_DM_MSG *p_data)
{

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@ -2679,6 +2679,21 @@ void BTA_DmBleDtmStop(tBTA_DTM_CMD_CMPL_CBACK *p_dtm_cmpl_cback)
}
}
void BTA_DmBleSetPrivacyMode(uint8_t addr_type, BD_ADDR addr, uint8_t privacy_mode, tBTA_SET_PRIVACY_MODE_CMPL_CBACK *p_cback)
{
tBTA_DM_API_SET_PRIVACY_MODE *p_msg;
if ((p_msg = (tBTA_DM_API_SET_PRIVACY_MODE *)osi_malloc(sizeof(tBTA_DM_API_SET_PRIVACY_MODE)))
!= NULL) {
p_msg->hdr.event = BTA_DM_API_SET_PRIVACY_MODE_EVT;
p_msg->addr_type = addr_type;
memcpy(p_msg->addr, addr, sizeof(BD_ADDR));
p_msg->privacy_mode = privacy_mode;
p_msg->p_cback = p_cback;
bta_sys_sendmsg(p_msg);
}
}
#endif
/*******************************************************************************

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@ -234,6 +234,7 @@ const tBTA_DM_ACTION bta_dm_action[BTA_DM_MAX_EVT] = {
bta_dm_ble_gap_clear_adv, /* BTA_DM_API_BLE_CLEAR_ADV_EVT */
bta_dm_ble_gap_set_rpa_timeout, /* BTA_DM_API_SET_RPA_TIMEOUT_EVT */
bta_dm_ble_gap_add_dev_to_resolving_list, /* BTA_DM_API_ADD_DEV_TO_RESOLVING_LIST_EVT */
bta_dm_ble_gap_set_privacy_mode, /* BTA_DM_API_SET_PRIVACY_MODE_EVT */
#endif
};

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@ -225,6 +225,7 @@ enum {
BTA_DM_API_BLE_CLEAR_ADV_EVT,
BTA_DM_API_SET_RPA_TIMEOUT_EVT,
BTA_DM_API_ADD_DEV_TO_RESOLVING_LIST_EVT,
BTA_DM_API_SET_PRIVACY_MODE_EVT,
#endif
BTA_DM_MAX_EVT
};
@ -950,6 +951,14 @@ typedef struct {
tBTA_CLEAR_ADV_CMPL_CBACK *p_clear_adv_cback;
} tBTA_DM_API_CLEAR_ADV;
typedef struct {
BT_HDR hdr;
tBLE_ADDR_TYPE addr_type;
BD_ADDR addr;
UINT8 privacy_mode;
tBTA_SET_PRIVACY_MODE_CMPL_CBACK *p_cback;
} tBTA_DM_API_SET_PRIVACY_MODE;
#endif /* BLE_INCLUDED */
/* data type for BTA_DM_API_REMOVE_ACL_EVT */
@ -1355,6 +1364,7 @@ typedef union {
tBTA_DM_API_BLE_DTM_RX_START dtm_rx_start;
tBTA_DM_API_BLE_DTM_STOP dtm_stop;
tBTA_DM_API_CLEAR_ADV ble_clear_adv;
tBTA_DM_API_SET_PRIVACY_MODE ble_set_privacy_mode;
#endif
tBTA_DM_API_REMOVE_ACL remove_acl;
@ -1802,6 +1812,7 @@ extern void bta_dm_ble_gap_dtm_stop(tBTA_DM_MSG *p_data);
extern void bta_dm_ble_gap_clear_adv(tBTA_DM_MSG *p_data);
extern void bta_dm_ble_gap_set_rpa_timeout(tBTA_DM_MSG *p_data);
extern void bta_dm_ble_gap_add_dev_to_resolving_list(tBTA_DM_MSG *p_data);
extern void bta_dm_ble_gap_set_privacy_mode(tBTA_DM_MSG *p_data);
#if (BLE_50_FEATURE_SUPPORT == TRUE)
extern void bta_dm_ble_gap_dtm_enhance_tx_start(tBTA_DM_MSG *p_data);
extern void bta_dm_ble_gap_dtm_enhance_rx_start(tBTA_DM_MSG *p_data);

View File

@ -437,6 +437,8 @@ typedef tBTM_SET_RPA_TIMEOUT_CMPL_CBACK tBTA_SET_RPA_TIMEOUT_CMPL_CBACK;
typedef tBTM_ADD_DEV_TO_RESOLVING_LIST_CMPL_CBACK tBTA_ADD_DEV_TO_RESOLVING_LIST_CMPL_CBACK;
typedef tBTM_SET_PRIVACY_MODE_CMPL_CBACK tBTA_SET_PRIVACY_MODE_CMPL_CBACK;
typedef tBTM_CMPL_CB tBTA_CMPL_CB;
typedef tBTM_VSC_CMPL tBTA_VSC_CMPL;
@ -2893,6 +2895,8 @@ extern void BTA_DmBleDtmTxStart(uint8_t tx_channel, uint8_t len_of_data, uint8_t
extern void BTA_DmBleDtmRxStart(uint8_t rx_channel, tBTA_DTM_CMD_CMPL_CBACK *p_dtm_cmpl_cback);
extern void BTA_DmBleDtmStop(tBTA_DTM_CMD_CMPL_CBACK *p_dtm_cmpl_cback);
extern void BTA_DmBleSetPrivacyMode(uint8_t addr_type, BD_ADDR addr, uint8_t privacy_mode, tBTA_SET_PRIVACY_MODE_CMPL_CBACK *p_cback);
/*******************************************************************************
**
** Function BTA_DmBleSetStorageParams

View File

@ -1326,6 +1326,25 @@ static void btc_ble_vendor_hci_cmd_complete_callback(tBTA_VSC_CMPL *p_param)
}
}
static void btc_ble_set_privacy_mode_callback(UINT8 status)
{
esp_ble_gap_cb_param_t param;
bt_status_t ret;
btc_msg_t msg = {0};
msg.sig = BTC_SIG_API_CB;
msg.pid = BTC_PID_GAP_BLE;
msg.act = ESP_GAP_BLE_SET_PRIVACY_MODE_COMPLETE_EVT;
param.set_privacy_mode_cmpl.status = btc_btm_status_to_esp_status(status);
ret = btc_transfer_context(&msg, &param, sizeof(esp_ble_gap_cb_param_t), NULL, NULL);
if (ret != BT_STATUS_SUCCESS) {
BTC_TRACE_ERROR("%s btc_transfer_context failed\n", __func__);
}
}
void btc_get_whitelist_size(uint16_t *length)
{
BTM_BleGetWhiteListSize(length);
@ -1504,6 +1523,13 @@ static void btc_ble_dtm_stop(tBTA_DTM_CMD_CMPL_CBACK *p_dtm_cmpl_cback)
BTA_DmBleDtmStop(p_dtm_cmpl_cback);
}
static void btc_ble_set_privacy_mode(uint8_t addr_type,
BD_ADDR addr,
uint8_t privacy_mode,
tBTA_SET_PRIVACY_MODE_CMPL_CBACK *p_cback)
{
BTA_DmBleSetPrivacyMode(addr_type, addr, privacy_mode, p_cback);
}
void btc_gap_ble_cb_handler(btc_msg_t *msg)
{
@ -2354,6 +2380,10 @@ void btc_gap_ble_call_handler(btc_msg_t *msg)
arg->vendor_cmd_send.p_param_buf,
btc_ble_vendor_hci_cmd_complete_callback);
break;
case BTC_GAP_BLE_SET_PRIVACY_MODE:
btc_ble_set_privacy_mode(arg->set_privacy_mode.addr_type, arg->set_privacy_mode.addr,
arg->set_privacy_mode.privacy_mode, btc_ble_set_privacy_mode_callback);
break;
default:
break;
}
@ -2364,6 +2394,7 @@ void btc_gap_ble_call_handler(btc_msg_t *msg)
//register connection parameter update callback
void btc_gap_callback_init(void)
{
BTM_BleRegiseterPktLengthChangeCallback(btc_set_pkt_length_callback);
BTM_BleRegiseterConnParamCallback(btc_update_conn_param_callback);
#if (BLE_50_FEATURE_SUPPORT == TRUE)
BTM_BleGapRegisterCallback(btc_ble_5_gap_callback);

View File

@ -105,6 +105,7 @@ typedef enum {
BTC_GAP_BLE_ACT_SET_RESOLVABLE_PRIVATE_ADDRESS_TIMEOUT,
BTC_GAP_BLE_ACT_ADD_DEVICE_TO_RESOLVING_LIST,
BTC_GAP_BLE_ACT_VENDOR_HCI_CMD_EVT,
BTC_GAP_BLE_SET_PRIVACY_MODE,
} btc_gap_ble_act_t;
/* btc_ble_gap_args_t */
@ -267,9 +268,15 @@ typedef union {
uint8_t param_len;
uint8_t *p_param_buf;
} vendor_cmd_send;
// BTC_GAP_BLE_SET_PRIVACY_MODE
struct set_privacy_mode {
esp_ble_addr_type_t addr_type;
esp_bd_addr_t addr;
uint8_t privacy_mode;
} set_privacy_mode;
} btc_ble_gap_args_t;
#if (BLE_50_FEATURE_SUPPORT == TRUE)
#if (BLE_50_FEATURE_SUPPORT == TRUE)
typedef union {
struct read_phy_args {
esp_bd_addr_t bd_addr;

View File

@ -36,7 +36,7 @@
#include "stack/hcimsgs.h"
#if ((BT_CONTROLLER_INCLUDED == TRUE) && SOC_ESP_NIMBLE_CONTROLLER)
#include "nimble/ble_hci_trans.h"
#include "ble_hci_trans.h"
#endif
#if (C2H_FLOW_CONTROL_INCLUDED == TRUE)
@ -541,6 +541,26 @@ static void host_send_pkt_available_cb(void)
hci_downstream_data_post(OSI_THREAD_MAX_TIMEOUT);
}
void bt_record_hci_data(uint8_t *data, uint16_t len)
{
#if (BT_HCI_LOG_INCLUDED == TRUE)
if ((data[0] == DATA_TYPE_EVENT) && (data[1] == HCI_BLE_EVENT) && ((data[3] == HCI_BLE_ADV_PKT_RPT_EVT) || (data[3] == HCI_BLE_DIRECT_ADV_EVT)
#if (BLE_ADV_REPORT_FLOW_CONTROL == TRUE)
|| (data[3] == HCI_BLE_ADV_DISCARD_REPORT_EVT)
#endif // (BLE_ADV_REPORT_FLOW_CONTROL == TRUE)
#if (BLE_50_FEATURE_SUPPORT == TRUE)
|| (data[3] == HCI_BLE_EXT_ADV_REPORT_EVT) || (data[3] == HCI_BLE_PERIOD_ADV_REPORT_EVT)
#endif // (BLE_50_FEATURE_SUPPORT == TRUE)
)) {
bt_hci_log_record_hci_adv(HCI_LOG_DATA_TYPE_ADV, &data[2], len - 2);
} else {
uint8_t data_type = ((data[0] == 2) ? HCI_LOG_DATA_TYPE_C2H_ACL : data[0]);
bt_hci_log_record_hci_data(data_type, &data[1], len - 1);
}
#endif // (BT_HCI_LOG_INCLUDED == TRUE)
}
static int host_recv_pkt_cb(uint8_t *data, uint16_t len)
{
//Target has packet to host, malloc new buffer for packet
@ -552,13 +572,11 @@ static int host_recv_pkt_cb(uint8_t *data, uint16_t len)
return 0;
}
bt_record_hci_data(data, len);
bool is_adv_rpt = host_recv_adv_packet(data);
if (!is_adv_rpt) {
#if (BT_HCI_LOG_INCLUDED == TRUE)
uint8_t data_type = ((data[0] == 2) ? HCI_LOG_DATA_TYPE_C2H_ACL : data[0]);
bt_hci_log_record_hci_data(data_type, data, len);
#endif // (BT_HCI_LOG_INCLUDED == TRUE)
pkt_size = BT_HDR_SIZE + len;
pkt = (BT_HDR *) osi_calloc(pkt_size);
if (!pkt) {
@ -572,10 +590,6 @@ static int host_recv_pkt_cb(uint8_t *data, uint16_t len)
memcpy(pkt->data, data, len);
fixed_queue_enqueue(hci_hal_env.rx_q, pkt, FIXED_QUEUE_MAX_TIMEOUT);
} else {
#if (BT_HCI_LOG_INCLUDED == TRUE)
// data type is adv report
bt_hci_log_record_hci_adv(HCI_LOG_DATA_TYPE_ADV, data, len);
#endif // (BT_HCI_LOG_INCLUDED == TRUE)
#if !BLE_ADV_REPORT_FLOW_CONTROL
// drop the packets if pkt_queue length goes beyond upper limit
if (pkt_queue_length(hci_hal_env.adv_rpt_q) > HCI_HAL_BLE_ADV_RPT_QUEUE_LEN_MAX) {

View File

@ -70,7 +70,7 @@ static tBTM_BLE_VSC_CB *cmn_ble_gap_vsc_cb_ptr;
static tBTM_BLE_CTRL_FEATURES_CBACK *p_ctrl_le_feature_rd_cmpl_cback = NULL;
#endif
tBTM_CallbackFunc conn_param_update_cb;
tBTM_CallbackFunc conn_callback_func;
/*******************************************************************************
** Local functions
*******************************************************************************/
@ -309,7 +309,21 @@ void btm_ble_sem_free(void)
*******************************************************************************/
void BTM_BleRegiseterConnParamCallback(tBTM_UPDATE_CONN_PARAM_CBACK *update_conn_param_cb)
{
conn_param_update_cb.update_conn_param_cb = update_conn_param_cb;
conn_callback_func.update_conn_param_cb = update_conn_param_cb;
}
/*******************************************************************************
**
** Function BTM_BleRegiseterPktLengthChangeCallback
**
** Description Registers a callback function for packet length changes.
**
** Returns void
**
*******************************************************************************/
void BTM_BleRegiseterPktLengthChangeCallback(tBTM_SET_PKT_DATA_LENGTH_CBACK *ptk_len_chane_cb)
{
conn_callback_func.set_pkt_data_length_cb = ptk_len_chane_cb;
}
/*******************************************************************************
@ -4727,6 +4741,17 @@ BOOLEAN BTM_BleAddDevToResolvingList(BD_ADDR addr,
return TRUE;
}
BOOLEAN BTM_BleSetPrivacyMode(UINT8 addr_type, BD_ADDR bd_addr, UINT8 privacy_mode, tBTM_SET_PRIVACY_MODE_CMPL_CBACK *p_callback)
{
if (btsnd_hcic_ble_set_privacy_mode(addr_type, bd_addr, privacy_mode) != TRUE) {
BTM_TRACE_ERROR("LE SetPrivacyMode Mode=%d: error", privacy_mode);
return FALSE;
}
btm_cb.devcb.p_set_privacy_mode_cmpl_cb = p_callback;
return TRUE;
}
bool btm_ble_adv_pkt_ready(void)
{
tBTM_BLE_CB *p_cb = &btm_cb.ble_ctr_cb;

View File

@ -454,6 +454,34 @@ void btm_ble_set_rpa_timeout_complete(UINT8 *p, UINT16 evt_len)
}
/*******************************************************************************
**
** Function btm_ble_set_privacy_mode_complete
**
** Description This function is called when the LE Set Privacy Mode command completes.
**
** Parameters p: Pointer to the command complete event data.
** evt_len: Length of the event data.
**
** Returns void
**
*******************************************************************************/
void btm_ble_set_privacy_mode_complete(UINT8 *p, UINT16 evt_len)
{
UINT8 status;
// Extract the status of the command completion from the event data
STREAM_TO_UINT8(status, p);
BTM_TRACE_DEBUG("%s status = 0x%x", __func__, status);
tBTM_SET_PRIVACY_MODE_CMPL_CBACK *p_cb = btm_cb.devcb.p_set_privacy_mode_cmpl_cb;
if (p_cb) {
(*p_cb)(status);
}
}
/*******************************************************************************
VSC that implement controller based privacy
********************************************************************************/

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@ -497,6 +497,7 @@ void btm_ble_enable_resolving_list_for_platform (UINT8 rl_mask);
void btm_ble_resolving_list_init(UINT8 max_irk_list_sz);
void btm_ble_resolving_list_cleanup(void);
void btm_ble_add_default_entry_to_resolving_list(void);
void btm_ble_set_privacy_mode_complete(UINT8 *p, UINT16 evt_len);
#endif
void btm_ble_multi_adv_configure_rpa (tBTM_BLE_MULTI_ADV_INST *p_inst);

View File

@ -237,6 +237,9 @@ tBTM_SET_RPA_TIMEOUT_CMPL_CBACK *p_ble_set_rpa_timeout_cmpl_cb; /* Callback fun
ble set rpa timeout is completed */
tBTM_ADD_DEV_TO_RESOLVING_LIST_CMPL_CBACK *p_add_dev_to_resolving_list_cmpl_cb;
tBTM_SET_PRIVACY_MODE_CMPL_CBACK *p_set_privacy_mode_cmpl_cb;
tBTM_CMPL_CB *p_le_test_cmd_cmpl_cb; /* Callback function to be called when
LE test mode command has been sent successfully */
@ -970,9 +973,11 @@ typedef struct {
typedef struct{
//connection parameters update callback
tBTM_UPDATE_CONN_PARAM_CBACK *update_conn_param_cb;
// setting packet data length callback
tBTM_SET_PKT_DATA_LENGTH_CBACK *set_pkt_data_length_cb;
}tBTM_CallbackFunc;
extern tBTM_CallbackFunc conn_param_update_cb;
extern tBTM_CallbackFunc conn_callback_func;
/* security action for L2CAP COC channels */
#define BTM_SEC_OK 1
#define BTM_SEC_ENCRYPT 2 /* encrypt the link with current key */

View File

@ -1100,6 +1100,10 @@ static void btu_hcif_hdl_command_complete (UINT16 opcode, UINT8 *p, UINT16 evt_l
case HCI_BLE_SET_RAND_PRIV_ADDR_TIMOUT:
btm_ble_set_rpa_timeout_complete(p, evt_len);
break;
case HCI_BLE_SET_PRIVACY_MODE:
btm_ble_set_privacy_mode_complete(p, evt_len);
break;
#endif // #if (defined BLE_PRIVACY_SPT && BLE_PRIVACY_SPT == TRUE)
#if (BLE_50_FEATURE_SUPPORT == TRUE)
case HCI_BLE_SET_EXT_ADV_PARAM:
case HCI_BLE_SET_EXT_ADV_DATA:
@ -1139,7 +1143,6 @@ static void btu_hcif_hdl_command_complete (UINT16 opcode, UINT8 *p, UINT16 evt_l
break;
}
#endif // #if (BLE_FEAT_PERIODIC_ADV_SYNC_TRANSFER == TRUE)
#endif
#endif /* (BLE_INCLUDED == TRUE) */
default: {
@ -1468,7 +1471,6 @@ static void btu_hcif_command_status_evt(uint8_t status, BT_HDR *command, void *c
hack->context = context;
event->event = BTU_POST_TO_TASK_NO_GOOD_HORRIBLE_HACK;
if (btu_task_post(SIG_BTU_HCI_MSG, event, OSI_THREAD_MAX_TIMEOUT) == false) {
osi_free(event);
}

View File

@ -1909,4 +1909,28 @@ UINT8 btsnd_hcic_ble_set_default_periodic_adv_sync_trans_params(UINT8 mode, UINT
return btu_hcif_send_cmd_sync(LOCAL_BR_EDR_CONTROLLER_ID, p);
}
#endif // #if (BLE_FEAT_PERIODIC_ADV_SYNC_TRANSFER == TRUE)
UINT8 btsnd_hcic_ble_set_privacy_mode(UINT8 addr_type, BD_ADDR addr, UINT8 privacy_mode)
{
BT_HDR *p;
UINT8 *pp;
if ((p = HCI_GET_CMD_BUF (HCIC_PARAM_SIZE_SET_PRIVACY_MODE)) == NULL) {
return (FALSE);
}
pp = (UINT8 *)(p + 1);
p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_PRIVACY_MODE;
p->offset = 0;
UINT16_TO_STREAM(pp, HCI_BLE_SET_PRIVACY_MODE);
UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SET_PRIVACY_MODE);
UINT8_TO_STREAM(pp, addr_type);
BDADDR_TO_STREAM(pp, addr);
UINT8_TO_STREAM(pp, privacy_mode);
btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
return (TRUE);
}
#endif

View File

@ -1006,6 +1006,8 @@ typedef void (tBTM_START_STOP_ADV_CMPL_CBACK) (UINT8 status);
typedef void (tBTM_UPDATE_DUPLICATE_EXCEPTIONAL_LIST_CMPL_CBACK) (tBTM_STATUS status, uint8_t subcode, uint32_t length, uint8_t *device_info);
typedef void (tBTM_CLEAR_ADV_CMPL_CBACK) (UINT8 status);
typedef void (tBTM_SET_PRIVACY_MODE_CMPL_CBACK) (tBTM_STATUS status);
#if (BLE_50_FEATURE_SUPPORT == TRUE)
#define BTM_BLE_5_GAP_READ_PHY_COMPLETE_EVT 1
#define BTM_BLE_5_GAP_SET_PREFERED_DEFAULT_PHY_COMPLETE_EVT 2
@ -1048,7 +1050,8 @@ typedef void (tBTM_CLEAR_ADV_CMPL_CBACK) (UINT8 status);
#define BTM_BLE_GAP_SET_PAST_PARAMS_COMPLETE_EVT 38
#define BTM_BLE_GAP_PERIODIC_ADV_SYNC_TRANS_RECV_EVT 39
#endif // #if (BLE_FEAT_PERIODIC_ADV_SYNC_TRANSFER == TRUE)
#define BTM_BLE_5_GAP_UNKNOWN_EVT 40
#define BTM_BLE_GAP_SET_PRIVACY_MODE_COMPLETE_EVT 40
#define BTM_BLE_5_GAP_UNKNOWN_EVT 41
typedef UINT8 tBTM_BLE_5_GAP_EVENT;
#define BTM_BLE_EXT_ADV_DATA_COMPLETE 0x00
@ -1366,6 +1369,7 @@ extern "C" {
**
*******************************************************************************/
void BTM_BleRegiseterConnParamCallback(tBTM_UPDATE_CONN_PARAM_CBACK *update_conn_param_cb);
void BTM_BleRegiseterPktLengthChangeCallback(tBTM_SET_PKT_DATA_LENGTH_CBACK *ptk_len_chane_cb);
/*******************************************************************************
**
@ -2689,6 +2693,25 @@ BOOLEAN BTM_BleAddDevToResolvingList(BD_ADDR addr,
uint8_t irk[],
tBTM_ADD_DEV_TO_RESOLVING_LIST_CMPL_CBACK *p_add_dev_to_resolving_list_callback);
/*******************************************************************************
**
** Function BTM_BleSetPrivacyMode
**
** Description This function is called to set the privacy mode of device in resolving list
**
** Parameters addr_type - The address type of the device in resolving list (public or random).
** addr - The address of the device in resolving list.
** privacy_mode - The privacy mode (network or device) of the device.
** p_callback - Callback function to be called when the operation is completed.
**
** Returns TRUE if the operation was successful, otherwise FALSE.
**
*******************************************************************************/
BOOLEAN BTM_BleSetPrivacyMode(UINT8 addr_type,
BD_ADDR bd_addr,
UINT8 privacy_mode,
tBTM_SET_PRIVACY_MODE_CMPL_CBACK *p_callback);
/*
#ifdef __cplusplus
}

View File

@ -384,8 +384,8 @@
#define HCI_BLE_RD_TRANSMIT_POWER (0x004B | HCI_GRP_BLE_CMDS)
#define HCI_BLE_RD_RF_PATH_COMPENSATION (0x004C | HCI_GRP_BLE_CMDS)
#define HCI_BLE_WR_RF_PATH_COMPENSATION (0x004D | HCI_GRP_BLE_CMDS)
#define HCI_BLE_SET_PRIVACY_MODE (0x004E | HCI_GRP_BLE_CMDS)
#endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)
#define HCI_BLE_SET_PRIVACY_MODE (0x004E | HCI_GRP_BLE_CMDS)
#if (BLE_FEAT_PERIODIC_ADV_SYNC_TRANSFER == TRUE)
#define HCI_BLE_SET_PERIOD_ADV_RECV_ENABLE (0x0059 | HCI_GRP_BLE_CMDS)
#define HCI_BLE_PERIOD_ADV_SYNC_TRANS (0x005A | HCI_GRP_BLE_CMDS)
@ -1134,18 +1134,18 @@ typedef UINT8 tHCI_STATUS;
#define HCI_MIN_INQ_LAP 0x9E8B00
#define HCI_MAX_INQ_LAP 0x9E8B3F
/* HCI role defenitions */
/* HCI role definitions */
#define HCI_ROLE_MASTER 0x00
#define HCI_ROLE_SLAVE 0x01
#define HCI_ROLE_UNKNOWN 0xff
/* HCI mode defenitions */
/* HCI mode definitions */
#define HCI_MODE_ACTIVE 0x00
#define HCI_MODE_HOLD 0x01
#define HCI_MODE_SNIFF 0x02
#define HCI_MODE_PARK 0x03
/* HCI Flow Control Mode defenitions */
/* HCI Flow Control Mode definitions */
#define HCI_PACKET_BASED_FC_MODE 0x00
#define HCI_BLOCK_BASED_FC_MODE 0x01
@ -1414,7 +1414,7 @@ typedef UINT8 tHCI_STATUS;
/* Define an invalid value for a handle */
#define HCI_INVALID_HANDLE 0xFFFF
/* Define max ammount of data in the HCI command */
/* Define max amount of data in the HCI command */
#define HCI_COMMAND_SIZE 255
/* Define the preamble length for all HCI Commands.

View File

@ -758,6 +758,7 @@ void btsnd_hcic_vendor_spec_cmd (BT_HDR *buffer, UINT16 opcode,
#define HCIC_PARAM_SIZE_BLE_WRITE_EXTENDED_SCAN_PARAM 11
#define HCIC_PARAM_SIZE_BLE_UPDATE_ADV_FLOW_CONTROL 2
#define HCIC_PARAM_SIZE_BLE_CLEAR_ADV 0
#define HCIC_PARAM_SIZE_SET_PRIVACY_MODE 8
#if (BLE_50_FEATURE_SUPPORT == TRUE)
#define HCIC_PARAM_SIZE_BLE_READ_PHY 2
#define HCIC_PARAM_SIZE_BLE_SET_DEF_PHY 3
@ -1041,6 +1042,8 @@ UINT8 btsnd_hcic_ble_write_rf_path_compensation(UINT16 rf_tx_path, UINT16 rf_rx_
#endif // #if (BLE_50_FEATURE_SUPPORT == TRUE)
UINT8 btsnd_hcic_ble_set_privacy_mode(UINT8 addr_type, BD_ADDR addr, UINT8 privacy_mode);
#define HCIC_PARAM_SIZE_WRITE_AUTHENT_PAYLOAD_TOUT 4
#define HCI__WRITE_AUTHENT_PAYLOAD_TOUT_HANDLE_OFF 0

View File

@ -175,14 +175,14 @@ BOOLEAN L2CA_UpdateBleConnParams (BD_ADDR rem_bda, UINT16 min_int, UINT16 max_in
L2CAP_TRACE_ERROR("There are two connection parameter requests that are being updated, please try later ");
}
if ((need_cb == TRUE) && (conn_param_update_cb.update_conn_param_cb != NULL)) {
if ((need_cb == TRUE) && (conn_callback_func.update_conn_param_cb != NULL)) {
tBTM_LE_UPDATE_CONN_PRAMS update_param;
update_param.max_conn_int = max_int;
update_param.min_conn_int = min_int;
update_param.conn_int = p_lcb->current_used_conn_interval;
update_param.slave_latency = p_lcb->current_used_conn_latency;
update_param.supervision_tout = p_lcb->current_used_conn_timeout;
(conn_param_update_cb.update_conn_param_cb)(status, p_lcb->remote_bd_addr, &update_param);
(conn_callback_func.update_conn_param_cb)(status, p_lcb->remote_bd_addr, &update_param);
return (status == HCI_SUCCESS);
}
@ -287,7 +287,7 @@ UINT8 L2CA_GetBleConnRole (BD_ADDR bd_addr)
**
** Function l2cble_notify_le_connection
**
** Description This function notifiy the l2cap connection to the app layer
** Description This function notify the l2cap connection to the app layer
**
** Returns none
**
@ -647,7 +647,7 @@ void l2cble_process_conn_update_evt (UINT16 handle, UINT8 status, UINT16 conn_in
p_lcb->conn_update_mask &= ~L2C_BLE_UPDATE_PARAM_FULL;
btu_stop_timer(&p_lcb->upda_con_timer);
if (conn_param_update_cb.update_conn_param_cb != NULL) {
if (conn_callback_func.update_conn_param_cb != NULL) {
l2c_send_update_conn_params_cb(p_lcb, status);
}
@ -686,7 +686,7 @@ void l2cble_get_conn_param_format_err_from_contoller (UINT8 status, UINT16 handl
btu_stop_timer (&p_lcb->upda_con_timer);
if (conn_param_update_cb.update_conn_param_cb != NULL) {
if (conn_callback_func.update_conn_param_cb != NULL) {
l2c_send_update_conn_params_cb(p_lcb, status);
}
if ((p_lcb->conn_update_mask & L2C_BLE_UPDATE_PARAM_FULL) != 0){
@ -868,7 +868,7 @@ void l2cble_process_sig_cmd (tL2C_LCB *p_lcb, UINT8 *p, UINT16 pkt_len)
**
** Function l2cble_init_direct_conn
**
** Description This function is to initate a direct connection
** Description This function is to initiate a direct connection
**
** Returns TRUE connection initiated, FALSE otherwise.
**
@ -894,7 +894,7 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
/* There can be only one BLE connection request outstanding at a time */
if (p_dev_rec == NULL) {
L2CAP_TRACE_WARNING ("unknown device, can not initate connection");
L2CAP_TRACE_WARNING ("unknown device, can not initiate connection");
return (FALSE);
}
@ -947,7 +947,7 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
if (!btm_ble_topology_check(BTM_BLE_STATE_INIT)) {
l2cu_release_lcb (p_lcb);
L2CAP_TRACE_ERROR("initate direct connection fail, topology limitation");
L2CAP_TRACE_ERROR("initiate direct connection fail, topology limitation");
return FALSE;
}
uint32_t link_timeout = L2CAP_BLE_LINK_CONNECT_TOUT;
@ -981,7 +981,7 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
BLE_CE_LEN_MIN, /* UINT16 min_len */
BLE_CE_LEN_MIN)) { /* UINT16 max_len */
l2cu_release_lcb (p_lcb);
L2CAP_TRACE_ERROR("initate direct connection fail, no resources");
L2CAP_TRACE_ERROR("initiate direct connection fail, no resources");
return (FALSE);
} else {
p_lcb->link_state = LST_CONNECTING;
@ -1033,7 +1033,7 @@ BOOLEAN l2cble_init_direct_conn (tL2C_LCB *p_lcb)
btm_ble_set_conn_st (BLE_DIR_CONN);
if(!btsnd_hcic_ble_create_ext_conn(&aux_conn)) {
l2cu_release_lcb (p_lcb);
L2CAP_TRACE_ERROR("initate Aux connection failed, no resources");
L2CAP_TRACE_ERROR("initiate Aux connection failed, no resources");
}
#else
L2CAP_TRACE_ERROR("BLE 5.0 not support!\n");
@ -1324,15 +1324,18 @@ void l2cble_process_data_length_change_event(UINT16 handle, UINT16 tx_data_len,
if(p_acl) {
p_acl->data_length_params = data_length_params;
if (p_acl->p_set_pkt_data_cback) {
// Only when the corresponding API is called will the callback be registered
(*p_acl->p_set_pkt_data_cback)(BTM_SUCCESS, &data_length_params);
} else {
// If the callback is not registered,using global callback
(*conn_callback_func.set_pkt_data_length_cb)(BTM_SUCCESS, &data_length_params);
}
p_acl->data_len_updating = false;
if(p_acl->data_len_waiting) {
p_acl->data_len_waiting = false;
p_acl->p_set_pkt_data_cback = p_acl->p_set_data_len_cback_waiting;
p_acl->p_set_data_len_cback_waiting = NULL;
// if value is same, triger callback directly
// if value is same, trigger callback directly
if(p_acl->tx_len_waiting == p_acl->data_length_params.tx_len) {
if(p_acl->p_set_pkt_data_cback) {
(*p_acl->p_set_pkt_data_cback)(BTM_SUCCESS, &p_acl->data_length_params);
@ -1396,7 +1399,7 @@ void l2cble_set_fixed_channel_tx_data_length(BD_ADDR remote_bda, UINT16 fix_cid,
*******************************************************************************/
void l2c_send_update_conn_params_cb(tL2C_LCB *p_lcb, UINT8 status)
{
if(conn_param_update_cb.update_conn_param_cb != NULL){
if(conn_callback_func.update_conn_param_cb != NULL){
tBTM_LE_UPDATE_CONN_PRAMS update_param;
//if myself update the connection parameters
if (p_lcb->updating_param_flag){
@ -1412,7 +1415,7 @@ void l2c_send_update_conn_params_cb(tL2C_LCB *p_lcb, UINT8 status)
update_param.slave_latency = p_lcb->current_used_conn_latency;
update_param.supervision_tout = p_lcb->current_used_conn_timeout;
(conn_param_update_cb.update_conn_param_cb)(status, p_lcb->remote_bd_addr, &update_param);
(conn_callback_func.update_conn_param_cb)(status, p_lcb->remote_bd_addr, &update_param);
}
}

View File

@ -906,7 +906,6 @@ config BT_NIMBLE_OPTIMIZE_MULTI_CONN
config BT_NIMBLE_ENC_ADV_DATA
bool "Encrypted Advertising Data"
depends on SOC_ESP_NIMBLE_CONTROLLER
select BT_NIMBLE_EXT_ADV
help
This option is used to enable encrypted advertising data.

View File

@ -21,8 +21,6 @@
#include "freertos/semphr.h"
#include "esp_compiler.h"
#include "soc/soc_caps.h"
#include "bt_common.h"
#include "hci_log/bt_hci_log.h"
#define NIMBLE_VHCI_TIMEOUT_MS 2000
#define BLE_HCI_EVENT_HDR_LEN (2)
@ -77,9 +75,6 @@ int ble_hci_trans_hs_cmd_tx(uint8_t *cmd)
}
if (xSemaphoreTake(vhci_send_sem, NIMBLE_VHCI_TIMEOUT_MS / portTICK_PERIOD_MS) == pdTRUE) {
#if (BT_HCI_LOG_INCLUDED == TRUE)
bt_hci_log_record_hci_data(cmd[0], cmd, len);
#endif
esp_vhci_host_send_packet(cmd, len);
} else {
rc = BLE_HS_ETIMEOUT_HCI;
@ -117,9 +112,6 @@ int ble_hci_trans_hs_acl_tx(struct os_mbuf *om)
len += OS_MBUF_PKTLEN(om);
if (xSemaphoreTake(vhci_send_sem, NIMBLE_VHCI_TIMEOUT_MS / portTICK_PERIOD_MS) == pdTRUE) {
#if (BT_HCI_LOG_INCLUDED == TRUE)
bt_hci_log_record_hci_data(data[0], data, len);
#endif
esp_vhci_host_send_packet(data, len);
} else {
rc = BLE_HS_ETIMEOUT_HCI;
@ -178,7 +170,6 @@ static void ble_hci_rx_acl(uint8_t *data, uint16_t len)
OS_EXIT_CRITICAL(sr);
}
/*
* @brief: BT controller callback function, used to notify the upper layer that
* controller is ready to receive command
@ -223,18 +214,12 @@ static int host_rcv_pkt(uint8_t *data, uint16_t len)
/* Allocate LE Advertising Report Event from lo pool only */
if ((data[1] == BLE_HCI_EVCODE_LE_META) &&
(data[3] == BLE_HCI_LE_SUBEV_ADV_RPT || data[3] == BLE_HCI_LE_SUBEV_EXT_ADV_RPT)) {
#if (BT_HCI_LOG_INCLUDED == TRUE)
bt_hci_log_record_hci_adv(HCI_LOG_DATA_TYPE_ADV, data, len);
#endif
evbuf = ble_transport_alloc_evt(1);
/* Skip advertising report if we're out of memory */
if (!evbuf) {
return 0;
}
} else {
#if (BT_HCI_LOG_INCLUDED == TRUE)
bt_hci_log_record_hci_data(data[0], data, len);
#endif
evbuf = ble_transport_alloc_evt(0);
assert(evbuf != NULL);
}
@ -245,9 +230,6 @@ static int host_rcv_pkt(uint8_t *data, uint16_t len)
rc = ble_hci_trans_ll_evt_tx(evbuf);
assert(rc == 0);
} else if (data[0] == BLE_HCI_UART_H4_ACL) {
#if (BT_HCI_LOG_INCLUDED == TRUE)
bt_hci_log_record_hci_data(HCI_LOG_DATA_TYPE_C2H_ACL, data, len);
#endif
ble_hci_rx_acl(data + 1, len - 1);
}
return 0;
@ -282,10 +264,6 @@ esp_err_t esp_nimble_hci_init(void)
goto err;
}
#if (BT_HCI_LOG_INCLUDED == TRUE)
bt_hci_log_init();
#endif // (BT_HCI_LOG_INCLUDED == TRUE)
xSemaphoreGive(vhci_send_sem);
#if MYNEWT_VAL(BLE_QUEUE_CONG_CHECK)
@ -313,10 +291,6 @@ esp_err_t esp_nimble_hci_deinit(void)
ble_buf_free();
#if (BT_HCI_LOG_INCLUDED == TRUE)
bt_hci_log_deinit();
#endif // (BT_HCI_LOG_INCLUDED == TRUE)
#if MYNEWT_VAL(BLE_QUEUE_CONG_CHECK)
ble_adv_list_deinit();
#endif

@ -1 +1 @@
Subproject commit fdc352619392a6f67622d7d07403de4794051362
Subproject commit 73112f9b4068ef7dc541c88c555ff829bebb9f8f

View File

@ -1,20 +1,7 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef H_HCI_TRANSPORT_

View File

@ -65,7 +65,7 @@ struct os_mbuf_pool {
/**
* A packet header structure that preceeds the mbuf packet headers.
* A packet header structure that proceeds the mbuf packet headers.
*/
struct os_mbuf_pkthdr {
/**
@ -89,7 +89,7 @@ struct os_mbuf {
*/
uint8_t *om_data;
/**
* Flags associated with this buffer, see OS_MBUF_F_* defintions
* Flags associated with this buffer, see OS_MBUF_F_* definitions
*/
uint8_t om_flags;
/**

View File

@ -1,33 +1,27 @@
/*
* Copyright (c) 1991, 1993
* The Regents of the University of California. All rights reserved.
* SPDX-FileCopyrightText: 2015-2022 The Apache Software Foundation (ASF)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* SPDX-License-Identifier: Apache-2.0
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* SPDX-FileContributor: 2019-2022 Espressif Systems (Shanghai) CO LTD
*/
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* @(#)queue.h 8.5 (Berkeley) 8/20/94
* $FreeBSD: src/sys/sys/queue.h,v 1.32.2.7 2002/04/17 14:21:02 des Exp $
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef _QUEUE_H_

View File

@ -82,12 +82,12 @@ static struct os_mempool os_msys_init_2_mempool;
#endif
#if CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER
extern int esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2, uint8_t from_heap);
extern void esp_ble_msys_deinit(void);
extern int r_esp_ble_msys_init(uint16_t msys_size1, uint16_t msys_size2, uint16_t msys_cnt1, uint16_t msys_cnt2, uint8_t from_heap);
extern void r_esp_ble_msys_deinit(void);
int os_msys_init(void)
{
return esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
return r_esp_ble_msys_init(SYSINIT_MSYS_1_MEMBLOCK_SIZE,
SYSINIT_MSYS_2_MEMBLOCK_SIZE,
OS_MSYS_1_BLOCK_COUNT,
OS_MSYS_2_BLOCK_COUNT,
@ -96,7 +96,7 @@ int os_msys_init(void)
void os_msys_deinit(void)
{
esp_ble_msys_deinit();
r_esp_ble_msys_deinit();
}
#else // CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER

View File

@ -1,319 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 The Apache Software Foundation (ASF)
*
* SPDX-License-Identifier: Apache-2.0
*
* SPDX-FileContributor: 2019-2022 Espressif Systems (Shanghai) CO LTD
*/
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef H_BLE_
#define H_BLE_
#include <inttypes.h>
#include <string.h>
#include "syscfg/syscfg.h"
#include "os/os.h"
#ifdef __cplusplus
extern "C" {
#endif
/* The number of advertising instances */
#define BLE_ADV_INSTANCES (MYNEWT_VAL(BLE_MULTI_ADV_INSTANCES) + 1)
/* BLE encryption block definitions */
#define BLE_ENC_BLOCK_SIZE (16)
/* 4 byte header + 251 byte payload. */
#define BLE_ACL_MAX_PKT_SIZE 255
struct ble_encryption_block
{
uint8_t key[BLE_ENC_BLOCK_SIZE];
uint8_t plain_text[BLE_ENC_BLOCK_SIZE];
uint8_t cipher_text[BLE_ENC_BLOCK_SIZE];
};
/*
* BLE MBUF structure:
*
* The BLE mbuf structure is as follows. Note that this structure applies to
* the packet header mbuf (not mbufs that are part of a "packet chain"):
* struct os_mbuf (16)
* struct os_mbuf_pkthdr (8)
* struct ble_mbuf_hdr (8)
* Data buffer (payload size, in bytes)
*
* The BLE mbuf header contains the following:
* flags: bitfield with the following values
* 0x01: Set if there was a match on the whitelist
* 0x02: Set if a connect request was transmitted upon receiving pdu
* 0x04: Set the first time we transmit the PDU (used to detect retry).
* channel: The logical BLE channel PHY channel # (0 - 39)
* crcok: flag denoting CRC check passed (1) or failed (0).
* rssi: RSSI, in dBm.
*/
struct ble_mbuf_hdr_rxinfo
{
uint16_t flags;
uint8_t channel;
uint8_t handle;
int8_t rssi;
/* XXX: we could just use single phy_mode field */
int8_t phy;
uint8_t phy_mode;
#if MYNEWT_VAL(BLE_LL_CFG_FEAT_LL_PRIVACY)
int8_t rpa_index;
#endif
#if MYNEWT_VAL(BLE_LL_CFG_FEAT_LL_EXT_ADV)
void *user_data;
#endif
};
/*
* Flag definitions for rxinfo
*
* Note: it's ok to have symbols with the same values as long as they cannot be
* set for the same PDU (e.g. one use by scanner, other one used by
* connection)
*/
#define BLE_MBUF_HDR_F_CONN_CREDIT (0x8000)
#define BLE_MBUF_HDR_F_IGNORED (0x8000)
#define BLE_MBUF_HDR_F_SCAN_REQ_TXD (0x4000)
#define BLE_MBUF_HDR_F_INITA_RESOLVED (0x2000)
#define BLE_MBUF_HDR_F_TARGETA_RESOLVED (0x2000)
#define BLE_MBUF_HDR_F_EXT_ADV_SEC (0x1000)
#define BLE_MBUF_HDR_F_EXT_ADV (0x0800)
#define BLE_MBUF_HDR_F_RESOLVED (0x0400)
#define BLE_MBUF_HDR_F_AUX_PTR_WAIT (0x0200)
#define BLE_MBUF_HDR_F_AUX_INVALID (0x0100)
#define BLE_MBUF_HDR_F_CRC_OK (0x0080)
#define BLE_MBUF_HDR_F_DEVMATCH (0x0040)
#define BLE_MBUF_HDR_F_MIC_FAILURE (0x0020)
#define BLE_MBUF_HDR_F_SCAN_RSP_TXD (0x0010)
#define BLE_MBUF_HDR_F_SCAN_RSP_RXD (0x0008)
#define BLE_MBUF_HDR_F_RXSTATE_MASK (0x0007)
/* Transmit info. NOTE: no flags defined */
struct ble_mbuf_hdr_txinfo
{
uint8_t flags;
uint8_t reserve0;
uint8_t pyld_len;
uint8_t hdr_byte;
uint16_t offset;
};
struct ble_mbuf_hdr
{
union {
struct ble_mbuf_hdr_rxinfo rxinfo;
struct ble_mbuf_hdr_txinfo txinfo;
};
uint32_t beg_cputime;
uint32_t rem_usecs;
};
#define BLE_MBUF_HDR_IGNORED(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_IGNORED))
#define BLE_MBUF_HDR_SCAN_REQ_TXD(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_SCAN_REQ_TXD))
#define BLE_MBUF_HDR_EXT_ADV_SEC(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_EXT_ADV_SEC))
#define BLE_MBUF_HDR_EXT_ADV(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_EXT_ADV))
#define BLE_MBUF_HDR_DEVMATCH(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_DEVMATCH))
#define BLE_MBUF_HDR_SCAN_RSP_RXD(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_SCAN_RSP_RXD))
#define BLE_MBUF_HDR_AUX_INVALID(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_AUX_INVALID))
#define BLE_MBUF_HDR_WAIT_AUX(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_AUX_PTR_WAIT))
#define BLE_MBUF_HDR_CRC_OK(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_CRC_OK))
#define BLE_MBUF_HDR_MIC_FAILURE(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_MIC_FAILURE))
#define BLE_MBUF_HDR_RESOLVED(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_RESOLVED))
#define BLE_MBUF_HDR_INITA_RESOLVED(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_INITA_RESOLVED))
#define BLE_MBUF_HDR_TARGETA_RESOLVED(hdr) \
(!!((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_TARGETA_RESOLVED))
#define BLE_MBUF_HDR_RX_STATE(hdr) \
((uint8_t)((hdr)->rxinfo.flags & BLE_MBUF_HDR_F_RXSTATE_MASK))
#define BLE_MBUF_HDR_PTR(om) \
(struct ble_mbuf_hdr *)((uint8_t *)om + sizeof(struct os_mbuf) + \
sizeof(struct os_mbuf_pkthdr))
/* BLE mbuf overhead per packet header mbuf */
#define BLE_MBUF_PKTHDR_OVERHEAD \
(sizeof(struct os_mbuf_pkthdr) + sizeof(struct ble_mbuf_hdr))
#define BLE_MBUF_MEMBLOCK_OVERHEAD \
(sizeof(struct os_mbuf) + BLE_MBUF_PKTHDR_OVERHEAD)
/* Length of host user header. Only contains the peer's connection handle. */
#define BLE_MBUF_HS_HDR_LEN (2)
#define BLE_DEV_ADDR_LEN (6)
extern uint8_t g_dev_addr[BLE_DEV_ADDR_LEN];
extern uint8_t g_random_addr[BLE_DEV_ADDR_LEN];
/* BLE Error Codes (Core v4.2 Vol 2 part D) */
enum ble_error_codes
{
/* An "error" code of 0x0 means success */
BLE_ERR_SUCCESS = 0x00,
BLE_ERR_UNKNOWN_HCI_CMD = 0x01,
BLE_ERR_UNK_CONN_ID = 0x02,
BLE_ERR_HW_FAIL = 0x03,
BLE_ERR_PAGE_TMO = 0x04,
BLE_ERR_AUTH_FAIL = 0x05,
BLE_ERR_PINKEY_MISSING = 0x06,
BLE_ERR_MEM_CAPACITY = 0x07,
BLE_ERR_CONN_SPVN_TMO = 0x08,
BLE_ERR_CONN_LIMIT = 0x09,
BLE_ERR_SYNCH_CONN_LIMIT = 0x0a,
BLE_ERR_ACL_CONN_EXISTS = 0x0b,
BLE_ERR_CMD_DISALLOWED = 0x0c,
BLE_ERR_CONN_REJ_RESOURCES = 0x0d,
BLE_ERR_CONN_REJ_SECURITY = 0x0e,
BLE_ERR_CONN_REJ_BD_ADDR = 0x0f,
BLE_ERR_CONN_ACCEPT_TMO = 0x10,
BLE_ERR_UNSUPPORTED = 0x11,
BLE_ERR_INV_HCI_CMD_PARMS = 0x12,
BLE_ERR_REM_USER_CONN_TERM = 0x13,
BLE_ERR_RD_CONN_TERM_RESRCS = 0x14,
BLE_ERR_RD_CONN_TERM_PWROFF = 0x15,
BLE_ERR_CONN_TERM_LOCAL = 0x16,
BLE_ERR_REPEATED_ATTEMPTS = 0x17,
BLE_ERR_NO_PAIRING = 0x18,
BLE_ERR_UNK_LMP = 0x19,
BLE_ERR_UNSUPP_REM_FEATURE = 0x1a,
BLE_ERR_SCO_OFFSET = 0x1b,
BLE_ERR_SCO_ITVL = 0x1c,
BLE_ERR_SCO_AIR_MODE = 0x1d,
BLE_ERR_INV_LMP_LL_PARM = 0x1e,
BLE_ERR_UNSPECIFIED = 0x1f,
BLE_ERR_UNSUPP_LMP_LL_PARM = 0x20,
BLE_ERR_NO_ROLE_CHANGE = 0x21,
BLE_ERR_LMP_LL_RSP_TMO = 0x22,
BLE_ERR_LMP_COLLISION = 0x23,
BLE_ERR_LMP_PDU = 0x24,
BLE_ERR_ENCRYPTION_MODE = 0x25,
BLE_ERR_LINK_KEY_CHANGE = 0x26,
BLE_ERR_UNSUPP_QOS = 0x27,
BLE_ERR_INSTANT_PASSED = 0x28,
BLE_ERR_UNIT_KEY_PAIRING = 0x29,
BLE_ERR_DIFF_TRANS_COLL = 0x2a,
/* BLE_ERR_RESERVED = 0x2b */
BLE_ERR_QOS_PARM = 0x2c,
BLE_ERR_QOS_REJECTED = 0x2d,
BLE_ERR_CHAN_CLASS = 0x2e,
BLE_ERR_INSUFFICIENT_SEC = 0x2f,
BLE_ERR_PARM_OUT_OF_RANGE = 0x30,
/* BLE_ERR_RESERVED = 0x31 */
BLE_ERR_PENDING_ROLE_SW = 0x32,
/* BLE_ERR_RESERVED = 0x33 */
BLE_ERR_RESERVED_SLOT = 0x34,
BLE_ERR_ROLE_SW_FAIL = 0x35,
BLE_ERR_INQ_RSP_TOO_BIG = 0x36,
BLE_ERR_SEC_SIMPLE_PAIR = 0x37,
BLE_ERR_HOST_BUSY_PAIR = 0x38,
BLE_ERR_CONN_REJ_CHANNEL = 0x39,
BLE_ERR_CTLR_BUSY = 0x3a,
BLE_ERR_CONN_PARMS = 0x3b,
BLE_ERR_DIR_ADV_TMO = 0x3c,
BLE_ERR_CONN_TERM_MIC = 0x3d,
BLE_ERR_CONN_ESTABLISHMENT = 0x3e,
BLE_ERR_MAC_CONN_FAIL = 0x3f,
BLE_ERR_COARSE_CLK_ADJ = 0x40,
BLE_ERR_TYPE0_SUBMAP_NDEF = 0x41,
BLE_ERR_UNK_ADV_INDENT = 0x42,
BLE_ERR_LIMIT_REACHED = 0x43,
BLE_ERR_OPERATION_CANCELLED = 0x44,
BLE_ERR_PACKET_TOO_LONG = 0x45,
BLE_ERR_MAX = 0xff
};
/* HW error codes */
#define BLE_HW_ERR_DO_NOT_USE (0) /* XXX: reserve this one for now */
#define BLE_HW_ERR_HCI_SYNC_LOSS (1)
/* Own Bluetooth Device address type */
#define BLE_OWN_ADDR_PUBLIC (0x00)
#define BLE_OWN_ADDR_RANDOM (0x01)
#define BLE_OWN_ADDR_RPA_PUBLIC_DEFAULT (0x02)
#define BLE_OWN_ADDR_RPA_RANDOM_DEFAULT (0x03)
/* Bluetooth Device address type */
#define BLE_ADDR_PUBLIC (0x00)
#define BLE_ADDR_RANDOM (0x01)
#define BLE_ADDR_PUBLIC_ID (0x02)
#define BLE_ADDR_RANDOM_ID (0x03)
#define BLE_ADDR_ANY (&(ble_addr_t) { 0, {0, 0, 0, 0, 0, 0} })
#define BLE_ADDR_IS_RPA(addr) (((addr)->type == BLE_ADDR_RANDOM) && \
((addr)->val[5] & 0xc0) == 0x40)
#define BLE_ADDR_IS_NRPA(addr) (((addr)->type == BLE_ADDR_RANDOM) && \
((addr)->val[5] & 0xc0) == 0x00)
#define BLE_ADDR_IS_STATIC(addr) (((addr)->type == BLE_ADDR_RANDOM) && \
((addr)->val[5] & 0xc0) == 0xc0)
typedef struct {
uint8_t type;
uint8_t val[6];
} ble_addr_t;
static inline int ble_addr_cmp(const ble_addr_t *a, const ble_addr_t *b)
{
int type_diff;
type_diff = a->type - b->type;
if (type_diff != 0) {
return type_diff;
}
return memcmp(a->val, b->val, sizeof(a->val));
}
#ifdef __cplusplus
}
#endif
#endif /* H_BLE_ */

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@ -1,34 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef H_NIMBLE_OPT_
#define H_NIMBLE_OPT_
#ifdef __cplusplus
extern "C" {
#endif
/* Include automatically-generated settings. */
#include "nimble/nimble_opt_auto.h"
#ifdef __cplusplus
}
#endif
#endif

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@ -1,132 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 The Apache Software Foundation (ASF)
*
* SPDX-License-Identifier: Apache-2.0
*
* SPDX-FileContributor: 2019-2022 Espressif Systems (Shanghai) CO LTD
*/
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef H_NIMBLE_OPT_AUTO_
#define H_NIMBLE_OPT_AUTO_
#include "syscfg/syscfg.h"
#ifdef __cplusplus
extern "C" {
#endif
/***
* Automatic options.
*
* These settings are generated automatically from the user-specified syscfg
* settings.
*/
#undef NIMBLE_BLE_ADVERTISE
#define NIMBLE_BLE_ADVERTISE \
(MYNEWT_VAL(BLE_ROLE_BROADCASTER) || MYNEWT_VAL(BLE_ROLE_PERIPHERAL))
#undef NIMBLE_BLE_SCAN
#define NIMBLE_BLE_SCAN \
(MYNEWT_VAL(BLE_ROLE_CENTRAL) || MYNEWT_VAL(BLE_ROLE_OBSERVER))
#undef NIMBLE_BLE_CONNECT
#define NIMBLE_BLE_CONNECT \
(MYNEWT_VAL(BLE_ROLE_CENTRAL) || MYNEWT_VAL(BLE_ROLE_PERIPHERAL))
/** Supported client ATT commands. */
#undef NIMBLE_BLE_ATT_CLT_FIND_INFO
#define NIMBLE_BLE_ATT_CLT_FIND_INFO \
(MYNEWT_VAL(BLE_GATT_DISC_ALL_DSCS))
#undef NIMBLE_BLE_ATT_CLT_FIND_TYPE
#define NIMBLE_BLE_ATT_CLT_FIND_TYPE \
(MYNEWT_VAL(BLE_GATT_DISC_SVC_UUID))
#undef NIMBLE_BLE_ATT_CLT_READ_TYPE
#define NIMBLE_BLE_ATT_CLT_READ_TYPE \
(MYNEWT_VAL(BLE_GATT_FIND_INC_SVCS) || \
MYNEWT_VAL(BLE_GATT_DISC_ALL_CHRS) || \
MYNEWT_VAL(BLE_GATT_DISC_CHRS_UUID) || \
MYNEWT_VAL(BLE_GATT_READ_UUID))
#undef NIMBLE_BLE_ATT_CLT_READ
#define NIMBLE_BLE_ATT_CLT_READ \
(MYNEWT_VAL(BLE_GATT_READ) || \
MYNEWT_VAL(BLE_GATT_READ_LONG) || \
MYNEWT_VAL(BLE_GATT_FIND_INC_SVCS))
#undef NIMBLE_BLE_ATT_CLT_READ_BLOB
#define NIMBLE_BLE_ATT_CLT_READ_BLOB \
(MYNEWT_VAL(BLE_GATT_READ_LONG))
#undef NIMBLE_BLE_ATT_CLT_READ_MULT
#define NIMBLE_BLE_ATT_CLT_READ_MULT \
(MYNEWT_VAL(BLE_GATT_READ_MULT))
#undef NIMBLE_BLE_ATT_CLT_READ_MULT_VAR
#define NIMBLE_BLE_ATT_CLT_READ_MULT_VAR \
(MYNEWT_VAL(BLE_GATT_READ_MULT_VAR))
#undef NIMBLE_BLE_ATT_CLT_READ_GROUP_TYPE
#define NIMBLE_BLE_ATT_CLT_READ_GROUP_TYPE \
(MYNEWT_VAL(BLE_GATT_DISC_ALL_SVCS))
#undef NIMBLE_BLE_ATT_CLT_WRITE
#define NIMBLE_BLE_ATT_CLT_WRITE \
(MYNEWT_VAL(BLE_GATT_WRITE))
#undef NIMBLE_BLE_ATT_CLT_SIGNED_WRITE
#define NIMBLE_BLE_ATT_CLT_SIGNED_WRITE \
(MYNEWT_VAL(BLE_GATT_SIGNED_WRITE))
#undef NIMBLE_BLE_ATT_CLT_WRITE_NO_RSP
#define NIMBLE_BLE_ATT_CLT_WRITE_NO_RSP \
(MYNEWT_VAL(BLE_GATT_WRITE_NO_RSP))
#undef NIMBLE_BLE_ATT_CLT_PREP_WRITE
#define NIMBLE_BLE_ATT_CLT_PREP_WRITE \
(MYNEWT_VAL(BLE_GATT_WRITE_LONG))
#undef NIMBLE_BLE_ATT_CLT_EXEC_WRITE
#define NIMBLE_BLE_ATT_CLT_EXEC_WRITE \
(MYNEWT_VAL(BLE_GATT_WRITE_LONG))
#undef NIMBLE_BLE_ATT_CLT_NOTIFY
#define NIMBLE_BLE_ATT_CLT_NOTIFY \
(MYNEWT_VAL(BLE_GATT_NOTIFY))
#undef NIMBLE_BLE_ATT_CLT_INDICATE
#define NIMBLE_BLE_ATT_CLT_INDICATE \
(MYNEWT_VAL(BLE_GATT_INDICATE))
/** Security manager settings. */
#undef NIMBLE_BLE_SM
#define NIMBLE_BLE_SM (MYNEWT_VAL(BLE_SM_LEGACY) || MYNEWT_VAL(BLE_SM_SC))
#ifdef __cplusplus
}
#endif
#endif

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@ -1,79 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef _NIMBLE_PORT_H
#define _NIMBLE_PORT_H
#include "sdkconfig.h"
#include "esp_err.h"
#include "nimble/nimble_npl.h"
#define NIMBLE_CORE (CONFIG_BT_NIMBLE_PINNED_TO_CORE < CONFIG_FREERTOS_NUMBER_OF_CORES ? CONFIG_BT_NIMBLE_PINNED_TO_CORE : tskNO_AFFINITY)
#define NIMBLE_HS_STACK_SIZE CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE
#if SOC_ESP_NIMBLE_CONTROLLER && CONFIG_BT_CONTROLLER_ENABLED
#define NIMBLE_LL_STACK_SIZE CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief nimble_port_init - Initialize controller and NimBLE host stack
*
* @return esp_err_t - ESP_OK ( if success)
* Error code in case of failure
*/
esp_err_t nimble_port_init(void);
/**
* @brief nimble_port_deinit - Deinitialize controller and NimBLE host stack
*
* @return esp_err_t - ESP_OK ( if success)
* Error code in case of failure
*/
esp_err_t nimble_port_deinit(void);
void nimble_port_run(void);
int nimble_port_stop(void);
/**
* @brief esp_nimble_init - Initialize the NimBLE host stack
*
* @return esp_err_t
*/
esp_err_t esp_nimble_init(void);
/**
* @brief esp_nimble_deinit - Deinitialize the NimBLE host stack
*
* @return esp_err_t
*/
esp_err_t esp_nimble_deinit(void);
struct ble_npl_eventq *nimble_port_get_dflt_eventq(void);
#ifdef __cplusplus
}
#endif
#endif /* _NIMBLE_PORT_H */

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@ -1,20 +1,7 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _NIMBLE_NPL_H_

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@ -1,9 +1,7 @@
/*
* SPDX-FileCopyrightText: 2019-2023 The Apache Software Foundation (ASF)
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*
* SPDX-FileContributor: 2019-2024 Espressif Systems (Shanghai) CO LTD
*/
#include <assert.h>
@ -18,7 +16,6 @@
#include "freertos/timers.h"
#include "freertos/portable.h"
#include "nimble/npl_freertos.h"
#include "nimble/nimble_port.h"
#include "os/os_mempool.h"
#include "esp_log.h"
@ -481,32 +478,32 @@ IRAM_ATTR npl_freertos_mutex_release(struct ble_npl_mutex *mu)
ble_npl_error_t
npl_freertos_sem_init(struct ble_npl_sem *sem, uint16_t tokens)
{
struct ble_npl_sem_freertos *semaphor = NULL;
struct ble_npl_sem_freertos *semaphore = NULL;
#if OS_MEM_ALLOC
if (!os_memblock_from(&ble_freertos_sem_pool,sem->sem)) {
sem->sem = os_memblock_get(&ble_freertos_sem_pool);
semaphor = (struct ble_npl_sem_freertos *)sem->sem;
semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
memset(semaphor, 0, sizeof(*semaphor));
semaphor->handle = xSemaphoreCreateCounting(128, tokens);
BLE_LL_ASSERT(semaphor->handle);
memset(semaphore, 0, sizeof(*semaphore));
semaphore->handle = xSemaphoreCreateCounting(128, tokens);
BLE_LL_ASSERT(semaphore->handle);
}
#else
if(!sem->sem) {
sem->sem = malloc(sizeof(struct ble_npl_sem_freertos));
semaphor = (struct ble_npl_sem_freertos *)sem->sem;
semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
memset(semaphor, 0, sizeof(*semaphor));
semaphor->handle = xSemaphoreCreateCounting(128, tokens);
BLE_LL_ASSERT(semaphor->handle);
memset(semaphore, 0, sizeof(*semaphore));
semaphore->handle = xSemaphoreCreateCounting(128, tokens);
BLE_LL_ASSERT(semaphore->handle);
}
#endif
@ -516,19 +513,19 @@ npl_freertos_sem_init(struct ble_npl_sem *sem, uint16_t tokens)
ble_npl_error_t
npl_freertos_sem_deinit(struct ble_npl_sem *sem)
{
struct ble_npl_sem_freertos *semaphor = (struct ble_npl_sem_freertos *)sem->sem;
struct ble_npl_sem_freertos *semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
BLE_LL_ASSERT(semaphor->handle);
vSemaphoreDelete(semaphor->handle);
BLE_LL_ASSERT(semaphore->handle);
vSemaphoreDelete(semaphore->handle);
#if OS_MEM_ALLOC
os_memblock_put(&ble_freertos_sem_pool,semaphor);
os_memblock_put(&ble_freertos_sem_pool,semaphore);
#else
free((void *)semaphor);
free((void *)semaphore);
#endif
sem->sem = NULL;
@ -540,22 +537,22 @@ IRAM_ATTR npl_freertos_sem_pend(struct ble_npl_sem *sem, ble_npl_time_t timeout)
{
BaseType_t woken;
BaseType_t ret;
struct ble_npl_sem_freertos *semaphor = (struct ble_npl_sem_freertos *)sem->sem;
struct ble_npl_sem_freertos *semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
BLE_LL_ASSERT(semaphor->handle);
BLE_LL_ASSERT(semaphore->handle);
if (in_isr()) {
BLE_LL_ASSERT(timeout == 0);
ret = xSemaphoreTakeFromISR(semaphor->handle, &woken);
ret = xSemaphoreTakeFromISR(semaphore->handle, &woken);
if( woken == pdTRUE ) {
portYIELD_FROM_ISR();
}
} else {
ret = xSemaphoreTake(semaphor->handle, timeout);
ret = xSemaphoreTake(semaphore->handle, timeout);
}
return ret == pdPASS ? BLE_NPL_OK : BLE_NPL_TIMEOUT;
@ -566,21 +563,21 @@ IRAM_ATTR npl_freertos_sem_release(struct ble_npl_sem *sem)
{
BaseType_t ret;
BaseType_t woken;
struct ble_npl_sem_freertos *semaphor = (struct ble_npl_sem_freertos *)sem->sem;
struct ble_npl_sem_freertos *semaphore = (struct ble_npl_sem_freertos *)sem->sem;
if (!semaphor) {
if (!semaphore) {
return BLE_NPL_INVALID_PARAM;
}
BLE_LL_ASSERT(semaphor->handle);
BLE_LL_ASSERT(semaphore->handle);
if (in_isr()) {
ret = xSemaphoreGiveFromISR(semaphor->handle, &woken);
ret = xSemaphoreGiveFromISR(semaphore->handle, &woken);
if( woken == pdTRUE ) {
portYIELD_FROM_ISR();
}
} else {
ret = xSemaphoreGive(semaphor->handle);
ret = xSemaphoreGive(semaphore->handle);
}
BLE_LL_ASSERT(ret == pdPASS);
@ -773,8 +770,8 @@ npl_freertos_callout_deinit(struct ble_npl_callout *co)
uint16_t
IRAM_ATTR npl_freertos_sem_get_count(struct ble_npl_sem *sem)
{
struct ble_npl_sem_freertos *semaphor = (struct ble_npl_sem_freertos *)sem->sem;
return uxSemaphoreGetCount(semaphor->handle);
struct ble_npl_sem_freertos *semaphore = (struct ble_npl_sem_freertos *)sem->sem;
return uxSemaphoreGetCount(semaphore->handle);
}

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@ -0,0 +1,5 @@
name: 'argtable3'
version: '3.2.2'
supplier: 'Organization: Espressif Systems (Shanghai) CO LTD'
originator: 'Organization: Argtable.org and individual contributors'
description: An open source ANSI C library that parses GNU-style command-line options.

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@ -63,6 +63,17 @@ menu "Driver Configurations"
endmenu # Legacy ADC Calibration Configuration
endmenu # Legacy ADC Driver Configuration
menu "Legacy DAC Driver Configurations"
depends on SOC_DAC_SUPPORTED
config DAC_SUPPRESS_DEPRECATE_WARN
bool "Suppress legacy driver deprecated warning"
default n
help
Whether to suppress the deprecation warnings when using legacy dac driver (driver/dac.h).
If you want to continue using the legacy driver, and don't want to see related deprecation warnings,
you can enable this option.
endmenu # Legacy DAC Driver Configurations
menu "Legacy MCPWM Driver Configurations"
depends on SOC_MCPWM_SUPPORTED
config MCPWM_SUPPRESS_DEPRECATE_WARN
@ -97,4 +108,48 @@ menu "Driver Configurations"
you can enable this option.
endmenu # Legacy RMT Driver Configurations
menu "Legacy I2S Driver Configurations"
depends on SOC_I2S_SUPPORTED
config I2S_SUPPRESS_DEPRECATE_WARN
bool "Suppress legacy driver deprecated warning"
default n
help
Whether to suppress the deprecation warnings when using legacy i2s driver (driver/i2s.h).
If you want to continue using the legacy driver, and don't want to see related deprecation warnings,
you can enable this option.
endmenu # Legacy I2S Driver Configurationss
menu "Legacy PCNT Driver Configurations"
depends on SOC_PCNT_SUPPORTED
config PCNT_SUPPRESS_DEPRECATE_WARN
bool "Suppress legacy driver deprecated warning"
default n
help
whether to suppress the deprecation warnings when using legacy PCNT driver (driver/pcnt.h).
If you want to continue using the legacy driver, and don't want to see related deprecation warnings,
you can enable this option.
endmenu # Legacy PCNT Driver Configurationss
menu "Legacy SDM Driver Configurations"
depends on SOC_SDM_SUPPORTED
config SDM_SUPPRESS_DEPRECATE_WARN
bool "Suppress legacy driver deprecated warning"
default n
help
whether to suppress the deprecation warnings when using legacy SDM driver (driver/sigmadelta.h).
If you want to continue using the legacy driver, and don't want to see related deprecation warnings,
you can enable this option.
endmenu # Legacy SDM Driver Configurationss
menu "Legacy Temperature Sensor Driver Configurations"
depends on SOC_TEMP_SENSOR_SUPPORTED
config TEMP_SENSOR_SUPPRESS_DEPRECATE_WARN
bool "Suppress legacy driver deprecated warning"
default n
help
whether to suppress the deprecation warnings when using legacy temperature sensor driver
(driver/temp_sensor.h). If you want to continue using the legacy driver,
and don't want to see related deprecation warnings, you can enable this option.
endmenu # Legacy Temperature Sensor Driver Configurationss
endmenu # Driver configurations

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@ -57,7 +57,7 @@ extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate posi
#define INTERNAL_BUF_NUM 5
#if SOC_AHB_GDMA_VERSION == 1
#if SOC_AHB_GDMA_SUPPORTED
#define ADC_GDMA_HOST 0
#define ADC_DMA_INTR_MASK GDMA_LL_EVENT_RX_SUC_EOF
#define ADC_DMA_INTR_MASK GDMA_LL_EVENT_RX_SUC_EOF
@ -434,7 +434,10 @@ esp_err_t adc_digi_start(void)
return ESP_ERR_INVALID_STATE;
}
//reset ADC digital part to reset ADC sampling EOF counter
periph_module_reset(PERIPH_SARADC_MODULE);
ADC_BUS_CLK_ATOMIC() {
adc_ll_reset_register();
}
sar_periph_ctrl_adc_continuous_power_acquire();
//reset flags
s_adc_digi_ctx->ringbuf_overflow_flag = 0;

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@ -70,7 +70,7 @@ extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate posi
#define FSM_ENTER() RTC_ENTER_CRITICAL()
#define FSM_EXIT() RTC_EXIT_CRITICAL()
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
//prevent ADC1 being used by I2S dma and other tasks at the same time.
static _lock_t adc1_dma_lock;
#define SARADC1_ACQUIRE() _lock_acquire( &adc1_dma_lock )
@ -172,7 +172,7 @@ static void adc_rtc_chan_init(adc_unit_t adc_unit)
esp_err_t adc_common_gpio_init(adc_unit_t adc_unit, adc_channel_t channel)
{
ESP_RETURN_ON_FALSE(channel < SOC_ADC_CHANNEL_NUM(adc_unit), ESP_ERR_INVALID_ARG, ADC_TAG, "invalid channel");
#if ADC_LL_RTC_GPIO_SUPPORTED
gpio_num_t gpio_num = 0;
//If called with `ADC_UNIT_BOTH (ADC_UNIT_1 | ADC_UNIT_2)`, both if blocks will be run
if (adc_unit == ADC_UNIT_1) {
@ -188,7 +188,7 @@ esp_err_t adc_common_gpio_init(adc_unit_t adc_unit, adc_channel_t channel)
ESP_RETURN_ON_ERROR(rtc_gpio_set_direction(gpio_num, RTC_GPIO_MODE_DISABLED), ADC_TAG, "rtc_gpio_set_direction fail");
ESP_RETURN_ON_ERROR(rtc_gpio_pulldown_dis(gpio_num), ADC_TAG, "rtc_gpio_pulldown_dis fail");
ESP_RETURN_ON_ERROR(rtc_gpio_pullup_dis(gpio_num), ADC_TAG, "rtc_gpio_pullup_dis fail");
#endif
return ESP_OK;
}
@ -571,7 +571,7 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
#endif
adc_oneshot_ll_set_output_bits(ADC_UNIT_2, bitwidth);
#if CONFIG_IDF_TARGET_ESP32
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32P4
adc_ll_set_controller(ADC_UNIT_2, ADC_LL_CTRL_RTC);// set controller
#else
adc_ll_set_controller(ADC_UNIT_2, ADC_LL_CTRL_ARB);// set controller

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -81,6 +81,18 @@ typedef enum {
ADC1_CHANNEL_6, /*!< ADC1 channel 6 is GPIO6 */
ADC1_CHANNEL_MAX,
} adc1_channel_t;
#elif CONFIG_IDF_TARGET_ESP32P4
typedef enum {
ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO16 */
ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO17 */
ADC1_CHANNEL_2, /*!< ADC1 channel 2 is GPIO18 */
ADC1_CHANNEL_3, /*!< ADC1 channel 3 is GPIO19 */
ADC1_CHANNEL_4, /*!< ADC1 channel 4 is GPIO20 */
ADC1_CHANNEL_5, /*!< ADC1 channel 5 is GPIO21 */
ADC1_CHANNEL_6, /*!< ADC1 channel 6 is GPIO22 */
ADC1_CHANNEL_7, /*!< ADC1 channel 7 is GPIO23 */
ADC1_CHANNEL_MAX,
} adc1_channel_t;
#endif // CONFIG_IDF_TARGET_*
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
@ -103,6 +115,17 @@ typedef enum {
ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */
ADC2_CHANNEL_MAX,
} adc2_channel_t;
#elif CONFIG_IDF_TARGET_ESP32P4
typedef enum {
ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO49 */
ADC2_CHANNEL_1, /*!< ADC2 channel 1 is GPIO50 */
ADC2_CHANNEL_2, /*!< ADC2 channel 2 is GPIO51 */
ADC2_CHANNEL_3, /*!< ADC2 channel 3 is GPIO52 */
ADC2_CHANNEL_4, /*!< ADC2 channel 4 is GPIO53 */
ADC2_CHANNEL_5, /*!< ADC2 channel 5 is GPIO54 */
ADC2_CHANNEL_MAX,
} adc2_channel_t;
#endif
#if SOC_ADC_DMA_SUPPORTED

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@ -61,7 +61,6 @@
#include "esp_pm.h"
#include "esp_efuse.h"
#include "esp_rom_gpio.h"
#include "esp_dma_utils.h"
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
#include "esp_cache.h"
@ -348,14 +347,22 @@ static esp_err_t i2s_dma_intr_init(i2s_port_t i2s_num, int intr_flag)
gdma_trigger_t trig = {.periph = GDMA_TRIG_PERIPH_I2S};
switch (i2s_num) {
#if SOC_I2S_NUM > 2
case I2S_NUM_2:
trig.instance_id = SOC_GDMA_TRIG_PERIPH_I2S2;
break;
#endif
#if SOC_I2S_NUM > 1
case I2S_NUM_1:
trig.instance_id = SOC_GDMA_TRIG_PERIPH_I2S1;
break;
#endif
default:
case I2S_NUM_0:
trig.instance_id = SOC_GDMA_TRIG_PERIPH_I2S0;
break;
default:
ESP_LOGE(TAG, "Unsupported I2S port number");
return ESP_ERR_NOT_SUPPORTED;
}
/* Set GDMA config */
@ -572,22 +579,17 @@ static esp_err_t i2s_alloc_dma_buffer(i2s_port_t i2s_num, i2s_dma_t *dma_obj)
ESP_GOTO_ON_FALSE(dma_obj, ESP_ERR_INVALID_ARG, err, TAG, "I2S DMA object can't be NULL");
uint32_t buf_cnt = p_i2s[i2s_num]->dma_desc_num;
size_t desc_size = 0;
for (int cnt = 0; cnt < buf_cnt; cnt++) {
/* Allocate DMA buffer */
esp_dma_mem_info_t dma_mem_info = {
.extra_heap_caps = MALLOC_CAP_INTERNAL,
.dma_alignment_bytes = 4,
};
//TODO: IDF-9636
esp_dma_capable_calloc(1, sizeof(char) * dma_obj->buf_size, &dma_mem_info, (void **)&dma_obj->buf[cnt], NULL);
dma_obj->buf[cnt] = heap_caps_aligned_calloc(4, 1, sizeof(char) * dma_obj->buf_size,
MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
ESP_GOTO_ON_FALSE(dma_obj->buf[cnt], ESP_ERR_NO_MEM, err, TAG, "Error malloc dma buffer");
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
esp_cache_msync(dma_obj->buf[cnt], dma_obj->buf_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
#endif
/* Allocate DMA descriptor */
esp_dma_capable_calloc(1, sizeof(lldesc_t), &dma_mem_info, (void **)&dma_obj->desc[cnt], &desc_size);
dma_obj->desc[cnt] = heap_caps_aligned_calloc(4, 1, sizeof(lldesc_t), MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
ESP_GOTO_ON_FALSE(dma_obj->desc[cnt], ESP_ERR_NO_MEM, err, TAG, "Error malloc dma description entry");
}
/* DMA descriptor must be initialize after all descriptor has been created, otherwise they can't be linked together as a chain */
@ -603,7 +605,7 @@ static esp_err_t i2s_alloc_dma_buffer(i2s_port_t i2s_num, i2s_dma_t *dma_obj)
/* Link to the next descriptor */
dma_obj->desc[cnt]->empty = (uint32_t)((cnt < (buf_cnt - 1)) ? (dma_obj->desc[cnt + 1]) : dma_obj->desc[0]);
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
esp_cache_msync(dma_obj->desc[cnt], desc_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
esp_cache_msync(dma_obj->desc[cnt], sizeof(lldesc_t), ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED);
#endif
}
if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

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@ -280,7 +280,7 @@ static void i2c_hw_enable(i2c_port_t i2c_num)
static esp_err_t i2c_sleep_retention_init(void *arg)
{
i2c_port_t i2c_num = *(i2c_port_t *)arg;
esp_err_t ret = sleep_retention_entries_create(i2c_regs_retention[i2c_num].link_list, i2c_regs_retention[i2c_num].link_num, REGDMA_LINK_PRI_7, I2C_SLEEP_RETENTION_MODULE(i2c_num));
esp_err_t ret = sleep_retention_entries_create(i2c_regs_retention[i2c_num].link_list, i2c_regs_retention[i2c_num].link_num, REGDMA_LINK_PRI_I2C, I2C_SLEEP_RETENTION_MODULE(i2c_num));
ESP_RETURN_ON_ERROR(ret, I2C_TAG, "failed to allocate mem for sleep retention");
return ret;
}

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@ -17,6 +17,10 @@ components/driver/test_apps/i2s_test_apps/legacy_i2s_driver:
components/driver/test_apps/legacy_adc_driver:
disable:
- if: SOC_ADC_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: lack of runners, TODO IDF-9573
depends_components:
- efuse
- esp_driver_i2s
@ -50,6 +54,9 @@ components/driver/test_apps/legacy_mcpwm_driver:
components/driver/test_apps/legacy_pcnt_driver:
disable:
- if: SOC_PCNT_SUPPORTED != 1
- if: IDF_TARGET == "esp32c5"
temporary: true
reason: build failed. track in IDFCI-2204
depends_filepatterns:
- components/driver/deprecated/**/*pcnt*

View File

@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
@ -67,6 +67,13 @@
#define ADC_TEST_HIGH_VAL 3390
#define ADC_TEST_HIGH_THRESH 200
#elif CONFIG_IDF_TARGET_ESP32P4
#define ADC_TEST_LOW_VAL 3100
#define ADC_TEST_LOW_THRESH 200
#define ADC_TEST_HIGH_VAL 4095
#define ADC_TEST_HIGH_THRESH 200
#endif
//ADC Channels

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@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import pytest
from pytest_embedded import Dut

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@ -18,7 +18,9 @@ extern "C" {
#endif
/* -------------------- Default initializers and flags ---------------------- */
/** @cond */ //Doxy command to hide preprocessor definitions from docs
/**
* @brief Initializer macro for general configuration structure.
*

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@ -288,7 +288,7 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
#endif
#if SOC_ECDSA_SUPPORTED
#if SOC_EFUSE_ECDSA_KEY
purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
#endif
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY)) {
@ -303,7 +303,7 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
#endif //#ifdef SOC_EFUSE_SUPPORT_XTS_AES_256_KEYS
#if SOC_ECDSA_SUPPORTED
#if SOC_EFUSE_ECDSA_KEY
purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
#endif
#if SOC_KEY_MANAGER_SUPPORTED

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -63,7 +63,7 @@ TEST_CASE("Test efuse API blocks burning XTS and ECDSA keys into BLOCK9", "[efus
purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2;
TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
#endif
#if SOC_ECDSA_SUPPORTED
#if SOC_EFUSE_ECDSA_KEY
purpose = ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY;
TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
#endif
@ -90,7 +90,7 @@ static esp_err_t s_check_key(esp_efuse_block_t num_key, void* wr_key)
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
#endif
#if SOC_ECDSA_SUPPORTED
#if SOC_EFUSE_ECDSA_KEY
purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
#endif
purpose == ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL ||
@ -169,7 +169,7 @@ TEST_CASE("Test esp_efuse_write_key for virt mode", "[efuse]")
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
#endif //#ifdef SOC_EFUSE_SUPPORT_XTS_AES_256_KEYS
#if SOC_ECDSA_SUPPORTED
#if SOC_EFUSE_ECDSA_KEY
purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
#endif
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY)) {
@ -204,7 +204,7 @@ TEST_CASE("Test 1 esp_efuse_write_key for FPGA", "[efuse]")
esp_efuse_purpose_t purpose [] = {
ESP_EFUSE_KEY_PURPOSE_USER,
#if SOC_ECDSA_SUPPORTED
#if SOC_EFUSE_ECDSA_KEY
ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY,
#else
ESP_EFUSE_KEY_PURPOSE_RESERVED,

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@ -53,5 +53,5 @@ endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${includes}
PRIV_REQUIRES driver esp_driver_gpio efuse esp_pm esp_ringbuf
PRIV_REQUIRES driver esp_driver_gpio efuse esp_pm esp_ringbuf esp_mm
LDFRAGMENTS linker.lf)

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