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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
change(i80_lcd): set DMA transfer burst size
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morris
parent
e8852d5c38
commit
b2ff20d94c
@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -27,10 +27,9 @@
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#include "soc/soc_caps.h"
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#include "esp_clk_tree.h"
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#include "esp_memory_utils.h"
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#include "esp_cache.h"
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#include "hal/dma_types.h"
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#include "hal/gpio_hal.h"
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#include "hal/cache_hal.h"
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#include "hal/cache_ll.h"
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#include "esp_private/gdma.h"
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#include "driver/gpio.h"
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#include "esp_private/periph_ctrl.h"
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@ -38,7 +37,6 @@
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#include "soc/lcd_periph.h"
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#include "hal/lcd_ll.h"
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#include "hal/lcd_hal.h"
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#include "esp_cache.h"
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#define ALIGN_UP(size, align) (((size) + (align) - 1) & ~((align) - 1))
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#define ALIGN_DOWN(size, align) ((size) & ~((align) - 1))
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@ -52,7 +50,7 @@ typedef struct lcd_i80_trans_descriptor_t lcd_i80_trans_descriptor_t;
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static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size);
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static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size);
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static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io);
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static esp_err_t lcd_i80_init_dma_link(esp_lcd_i80_bus_handle_t bus);
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static esp_err_t lcd_i80_init_dma_link(esp_lcd_i80_bus_handle_t bus, const esp_lcd_i80_bus_config_t *bus_config);
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static void lcd_periph_trigger_quick_trans_done_event(esp_lcd_i80_bus_handle_t bus);
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static esp_err_t lcd_i80_select_periph_clock(esp_lcd_i80_bus_handle_t bus, lcd_clock_source_t clk_src);
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static esp_err_t lcd_i80_bus_configure_gpio(esp_lcd_i80_bus_handle_t bus, const esp_lcd_i80_bus_config_t *bus_config);
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@ -72,8 +70,8 @@ struct esp_lcd_i80_bus_t {
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uint8_t *format_buffer; // The driver allocates an internal buffer for DMA to do data format transformer
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size_t resolution_hz; // LCD_CLK resolution, determined by selected clock source
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gdma_channel_handle_t dma_chan; // DMA channel handle
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size_t psram_trans_align; // DMA transfer alignment for data allocated from PSRAM
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size_t sram_trans_align; // DMA transfer alignment for data allocated from SRAM
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size_t int_mem_align; // Alignment for internal memory
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size_t ext_mem_align; // Alignment for external memory
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lcd_i80_trans_descriptor_t *cur_trans; // Current transaction
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lcd_panel_io_i80_t *cur_device; // Current working device
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LIST_HEAD(i80_device_list, lcd_panel_io_i80_t) device_list; // Head of i80 device list
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@ -175,10 +173,8 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
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lcd_ll_enable_interrupt(bus->hal.dev, LCD_LL_EVENT_TRANS_DONE, false); // disable all interrupts
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lcd_ll_clear_interrupt_status(bus->hal.dev, UINT32_MAX); // clear pending interrupt
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// install DMA service
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bus->psram_trans_align = bus_config->psram_trans_align;
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bus->sram_trans_align = bus_config->sram_trans_align;
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bus->bus_width = bus_config->bus_width;
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ret = lcd_i80_init_dma_link(bus);
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ret = lcd_i80_init_dma_link(bus, bus_config);
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ESP_GOTO_ON_ERROR(ret, err, TAG, "install DMA failed");
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// disable RGB-LCD mode
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lcd_ll_enable_rgb_mode(bus->hal.dev, false);
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@ -481,6 +477,18 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
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esp_lcd_i80_bus_t *bus = i80_device->bus;
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lcd_i80_trans_descriptor_t *trans_desc = NULL;
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assert(color_size <= (bus->num_dma_nodes * DMA_DESCRIPTOR_BUFFER_MAX_SIZE) && "color bytes too long, enlarge max_transfer_bytes");
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if (esp_ptr_external_ram(color)) {
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// check alignment
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ESP_RETURN_ON_FALSE(((uint32_t)color & (bus->ext_mem_align - 1)) == 0, ESP_ERR_INVALID_ARG, TAG, "color address not aligned");
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ESP_RETURN_ON_FALSE((color_size & (bus->ext_mem_align - 1)) == 0, ESP_ERR_INVALID_ARG, TAG, "color size not aligned");
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// flush frame buffer from cache to the physical PSRAM
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esp_cache_msync((void *)color, color_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED);
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} else {
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// check alignment
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ESP_RETURN_ON_FALSE(((uint32_t)color & (bus->int_mem_align - 1)) == 0, ESP_ERR_INVALID_ARG, TAG, "color address not aligned");
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ESP_RETURN_ON_FALSE((color_size & (bus->int_mem_align - 1)) == 0, ESP_ERR_INVALID_ARG, TAG, "color size not aligned");
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}
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// in case bus_width=16 and cmd_bits=8, we still need 1 cmd_cycle
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uint32_t cmd_cycles = i80_device->lcd_cmd_bits / bus->bus_width;
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if (cmd_cycles * bus->bus_width < i80_device->lcd_cmd_bits) {
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@ -503,13 +511,6 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
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trans_desc->trans_done_cb = i80_device->on_color_trans_done;
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trans_desc->user_ctx = i80_device->user_ctx;
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if (esp_ptr_external_ram(color)) {
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uint32_t dcache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_DATA);
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// flush frame buffer from cache to the physical PSRAM
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// note the esp_cache_msync function will check the alignment of the address and size, make sure they're aligned to current cache line size
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esp_cache_msync((void *)ALIGN_DOWN((intptr_t)color, dcache_line_size), ALIGN_UP(color_size, dcache_line_size), 0);
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}
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// send transaction to trans_queue
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xQueueSend(i80_device->trans_queue, &trans_desc, portMAX_DELAY);
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i80_device->num_trans_inflight++;
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@ -542,7 +543,7 @@ static esp_err_t lcd_i80_select_periph_clock(esp_lcd_i80_bus_handle_t bus, lcd_c
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return ESP_OK;
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}
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static esp_err_t lcd_i80_init_dma_link(esp_lcd_i80_bus_handle_t bus)
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static esp_err_t lcd_i80_init_dma_link(esp_lcd_i80_bus_handle_t bus, const esp_lcd_i80_bus_config_t *bus_config)
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{
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esp_err_t ret = ESP_OK;
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// chain DMA descriptors
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@ -567,12 +568,13 @@ static esp_err_t lcd_i80_init_dma_link(esp_lcd_i80_bus_handle_t bus)
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.owner_check = true
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};
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gdma_apply_strategy(bus->dma_chan, &strategy_config);
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// set DMA transfer ability
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gdma_transfer_ability_t ability = {
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.psram_trans_align = bus->psram_trans_align,
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.sram_trans_align = bus->sram_trans_align,
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// config DMA transfer parameters
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gdma_transfer_config_t trans_cfg = {
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.max_data_burst_size = bus_config->dma_burst_size ? bus_config->dma_burst_size : 16, // Enable DMA burst transfer for better performance
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.access_ext_mem = true, // the LCD can carry pixel buffer from the external memory
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};
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gdma_set_transfer_ability(bus->dma_chan, &ability);
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ESP_GOTO_ON_ERROR(gdma_config_transfer(bus->dma_chan, &trans_cfg), err, TAG, "config DMA transfer failed");
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gdma_get_alignment_constraints(bus->dma_chan, &bus->int_mem_align, &bus->ext_mem_align);
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return ESP_OK;
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err:
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if (bus->dma_chan) {
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@ -238,8 +238,11 @@ typedef struct {
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int data_gpio_nums[ESP_LCD_I80_BUS_WIDTH_MAX]; /*!< GPIOs used for data lines */
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size_t bus_width; /*!< Number of data lines, 8 or 16 */
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size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */
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size_t psram_trans_align; /*!< DMA transfer alignment for data allocated from PSRAM */
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size_t sram_trans_align; /*!< DMA transfer alignment for data allocated from SRAM */
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union {
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size_t psram_trans_align; /*!< DMA transfer alignment for data allocated from PSRAM */
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size_t dma_burst_size; /*!< DMA burst size, in bytes */
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};
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size_t sram_trans_align __attribute__((deprecated)); /*!< DMA transfer alignment for data allocated from SRAM */
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} esp_lcd_i80_bus_config_t;
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/**
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@ -29,8 +29,7 @@ I80 Interfaced LCD
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},
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.bus_width = 8,
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.max_transfer_bytes = EXAMPLE_LCD_H_RES * 100 * sizeof(uint16_t), // transfer 100 lines of pixels (assume pixel is RGB565) at most in one transaction
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.psram_trans_align = EXAMPLE_PSRAM_DATA_ALIGNMENT,
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.sram_trans_align = 4,
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.dma_burst_size = EXAMPLE_DMA_BURST_SIZE,
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};
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ESP_ERROR_CHECK(esp_lcd_new_i80_bus(&bus_config, &i80_bus));
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@ -93,8 +93,7 @@ static const char *TAG = "example";
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#define EXAMPLE_LVGL_TASK_STACK_SIZE (4 * 1024)
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#define EXAMPLE_LVGL_TASK_PRIORITY 2
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// Supported alignment: 16, 32, 64. A higher alignment can enables higher burst transfer size, thus a higher i80 bus throughput.
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#define EXAMPLE_PSRAM_DATA_ALIGNMENT 64
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#define EXAMPLE_DMA_BURST_SIZE 64 // 16, 32, 64. Higher burst size can improve the performance when the DMA buffer comes from PSRAM
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static SemaphoreHandle_t lvgl_mux = NULL;
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@ -248,8 +247,7 @@ void example_init_i80_bus(esp_lcd_panel_io_handle_t *io_handle, void *user_ctx)
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},
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.bus_width = CONFIG_EXAMPLE_LCD_I80_BUS_WIDTH,
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.max_transfer_bytes = EXAMPLE_LCD_H_RES * 100 * sizeof(uint16_t),
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.psram_trans_align = EXAMPLE_PSRAM_DATA_ALIGNMENT,
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.sram_trans_align = 4,
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.dma_burst_size = EXAMPLE_DMA_BURST_SIZE,
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};
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ESP_ERROR_CHECK(esp_lcd_new_i80_bus(&bus_config, &i80_bus));
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