Commit Graph

60 Commits

Author SHA1 Message Date
Marius Vikhammer
4144451bdc bootloader: increase iram_loader_seq size on S2
Segment was full when compiling with -O0
2022-11-28 15:16:48 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
wuzhenghui
66fb86972d bootloader: update bootloader memory map 2022-09-29 11:13:06 +08:00
wuzhenghui
1c820b0a6d esp32c6: add bootloader support 2022-09-26 20:24:52 +08:00
wuzhenghui
5e8ba9cea8 use enum and designated initializers in soc_memory_type define 2022-07-29 17:07:41 +08:00
wuzhenghui
2ad49a9be5 update bootloader.ld rom_boot ram usage info 2022-07-29 10:51:47 +08:00
wuzhenghui
d6461d91e2 update bootloader memory allocation 2022-07-29 10:51:47 +08:00
Omar Chebib
3c9856bdd1 (Xtensa) Build: add .xt.prop and .xt.lit to the compiled ELF file
Adding prop and lit sections to the ELF will let the debugger and the disassembler
have more info about data bytes present in the middle of the Xtensa
instructions, usually used for padding.
2022-07-05 04:39:29 +00:00
Alexey Lapshin
69b317368e esp_system: Fix esp32c2/esp32c3/esp32h2 TLS size
The change fixes thread-local-storage size by removing .srodata section
from it. It initially was included in TLS section by mistake.
The issue was found when stack size increased after building applications
with GCC-11.1 compiler. Stack size became bigger because some new data
appeared in .srodata. See more details here:
adce62f53d
2022-06-27 03:29:08 +00:00
Ivan Grokhotkov
8ee3decdba
bootloader, esp_system: increase static allocation space for esp32s3
The previously used splits between memory allocated for ROM code,
2nd stage bootloader and the app were somewhat safe and conservative.
This resulted in some space being unavailable for static allocation
in the app.

This commit increases the space available for static allocation to the
maximum possible amount.

1. Some of the ROM code static allocation is only used in UART/USB/SPI
   download modes. This region ("shared buffers") has been placed at
   the lower end of ROM memory area, to be reusable in flash boot
   mode. The 2nd stage bootloader linker script is modified to "pack"
   all sections exactly up to the end but with roughly 8K margin between
   startup stacks.
2. Instead of calculating the sections placement and hardcoding the
   addresses in the LD script again, rewrite it to calculate the
   start address of each memory region automatically based on the
   logic above.
3. Adjust the app memory layout (SRAM_IRAM_END) accordingly,
   increasing the space available for static allocation.

Overall these changes increase the space available for static
allocation by about 78kB.

The downside of these changes is that the 2nd stage bootloader .data
segment is now directly adjacent to the startup stack on the PRO CPU.
Previously, there was effectively about 78kB of extra stack space for
the PRO CPU, before the stack would run into the data segment.
2022-06-15 17:57:11 +05:30
Michael (XIAO Xufeng)
aab535fe4a Merge branch 'bugfix/regi2c_ctrl_spinlock_s2' into 'master'
hw_support: fixed regi2c not protected by lock on ESP32S2

See merge request espressif/esp-idf!16653
2022-03-13 02:47:53 +08:00
Michael (XIAO Xufeng)
d5bdf95580 hw_support: fixed regi2c not protected by lock on ESP32S2 2022-03-13 00:24:08 +08:00
Armando
c1cbd7bbf6 cache/mmu: implememnt cache and mmu hal APIs in bootloader 2022-03-11 22:43:11 +08:00
KonstantinKondrashov
9605f3eb1a soc: Adds efuse hal
Replaced eFuse ROM funcs with hal layer
2022-02-24 22:20:09 +08:00
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Cao Sen Miao
3a4db97cec spi_flash: move patch files to common rom patch folder 2021-12-30 14:05:12 +08:00
Jakob Hasse
64a355eba8 feat (bootloader): added rng sampling
Set maximum RNG query frequency to save value known from tests
2021-12-27 13:59:20 +08:00
Cao Sen Miao
e81841318f CI: Enable ESP8684 build stage CI on master 2021-12-13 19:18:47 +08:00
Cao Sen Miao
bf6fa70812 ESP8684: update bootloader, bootloader_support, esp_rom 2021-11-06 17:33:44 +08:00
Sachin Parekh
bf1dde7233 bootloader: Enable clock glitch detection
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
2021-09-02 12:25:12 +05:30
Wu Zheng Hui
fb7894382b Merge branch 'bugfix/fix_c3_bootloader_ld_addr_err' into 'master'
update c3 bootloader ld rom addr info

See merge request espressif/esp-idf!14168
2021-07-31 05:43:58 +00:00
KonstantinKondrashov
4ccb5515ef fpga/bootloader: Fix LoadProhibited error when bootloader_fill_random() is not in iram_loader_seg 2021-07-16 10:50:06 +10:00
Omar Chebib
a79acb413e bootloader: override the 2nd stage bootloader
Add the possibility to have user bootloader components. This is performed
from an application/project, by creating bootloader components. To do so,
it is required to create a `bootloader_component` directory containing
the custom modules to be compiled with the bootloader.

Thanks to this, two solutions are available to override the bootloader now:
- Using hooks within a user bootloader component
- Using a user defined `main` bootloader component to totally override the
  old implementation

Please check the two new examples in `examples/custom_bootloader`

* Closes https://github.com/espressif/esp-idf/issues/7043
2021-07-05 10:25:32 +08:00
Shu Chen
75bd02bd46 esp32h2: add some more fixes and TODOs 2021-07-01 20:36:39 +08:00
wuzhenghui
112372d598 update rom bootloader addr info 2021-07-01 19:53:50 +08:00
Shu Chen
2df4ddf998 esp32h2: fixes after rebase 2021-07-01 19:53:50 +08:00
Shu Chen
c0056813f2 esp32h2: add bootloader support 2021-07-01 19:53:11 +08:00
wuzhenghui
a59eb2d607 update c3 bootloader ld addr info 2021-06-28 10:51:06 +08:00
Konstantin Kondrashov
f339b3fc96 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key()
These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
2021-06-17 07:21:36 +08:00
Marius Vikhammer
8ac74082f1 soc: add dummy bytes to ensure instr prefetch always valid
The CPU might prefetch instructions, which means it in some cases
will try to fetch instruction located after the last instruction in
flash.text.

Add dummy bytes to ensure fetching these wont result in an error,
 e.g. MMU exceptions
2021-03-29 13:50:03 +08:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot)
- ESP32 ECO3, ESP32-S2/C3/S3
2021-03-15 12:30:20 +00:00
morris
65aebef596 esp32c3: added 2nd bootloader project linker file 2020-12-11 11:44:01 +08:00
Renz Bagaporo
6b0a5af73e soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
morris
9de6cba434 ci: add more build test for esp32-s3 2020-10-27 17:22:17 +08:00
Angus Gratton
b35cb43caf bootloader_support: Add dummy ESP32-S3 RNG support 2020-10-16 18:48:26 +11:00
Angus Gratton
699742acc6 esp32s2: Support bootloader_random_enable() 2020-10-16 18:48:26 +11:00
fuzhibo
6773df88f2 feature(rtc): rename i2c_xxx to regi2c_xxx 2020-10-14 21:15:24 +08:00
Michael (XIAO Xufeng)
953c046550 esp32s3/bootloader: extend IRAM usage to 0x6000
The bootloader cannot fit in the size of iram_loader_seg when built under -O0. Extend the IRAM size to fix this.
2020-10-09 17:50:17 +08:00
fuzhibo
247789bb2e rtc: support access internal i2c register 2020-09-27 12:12:17 +08:00
Ivan Grokhotkov
7a9d2c3fb4 bootloader: fix section placement of wdt_hal
Regression from moving HAL and LL code into the new "hal" component.
2020-09-03 18:14:17 +02:00
Ivan Grokhotkov
66a32c1707 bootloader: fix section placement issues found by the check script
Summary of changes:

- bootloader_clock split into *_clock_init and *_clock_loader.
  Only esp_clk_apb_freq is in *_clock_loader.
- bootloader_common moved out of loader; functions needed in loader
  (or, referenced from bootloader_utility) were moved into
  bootloader_common_loader.c.
- assert and abort moved into bootloader_panic, made part of the
  loader
- rtc_clk and rtc_time made part of loader
2020-09-03 18:14:17 +02:00
Angus Gratton
abdb657926 bootloader esp32s2: Increase bootloader DRAM & IRAM allowance
Bootloader DRAM now ends at 0x3FFEAB00 which is the start of ROM
static RAM (reclaimable after app is running).

IRAM loader segment increased by 8KB.

Available total static RAM for the app is now reduced by 16KB.
2020-07-27 00:01:10 +00:00
morris
3a8f5e45f0 bootloader: add linker script for esp32s3 2020-07-20 10:51:05 +08:00
Ivan Grokhotkov
6dfb2d83a7 bootloader: combine console code for ESP32 and S2, add USB support 2020-06-26 15:38:49 +02:00
Darian Leung
91841a53ff WDT: Add LL and HAL for watchdog timers
This commit updates the watchdog timers (MWDT and RWDT)
in the following ways:

- Add seprate LL for MWDT and RWDT.
- Add a combined WDT HAL for all Watchdog Timers
- Update int_wdt.c and task_wdt.c to use WDT HAL
- Remove most dependencies on LL or direct register access
  in other components. They will now use the WDT HAL
- Update use of watchdogs (including RTC WDT) in bootloader and
  startup code to use the HAL layer.
2020-03-26 02:14:02 +08:00
Angus Gratton
d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Supreet Deshpande
2bf329eb2c Fixes accessing some files from 2nd part of the bootloader. 2020-02-10 12:34:18 +05:30
Ivan Grokhotkov
fd15acb50f esp32s2: bootloader: move iram_loader segment higher
This gives extra 16kB for the application's static .data/.bss
2020-01-24 10:48:20 +01:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
duyi
18a05e2ee0 update ld file for esp32-s2 2020-01-16 17:43:59 +08:00