Commit Graph

384 Commits

Author SHA1 Message Date
Cao Sen Miao
56a2d0b8a2 BOD: Bringup for ESP32C6 2023-01-10 10:37:30 +08:00
Ivan Grokhotkov
0dcdd39db1 soc: fix some memory region boundaries for esp32c3, esp32c2, esp32h4 2023-01-09 07:33:37 +00:00
Armando
349922dcee adc: make adc_channel.h macros work with ng driver
Closes https://github.com/espressif/esp-idf/issues/10508
2023-01-09 14:25:24 +08:00
morris
cb7e957cc4 Merge branch 'feature/io_mux_use_pll80_c6' into 'master'
io_mux: support change clock source to PLL_F80M

Closes IDF-6342 and IDF-6345

See merge request espressif/esp-idf!21613
2022-12-29 22:06:52 +08:00
morris
ca1b182b25 glitch_filter: support derive clock source form IO MUX 2022-12-29 14:46:16 +08:00
morris
cbe297e5a0 sdm: support derive clock source from IO MUX 2022-12-29 14:46:16 +08:00
Cao Sen Miao
4713a9a7f2 ESP32H2: Introduce new chip target esp32h2, hello_world example supported 2022-12-29 12:29:14 +08:00
wuzhenghui
aa20825659 soc_caps: rename ESP_PD_DOMAIN_RTC8M to ESP_PD_DOMAIN_FOSC 2022-12-27 21:31:21 +08:00
laokaiyao
ec812c1370 adc: add ADC target test for esp32c6 2022-12-23 14:05:56 +08:00
laokaiyao
5333ac81bf adc: support ADC on esp32c6 (driver/test/example) 2022-12-23 11:24:06 +08:00
laokaiyao
e27f3e3128 adc: support ADC on esp32c6 (hal) 2022-12-23 11:24:06 +08:00
Armando
6aa7091199 adc: added a soc macro indicating digital controller supported unit 2022-12-16 02:06:03 +00:00
Song Ruo Jing
244d3caa97 i2s: Fix esp32c6 get I2S_CLK_SRC_PLL_160M clock frequency value wrong issue 2022-12-13 19:18:34 +08:00
morris
62f1cbca2c gpio: support glitch filter 2022-12-09 11:33:42 +08:00
Song Ruo Jing
9402ab427b ledc: Add basic support for esp32c6 2022-12-07 18:40:50 +08:00
Jiang Jiang Jian
236a5301a0 Merge branch 'bugfix/fix_bt_sleep_hangs_when_enable_light_sleep' into 'master'
bt: fix bt sleep flow hangs in btdm_sleep_clock_sync

Closes BT-2990

See merge request espressif/esp-idf!21311
2022-11-30 21:55:40 +08:00
Konstantin Kondrashov
0786539047 Merge branch 'feature/remove_efuse_dependency' into 'master'
esp_hw_support: Removes efuse dependency

Closes IDF-4713

See merge request espressif/esp-idf!21212
2022-11-29 18:12:26 +08:00
jingli
cf244a14f0 bt: fix bt sleep flow hangs in btdm_sleep_clock_sync
Bluetooth low power related logic and regs have separate power domain from MAC and BB,
and do not power down during light sleep. If reset when power up MAC and BB in sleep
flow, it may destroy the state of bt low power part.
2022-11-29 14:28:32 +08:00
KonstantinKondrashov
741e89cbaa esp_hw_support: Removes efuse dependency 2022-11-25 19:27:33 +08:00
Armando (Dou Yiwen)
2ad7b85a9e Merge branch 'bugfix/improve_ext_virtual_memory_allocation_in_2nd_btld' into 'master'
bootloader: improve irom & drom mapping way in 2nd bootloader on esp32c6

Closes IDF-6331

See merge request espressif/esp-idf!21173
2022-11-25 15:24:06 +08:00
Armando
9d9d1e4bf3 soc: remove unused macro in ext_mem_defs.h
ESP_CACHE_TEMP_ADDR is not used in IDF
2022-11-24 10:29:35 +08:00
Konstantin Kondrashov
b4580a1980 Merge branch 'feature/esp_timer_add_ll_for_rc_fast_clk' into 'master'
hal: Adds hal/ll func for SYSTIMER to select clock source: XTAL or RC_FAST_CLK

Closes IDF-5323

See merge request espressif/esp-idf!21136
2022-11-23 15:05:48 +08:00
KonstantinKondrashov
63f852adc8 hal: Adds hal/ll func for SYSTIMER to select clock source: XTAL or RC_FAST_CLK 2022-11-22 20:29:19 +08:00
Armando
c3682bf0a4 soc: update iram/dram addr range in ext_mem_defs.h
IRAM0/DRAM0 addr range update, on s3, c3, c2, h4, c6:

IRAM0_ADDRESS_LOW ~ IRAM0_ADDRESS_HIGH
DRAM0_ADDRESS_LOW ~ DRAM0_ADDRESS_HIGH

now are for the real IRAM0 and DRAM0
2022-11-22 18:53:50 +08:00
Omar Chebib
cd21058097 C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT
Closes https://github.com/espressif/esp-idf/issues/9938
2022-11-21 16:18:08 +08:00
morris
f69a53f56d Merge branch 'feature/twai_bringup_esp32c6' into 'master'
TWAI: initial driver bring up on esp32c6 (TWAI0 only)

Closes IDF-5313 and IDF-5940

See merge request espressif/esp-idf!20735
2022-11-07 18:00:05 +08:00
morris
a25123f703 twai: bringup on esp32c6 2022-11-04 17:40:29 +08:00
morris
6828c011d9 twai: define clock source name
twai clock source is target-specific,
this commit is to define them in the soc layer
2022-11-04 17:40:29 +08:00
laokaiyao
fa9b022f68 i2s: support 4 line pdm rx on esp32s3 2022-11-04 15:46:34 +08:00
laokaiyao
9b8a78153f i2s: refactor soc caps 2022-11-04 12:31:12 +08:00
Song Ruo Jing
be0fdfa176 soc: Add a soc cap, SOC_CLK_RC_FAST_D256_SUPPORTED, for whether the target has the RC_FAST_D256 clock 2022-11-01 11:23:26 +08:00
Jiang Jiang Jian
f191b2f034 Merge branch 'bugfix/fix_xtal_related_rtc_params_for_esp32' into 'master'
esp32/rtc: fix xtal unstable in some cases when sleep

Closes ESPCS-869

See merge request espressif/esp-idf!20425
2022-10-26 15:57:48 +08:00
Song Ruo Jing
6d24e8bcf4 gpio: Add support for esp32c6 2022-10-18 12:38:36 +08:00
Jiang Jiang Jian
e08e2f071f Merge branch 'bugfix/fix_part_of_modem_not_reset_when_power_on' into 'master'
Coexistence: fix part of modem module not reset when power up

See merge request espressif/esp-idf!19849
2022-10-18 11:13:10 +08:00
jingli
b903a2253b esp_hw_support/sleep: fix current leakage when hold digital io during deep sleep 2022-10-11 12:11:28 +08:00
jingli
0a44d09f4f esp32/rtc: fix xtal unstable in some cases when sleep
1. add xtal buf wait to fix high temperature restart issue
2. add min sleep value to fix xtal stop due to too short sleep time issue
2022-10-09 19:58:58 +08:00
jingli
42699637ec soc: remove unused DR_REG_DPORT_END macro for c2/c3/s2/s3 2022-09-22 11:45:20 +08:00
jingli
cce2af9193 wifi/bt: fix part of modem module not reset when power up 2022-09-22 11:45:20 +08:00
jingli
05a2fbe810 esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 03:03:25 +00:00
wangjialiang
6e79d05814 ble_mesh: docs: Remove BLE Mesh related reference for C2 2022-09-16 19:39:51 +08:00
Kevin (Lao Kaiyao)
04b4bc6cb5 Merge branch 'feature/support_i2s_on_esp32c6' into 'master'
i2s: support i2s on esp32c6

See merge request espressif/esp-idf!19989
2022-09-16 12:31:24 +08:00
laokaiyao
7197e987cb i2s: add XTAL clock source 2022-09-15 19:32:06 +08:00
Omar Chebib
53c7dd4efc WDT: implement interrupt wdt and task wdt for ESP32-C2
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
2022-09-15 14:37:59 +08:00
Wan Lei
f7748beb4d Merge branch 'bugfix/spi2_add_device_cs_more_than_3' into 'master'
spi_master: fix error when use `spi_bus_add_device` add more than 3 devices

Closes IDFGH-7288

See merge request espressif/esp-idf!19798
2022-09-14 10:33:37 +08:00
Sudeep Mohanty
4fde033a5f ulp: Added support for RTC I2C driver for ULP RISC-V on esp32s2 and esp32s3
This commit adds support for using the RTC I2C peripheral on the ULP
RISC-V core for esp32s2 and esp32s3. It also adds an example to demonstrate the
usage of the RTC I2C peripheral.

This commit also modifies the rtc_i2c register structure files to enable
the use of bitfields in the ULP RISC-V RTC I2C driver.
2022-09-05 10:21:43 +02:00
wanlei
96aa2792f8 spi_master:fix error when use spi_bus_add_device more than 3 device
update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
2022-09-05 12:10:22 +08:00
songruojing
9d515185d0 esp32c6: clean up existing soc files and header file inclusion in IDF to be compatible with the new chip 2022-09-01 12:28:06 +08:00
Song Ruo Jing
6a60ecf780 soc_caps: Introduce SOC_LEDC_SUPPORTED and SOC_I2C_SUPPORTED caps to IDF
Wrap the ledc, i2c source files with the new caps in CMakeLists and linker.lf.
This could avoid potential source file not found warning during linking time.
2022-08-31 20:43:22 +08:00
Michael (XIAO Xufeng)
746f4b814c uart: move frequency of clock sources out of HAL 2022-08-15 18:55:43 +00:00
Geng Yuchao
0a1d8c1e09 Fix soc caps define for all chips 2022-08-08 20:50:28 +08:00
jingli
ee3423834e kconfig: refactor xtal freq kconfig to common configuration item 2022-08-05 19:12:29 +08:00
Wan Lei
1265a2db9d Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master'
Fix check_public_headers violations for soc component

Closes IDF-5397

See merge request espressif/esp-idf!19158
2022-08-01 10:14:04 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wanlei
bb5a95f1aa soc: fix register header files not self-contain 2022-07-29 11:18:06 +08:00
wuzhenghui
21a4eda4d4 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-07-29 10:51:47 +08:00
morris
d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
morris
c4e84751a5 driver: fix public header exceptions for driver 2022-07-22 00:12:36 +00:00
morris
741b031e83 soc: added SOC_TOUCH_SENSE_SUPPORTED macro 2022-07-22 00:12:36 +00:00
laokaiyao
edee3ee3cd i2s: add slot sequence table
Closes: https://github.com/espressif/esp-idf/issues/9208

When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
2022-07-21 15:52:39 +08:00
laokaiyao
90866e99fb i2s: add basic examples for STD/TDM/PDM mode 2022-07-21 15:52:39 +08:00
morris
4154eaec93 sdm: clean up soc/hal/ll code 2022-07-20 14:59:50 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master'
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
Jiang Jiang Jian
3630713e5f Merge branch 'docs/esp32c2_sys_feature_api_guides' into 'master'
docs: update system API-guides for ESP32-C2

Closes IDF-4202, IDF-4213, and IDF-4222

See merge request espressif/esp-idf!18979
2022-07-12 10:59:12 +08:00
Marius Vikhammer
d62421619c docs: update system API-guides for ESP32-C2 2022-07-12 09:32:43 +08:00
Song Ruo Jing
ea97cc93ea Merge branch 'feature/c2_systimer_26mhz' into 'master'
esp32c2: 26 MHz XTAL support: Kconfig option, systimer support

Closes IDF-5412 and IDF-5413

See merge request espressif/esp-idf!18835
2022-07-11 16:17:25 +08:00
songruojing
b3d8db3ae2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal
Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Jiang Jiang Jian
a7bf3af687 Merge branch 'bugfix/reset_ble_hw_on_inititalization' into 'master'
component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3

Closes BT-2402

See merge request espressif/esp-idf!18831
2022-07-08 16:21:41 +08:00
Michael (XIAO Xufeng)
a58362a429 Merge branch 'feature/efuse_rev_major_minor' into 'master'
efuse: Adds major and minor versions

See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
wangmengyang
f86efb2bc2 fix licence copyright for header file syscon_reg.h on ESP32C3 and ESP32S3 2022-07-06 16:24:03 +08:00
wangmengyang
1d55f12c2d component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
2022-07-06 16:23:48 +08:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Jakob Hasse
f8b5ed5d6c refactor (soc, esp_rom)!: removed target-specific ROM dependencies 2022-07-05 13:57:58 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00
Mahavir Jain
0a12eab32e
esp_system: move MEMPROT related configuration to soc capability header
Closes IDF-4506
2022-06-23 10:29:42 +05:30
muhaidong
96f86e0bb4 esp_wifi: esp32c2 does not support wifi mesh 2022-06-21 16:48:52 +08:00
muhaidong
b48b9beace esp_wifi: esp32c2 does not support csi. 2022-06-20 21:47:51 +08:00
morris
865937fba3 Merge branch 'bugfix/fix_esp32c2_dose_not_support_wapi' into 'master'
esp_wifi: esp32c2 does not support wapi

Closes IDF-4216

See merge request espressif/esp-idf!18573
2022-06-20 21:31:54 +08:00
muhaidong
2ccce0ca41 esp_wifi: update comments of WI-FI CAPS in soc_caps.h 2022-06-20 19:43:16 +08:00
Martin Vychodil
692b9980b5 Merge branch 'feature/memprot_api_unified_s3_2' into 'master'
System/Security: Memprot API unified (ESP32S3)

See merge request espressif/esp-idf!16169
2022-06-20 17:34:22 +08:00
muhaidong
6ca2804107 esp_wifi: esp32c2 does not support wapi. 2022-06-20 11:42:12 +08:00
Martin Vychodil
339fcbf14d System/Security: Memprot API unified (ESP32S3)
Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
Ivan Grokhotkov
3973db7664
soc: make register access macros compatible with C++20
In C++20, using the result of an assignment to a 'volatile' value is
deprecated.

Breaking change: register "setter" or modification macros can no
longer be used as expressions.

Closes https://github.com/espressif/esp-idf/issues/9170
2022-06-17 18:09:22 +02:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
laokaiyao
28b8fc6a7e i2s: update documents for driver-NG 2022-06-15 10:30:04 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master'
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Michael (XIAO Xufeng)
7b8e5888ca Merge branch 'refactor/add_clk_tree_ll' into 'master'
clk_tree: Stage3 - HAL for clock subsystem

Closes IDF-4334

See merge request espressif/esp-idf!18270
2022-06-14 17:16:29 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Konstantin Kondrashov
7d942e0a5d Merge branch 'feature/efuse_rst_is_treated_as_poweron_rst' into 'master'
reset_reasons: EFUSE_RST is treated as POWERON_RST + checks errors of eFuse BLOCK0

Closes IDF-3702

See merge request espressif/esp-idf!14742
2022-06-13 21:26:13 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
KonstantinKondrashov
46f0313d6b reset_reasons: EFUSE_RST is treated as POWERON_RST
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
2022-06-09 17:49:03 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
Geng Yuchao
8012af37d1 Fix soc caps for BT 2022-06-03 21:45:40 +08:00
Konstantin Kondrashov
b824f68b35 Merge branch 'feature/move_dport_workaround_to_g0' into 'master'
dport_access: Move DPORT workaround to G0

Closes IDF-2177

See merge request espressif/esp-idf!17961
2022-06-01 12:11:12 +08:00
KonstantinKondrashov
c5a4ab39a7 soc: Fix description of efuse fail bits 2022-05-31 11:21:24 +00:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00