mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'bugfix/spi2_add_device_cs_more_than_3' into 'master'
spi_master: fix error when use `spi_bus_add_device` add more than 3 devices Closes IDFGH-7288 See merge request espressif/esp-idf!19798
This commit is contained in:
Wan Lei
commit
f7748beb4d
@ -17,20 +17,19 @@
|
||||
#include "freertos/semphr.h"
|
||||
#include "freertos/queue.h"
|
||||
#include "unity.h"
|
||||
#include "sdkconfig.h"
|
||||
#include "driver/spi_master.h"
|
||||
#include "driver/spi_slave.h"
|
||||
#include "esp_heap_caps.h"
|
||||
#include "esp_log.h"
|
||||
#include "soc/spi_periph.h"
|
||||
#include "test_utils.h"
|
||||
#include "test/test_common_spi.h"
|
||||
#include "driver/gpio.h"
|
||||
#include "soc/gpio_periph.h"
|
||||
#include "sdkconfig.h"
|
||||
#include "esp_private/cache_utils.h"
|
||||
#include "soc/soc_memory_layout.h"
|
||||
#include "esp_private/cache_utils.h"
|
||||
#include "esp_private/spi_common_internal.h"
|
||||
#include "esp_private/esp_clk.h"
|
||||
#include "esp_heap_caps.h"
|
||||
#include "esp_log.h"
|
||||
#include "test_utils.h"
|
||||
#include "test/test_common_spi.h"
|
||||
|
||||
|
||||
const static char TAG[] = "test_spi";
|
||||
@ -1458,3 +1457,119 @@ TEST_CASE("spi_speed", "[spi]")
|
||||
|
||||
#endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
|
||||
#endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
|
||||
|
||||
//****************************************spi master add device test************************************//
|
||||
//add dummy devices first
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#define DUMMY_CS_PINS() {25, 26, 27}
|
||||
#else
|
||||
#define DUMMY_CS_PINS() {0, 1, 4, 5, 8, 9}
|
||||
#endif //CONFIG_IDF_TARGET_ESP32
|
||||
|
||||
#define CS_REAL_DEV SPI2_IOMUX_PIN_NUM_CS
|
||||
#define TEST_TRANS_LEN 48
|
||||
|
||||
void test_add_device_master(void)
|
||||
{
|
||||
spi_device_handle_t devs[SOC_SPI_MAX_CS_NUM] = {};
|
||||
uint8_t cs_pins[SOC_SPI_MAX_CS_NUM] = DUMMY_CS_PINS();
|
||||
|
||||
uint8_t master_sendbuf[TEST_TRANS_LEN] = {0};
|
||||
uint8_t master_recvbuf[TEST_TRANS_LEN] = {0};
|
||||
uint8_t master_expect[TEST_TRANS_LEN] = {0};
|
||||
|
||||
spi_bus_config_t bus_cfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||
ESP_ERROR_CHECK(spi_bus_initialize(TEST_SPI_HOST, &bus_cfg, SPI_DMA_CH_AUTO));
|
||||
|
||||
spi_device_interface_config_t dev_cfg = {
|
||||
.clock_speed_hz = 1 * 1000 * 1000,
|
||||
.queue_size = 3,
|
||||
};
|
||||
|
||||
for (uint8_t i = 0; i < SOC_SPI_MAX_CS_NUM; i++) {
|
||||
dev_cfg.spics_io_num = cs_pins[i];
|
||||
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &dev_cfg, &devs[i]));
|
||||
}
|
||||
|
||||
spi_transaction_t trans = {};
|
||||
trans.length = sizeof(master_sendbuf) * 8;
|
||||
trans.tx_buffer = master_sendbuf;
|
||||
trans.rx_buffer = master_recvbuf;
|
||||
|
||||
for (uint8_t i = 0; i < SOC_SPI_MAX_CS_NUM; i++) {
|
||||
//1. add max dummy devices
|
||||
//2. replace devs[i] as a real device, than start a transaction
|
||||
//3. free devs[i] after transaction to release the real CS pin for using again by another dev,
|
||||
//So it will loop to check every gpio_sigal one by one use one physical pin
|
||||
spi_bus_remove_device(devs[i]);
|
||||
dev_cfg.spics_io_num = CS_REAL_DEV;
|
||||
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &dev_cfg, &devs[i]));
|
||||
|
||||
memset(master_recvbuf, 0, sizeof(master_recvbuf));
|
||||
get_tx_buffer(21, master_sendbuf, master_expect, TEST_TRANS_LEN);
|
||||
|
||||
unity_send_signal("Master ready");
|
||||
unity_wait_for_signal("Slave ready");
|
||||
spi_device_transmit(devs[i], &trans);
|
||||
|
||||
ESP_LOGI("Master", "dev %d communication:", i);
|
||||
ESP_LOG_BUFFER_HEX("Tx", master_sendbuf, sizeof(master_sendbuf));
|
||||
// ESP_LOG_BUFFER_HEX("Rx", master_recvbuf, sizeof(master_recvbuf));
|
||||
spitest_cmp_or_dump(master_expect, master_recvbuf, TEST_TRANS_LEN);
|
||||
|
||||
//swap self as a dummy device to free real cs line
|
||||
spi_bus_remove_device(devs[i]);
|
||||
dev_cfg.spics_io_num = cs_pins[i];
|
||||
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &dev_cfg, &devs[i]));
|
||||
}
|
||||
|
||||
for (uint8_t i = 0; i < SOC_SPI_MAX_CS_NUM; i++) {
|
||||
spi_bus_remove_device(devs[i]);
|
||||
}
|
||||
spi_bus_free(TEST_SPI_HOST);
|
||||
}
|
||||
|
||||
void test_add_device_slave(void)
|
||||
{
|
||||
uint8_t slave_sendbuf[TEST_TRANS_LEN] = {0};
|
||||
uint8_t slave_recvbuf[TEST_TRANS_LEN] = {0};
|
||||
uint8_t slave_expect[TEST_TRANS_LEN] = {0};
|
||||
|
||||
spi_bus_config_t bus_cfg = SPI_BUS_TEST_DEFAULT_CONFIG();
|
||||
spi_slave_interface_config_t slvcfg = {
|
||||
.spics_io_num = CS_REAL_DEV,
|
||||
.queue_size = 3,
|
||||
};
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
//now esp32 runners use SPI3 pin group to test gpio matrix together on CI.
|
||||
bus_cfg.miso_io_num = SPI3_IOMUX_PIN_NUM_MISO;
|
||||
bus_cfg.mosi_io_num = SPI3_IOMUX_PIN_NUM_MOSI;
|
||||
bus_cfg.sclk_io_num = SPI3_IOMUX_PIN_NUM_CLK;
|
||||
slvcfg.spics_io_num = SPI3_IOMUX_PIN_NUM_CS;
|
||||
#endif
|
||||
TEST_ESP_OK(spi_slave_initialize(TEST_SPI_HOST, &bus_cfg, &slvcfg, SPI_DMA_CH_AUTO));
|
||||
|
||||
spi_slave_transaction_t slave_trans = {};
|
||||
slave_trans.length = sizeof(slave_sendbuf) * 8;
|
||||
slave_trans.tx_buffer = slave_sendbuf;
|
||||
slave_trans.rx_buffer = slave_recvbuf;
|
||||
|
||||
for (uint8_t i = 0; i < SOC_SPI_MAX_CS_NUM; i++) {
|
||||
memset(slave_recvbuf, 0, sizeof(slave_recvbuf));
|
||||
get_tx_buffer(21, slave_expect, slave_sendbuf, TEST_TRANS_LEN);
|
||||
|
||||
unity_wait_for_signal("Master ready");
|
||||
unity_send_signal("Slave ready");
|
||||
spi_slave_transmit(TEST_SPI_HOST, &slave_trans, portMAX_DELAY);
|
||||
|
||||
ESP_LOGI("Slave", "dev %d communication:", i);
|
||||
ESP_LOG_BUFFER_HEX("Tx", slave_sendbuf, sizeof(slave_sendbuf));
|
||||
// ESP_LOG_BUFFER_HEX("Rx", slave_recvbuf, sizeof(slave_recvbuf));
|
||||
spitest_cmp_or_dump(slave_expect, slave_recvbuf, TEST_TRANS_LEN);
|
||||
}
|
||||
|
||||
spi_slave_free(TEST_SPI_HOST);
|
||||
spi_bus_free(TEST_SPI_HOST);
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("SPI_Master:Test multiple devices", "[spi_ms][test_env=Example_SPI_Multi_device]", test_add_device_master, test_add_device_slave);
|
||||
|
||||
@ -535,6 +535,10 @@ config SOC_SPI_DMA_CHAN_NUM
|
||||
int
|
||||
default 2
|
||||
|
||||
config SOC_SPI_MAX_CS_NUM
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_SPI_MAXIMUM_BUFFER_SIZE
|
||||
int
|
||||
default 64
|
||||
|
||||
@ -268,6 +268,7 @@
|
||||
#define SOC_SPI_DMA_CHAN_NUM 2
|
||||
|
||||
#define SOC_SPI_PERIPH_CS_NUM(i) 3
|
||||
#define SOC_SPI_MAX_CS_NUM 3
|
||||
|
||||
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
|
||||
#define SOC_SPI_MAX_PRE_DIVIDER 8192
|
||||
|
||||
@ -335,6 +335,10 @@ config SOC_SPI_PERIPH_NUM
|
||||
int
|
||||
default 2
|
||||
|
||||
config SOC_SPI_MAX_CS_NUM
|
||||
int
|
||||
default 6
|
||||
|
||||
config SOC_SPI_MAXIMUM_BUFFER_SIZE
|
||||
int
|
||||
default 64
|
||||
|
||||
@ -179,6 +179,7 @@
|
||||
/*-------------------------- SPI CAPS ----------------------------------------*/
|
||||
#define SOC_SPI_PERIPH_NUM 2
|
||||
#define SOC_SPI_PERIPH_CS_NUM(i) 6
|
||||
#define SOC_SPI_MAX_CS_NUM 6
|
||||
|
||||
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
|
||||
|
||||
|
||||
@ -46,7 +46,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
|
||||
.spiq_in = FSPIQ_IN_IDX,
|
||||
.spiwp_in = FSPIWP_IN_IDX,
|
||||
.spihd_in = FSPIHD_IN_IDX,
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX},
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
|
||||
.spics_in = FSPICS0_IN_IDX,
|
||||
.spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
|
||||
.spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,
|
||||
|
||||
@ -539,6 +539,10 @@ config SOC_SPI_PERIPH_NUM
|
||||
int
|
||||
default 2
|
||||
|
||||
config SOC_SPI_MAX_CS_NUM
|
||||
int
|
||||
default 6
|
||||
|
||||
config SOC_SPI_MAXIMUM_BUFFER_SIZE
|
||||
int
|
||||
default 64
|
||||
|
||||
@ -260,6 +260,7 @@
|
||||
/*-------------------------- SPI CAPS ----------------------------------------*/
|
||||
#define SOC_SPI_PERIPH_NUM 2
|
||||
#define SOC_SPI_PERIPH_CS_NUM(i) 6
|
||||
#define SOC_SPI_MAX_CS_NUM 6
|
||||
|
||||
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "soc/spi_periph.h"
|
||||
#include "stddef.h"
|
||||
@ -54,7 +46,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
|
||||
.spiq_in = FSPIQ_IN_IDX,
|
||||
.spiwp_in = FSPIWP_IN_IDX,
|
||||
.spihd_in = FSPIHD_IN_IDX,
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX},
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
|
||||
.spics_in = FSPICS0_IN_IDX,
|
||||
.spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
|
||||
.spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,
|
||||
|
||||
@ -511,6 +511,10 @@ config SOC_SPI_PERIPH_NUM
|
||||
int
|
||||
default 2
|
||||
|
||||
config SOC_SPI_MAX_CS_NUM
|
||||
int
|
||||
default 6
|
||||
|
||||
config SOC_SPI_MAXIMUM_BUFFER_SIZE
|
||||
int
|
||||
default 64
|
||||
|
||||
@ -263,6 +263,7 @@
|
||||
/*-------------------------- SPI CAPS ----------------------------------------*/
|
||||
#define SOC_SPI_PERIPH_NUM 2
|
||||
#define SOC_SPI_PERIPH_CS_NUM(i) 6
|
||||
#define SOC_SPI_MAX_CS_NUM 6
|
||||
|
||||
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
|
||||
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "soc/spi_periph.h"
|
||||
#include "stddef.h"
|
||||
@ -54,7 +46,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
|
||||
.spiq_in = FSPIQ_IN_IDX,
|
||||
.spiwp_in = FSPIWP_IN_IDX,
|
||||
.spihd_in = FSPIHD_IN_IDX,
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX},
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
|
||||
.spics_in = FSPICS0_IN_IDX,
|
||||
.spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
|
||||
.spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,
|
||||
|
||||
@ -567,6 +567,10 @@ config SOC_SPI_DMA_CHAN_NUM
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_SPI_MAX_CS_NUM
|
||||
int
|
||||
default 6
|
||||
|
||||
config SOC_SPI_MAXIMUM_BUFFER_SIZE
|
||||
int
|
||||
default 72
|
||||
|
||||
@ -253,6 +253,7 @@
|
||||
#define SOC_SPI_PERIPH_NUM 3
|
||||
#define SOC_SPI_DMA_CHAN_NUM 3
|
||||
#define SOC_SPI_PERIPH_CS_NUM(i) (((i)==0)? 2: (((i)==1)? 6: 3))
|
||||
#define SOC_SPI_MAX_CS_NUM 6
|
||||
|
||||
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 72
|
||||
#define SOC_SPI_MAX_PRE_DIVIDER 8192
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "soc/spi_periph.h"
|
||||
#include "stddef.h"
|
||||
@ -62,7 +54,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
|
||||
.spid5_in = FSPIIO5_IN_IDX,
|
||||
.spid6_in = FSPIIO6_IN_IDX,
|
||||
.spid7_in = FSPIIO7_IN_IDX,
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX},
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
|
||||
.spics_in = FSPICS0_IN_IDX,
|
||||
.spiclk_iomux_pin = FSPI_IOMUX_PIN_NUM_CLK,
|
||||
.spid_iomux_pin = FSPI_IOMUX_PIN_NUM_MOSI,
|
||||
|
||||
@ -647,6 +647,10 @@ config SOC_SPI_PERIPH_NUM
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_SPI_MAX_CS_NUM
|
||||
int
|
||||
default 6
|
||||
|
||||
config SOC_SPI_MAXIMUM_BUFFER_SIZE
|
||||
int
|
||||
default 64
|
||||
|
||||
@ -266,7 +266,8 @@
|
||||
|
||||
/*-------------------------- SPI CAPS ----------------------------------------*/
|
||||
#define SOC_SPI_PERIPH_NUM 3
|
||||
#define SOC_SPI_PERIPH_CS_NUM(i) 3
|
||||
#define SOC_SPI_PERIPH_CS_NUM(i) (((i)==0)? 2: (((i)==1)? 6: 3))
|
||||
#define SOC_SPI_MAX_CS_NUM 6
|
||||
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
|
||||
#define SOC_SPI_SUPPORT_DDRCLK 1
|
||||
#define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS 1
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "soc/spi_periph.h"
|
||||
#include "stddef.h"
|
||||
@ -62,7 +54,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
|
||||
.spid5_in = FSPIIO5_IN_IDX,
|
||||
.spid6_in = FSPIIO6_IN_IDX,
|
||||
.spid7_in = FSPIIO7_IN_IDX,
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX},
|
||||
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
|
||||
.spics_in = FSPICS0_IN_IDX,
|
||||
.spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
|
||||
.spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,
|
||||
|
||||
@ -60,7 +60,7 @@ typedef struct {
|
||||
const uint8_t spid6_in;
|
||||
const uint8_t spid7_in;
|
||||
#endif // SOC_SPI_SUPPORT_OCT
|
||||
const uint8_t spics_out[3]; // /CS GPIO output mux signals
|
||||
const uint8_t spics_out[SOC_SPI_MAX_CS_NUM]; // /CS GPIO output mux signals
|
||||
const uint8_t spics_in;
|
||||
const uint8_t spidqs_out;
|
||||
const uint8_t spicd_out;
|
||||
|
||||
@ -1038,7 +1038,6 @@ components/soc/esp32c3/include/soc/usb_serial_jtag_struct.h
|
||||
components/soc/esp32c3/include/soc/wdev_reg.h
|
||||
components/soc/esp32c3/interrupts.c
|
||||
components/soc/esp32c3/ledc_periph.c
|
||||
components/soc/esp32c3/spi_periph.c
|
||||
components/soc/esp32c3/uart_periph.c
|
||||
components/soc/esp32h2/i2c_periph.c
|
||||
components/soc/esp32h2/include/soc/apb_ctrl_reg.h
|
||||
@ -1076,7 +1075,6 @@ components/soc/esp32h2/include/soc/usb_serial_jtag_reg.h
|
||||
components/soc/esp32h2/include/soc/usb_serial_jtag_struct.h
|
||||
components/soc/esp32h2/include/soc/wdev_reg.h
|
||||
components/soc/esp32h2/ledc_periph.c
|
||||
components/soc/esp32h2/spi_periph.c
|
||||
components/soc/esp32h2/uart_periph.c
|
||||
components/soc/esp32s2/adc_periph.c
|
||||
components/soc/esp32s2/dac_periph.c
|
||||
@ -1132,7 +1130,6 @@ components/soc/esp32s2/include/soc/usb_wrap_struct.h
|
||||
components/soc/esp32s2/include/soc/usbh_struct.h
|
||||
components/soc/esp32s2/include/soc/wdev_reg.h
|
||||
components/soc/esp32s2/ledc_periph.c
|
||||
components/soc/esp32s2/spi_periph.c
|
||||
components/soc/esp32s2/uart_periph.c
|
||||
components/soc/esp32s2/usb_periph.c
|
||||
components/soc/esp32s3/dedic_gpio_periph.c
|
||||
@ -1216,7 +1213,6 @@ components/soc/esp32s3/include/soc/wdev_reg.h
|
||||
components/soc/esp32s3/ledc_periph.c
|
||||
components/soc/esp32s3/sdio_slave_periph.c
|
||||
components/soc/esp32s3/sdmmc_periph.c
|
||||
components/soc/esp32s3/spi_periph.c
|
||||
components/soc/esp32s3/uart_periph.c
|
||||
components/soc/esp32s3/usb_periph.c
|
||||
components/soc/include/soc/dac_periph.h
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user