morris
ba364d486f
Merge branch 'feat/ci_check_ll_rw_register_half_word' into 'master'
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feat(ci): check if the LL function read write the register by half-world
See merge request espressif/esp-idf!31501
2024-06-18 20:38:15 +08:00
morris
4f03604b2e
fix(hal): functions that may generate invalid load/store byte/half-word instructions
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because the APB regsiters can't behave correctly on these instructions
2024-06-18 14:58:41 +08:00
morris
0365cb0bc7
change(wdt): create wdt_periph.c in soc component
2024-06-18 09:59:06 +08:00
wuzhenghui
cca222948a
fix(esp_driver_gpio): manage lp_io module clock by driver
...
Closes https://github.com/espressif/esp-idf/issues/13683
2024-06-05 17:56:37 +08:00
Song Ruo Jing
dca7c286d0
feat(uart): support uart module sleep retention on c6/h2/p4
2024-06-03 12:40:43 +08:00
Mahavir Jain
019165b950
Merge branch 'feature/esp32p4_apm_api' into 'master'
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feat: add esp32p4 APM HAL/LL API
Closes IDF-9651
See merge request espressif/esp-idf!30251
2024-05-30 14:08:45 +08:00
Sachin Billore
31d86175da
feat: add esp32p4 APM HAL/LL API
2024-05-29 21:37:49 +05:30
wuzhenghui
a68668c392
change(esp_hw_support): do timergroup watchdogs retention by needs
2024-05-28 15:17:19 +08:00
morris
cb2898d033
change(rmt): rename sleep back to sleep retention
2024-05-23 11:02:07 +08:00
Konstantin Kondrashov
5ed066f3a8
feat(soc): Update efuse related soc_caps for c61 and c5 (MP/beta3)
2024-05-13 19:54:28 +08:00
morris
6a57c26469
Merge branch 'feature/esp32c5_mp_gpio_support' into 'master'
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esp32c5 mp gpio support
Closes IDF-9649
See merge request espressif/esp-idf!30474
2024-05-11 22:50:23 +08:00
gaoxu
cbef285352
feat(pm): add SOC_PM_SUPPORTED in soc caps
2024-05-11 10:51:17 +08:00
morris
e8e975112a
feat(rmt): support sleep retention
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by back up the registers
2024-04-24 22:10:42 +08:00
Song Ruo Jing
bf3067fa8a
fix(gpio_etm): allow one GPIO binds to multiple ETM tasks
2024-04-23 20:37:34 +08:00
wuzhenghui
309725fcd0
feat(esp_hw_support): support esp32p4 clock output
2024-04-17 15:09:49 +08:00
wuzhenghui
101f1abbf1
refactor(esp_hw_support): add hal layer for clock output feature
2024-04-17 14:25:29 +08:00
Konstantin Kondrashov
06c28f0ee9
feat(hal): Adds hal funcs for cpu.c
2024-04-11 13:07:04 +03:00
Cao Sen Miao
0985bfbe27
feat(i2c_master): Add lp_i2c support in i2c master driver
2024-04-03 11:39:04 +08:00
Mahavir Jain
999f3f69c0
Merge branch 'esp32p4/deterministic_ecdsa_support' into 'master'
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Add deterministic ECDSA support
Closes IDF-8507
See merge request espressif/esp-idf!29010
2024-04-01 16:45:14 +08:00
xiehang
f3c5047638
feat(extconn): Supports external WiFi connections for ESP32p4 and other espressf chips
2024-04-01 11:44:52 +08:00
xiehang
9d7bd6a8dd
change(esp_phy): Add SOC_PHY_SUPPORTED to control phy mode
2024-04-01 11:36:55 +08:00
Li Shuai
c07be48edb
change(esp_hw_support): add adc retention module and it is dependencies on the clock modem
2024-03-30 11:51:52 +08:00
Li Shuai
59115cd2d1
change(esp_hw_support): some system peripherals to use a retention module number
2024-03-29 15:27:08 +08:00
Li Shuai
080d09387c
change(esp_hw_support): modify the style of module argument from bitmap to number
2024-03-29 15:22:52 +08:00
harshal.patil
272633bde1
fix(mbedtls/ecdsa): Fix dependant peripheral's enable and reset
2024-03-29 12:40:13 +05:30
wuzhenghui
4a64d2fe2c
change(hal): control PAU bus clock by hal layer
2024-03-29 00:36:46 +08:00
wanlei
1e6c61daa6
spi_master: sct mode support set line mode, transaction interval time
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support line mode 1-2-4-8 depend on targets.
fix sct mode dma descriptor counter compute issue.
add conf_bits_len setting API to control interval time.
2024-03-20 15:42:03 +08:00
Armando
b303e4b7a6
spi_master: new segmented-configure-transfer mode
2024-03-20 15:42:03 +08:00
laokaiyao
8de41350eb
feat(esp32c5mp): support to build g0 components
2024-03-14 15:09:22 +08:00
Wu Zheng Hui
5a682c3bbb
Merge branch 'feature/optimize_chips_active_power' into 'master'
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feat(system): Optimize the power consumption of esp32h2 and esp32c6 in the active state
Closes IDF-5658
See merge request espressif/esp-idf!27798
2024-03-14 12:08:33 +08:00
wuzhenghui
0fc97f0e84
feat(gpio): support LP_IO clock gating management
2024-03-13 11:56:14 +08:00
wuzhenghui
9e8e20227f
feat(system): disable RNG module clock by default for save power
2024-03-12 10:10:41 +08:00
Mahavir Jain
fd6c710b27
fix: cleanup memprot files for C6/H2/P4
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There is no separate permission control peripheral in C6/H2/P4.
Memory protection is achieved using built-in PMA/PMP and hence
removing permission control specific files.
2024-03-11 17:10:40 +05:30
wuzhenghui
85b246ac88
feat(system): gate the debug clock source by default for esp32c6 and esp32h2
2024-03-07 19:26:39 +08:00
Guillaume Souchere
0b9f01ac20
feat(soc): Add soc_caps macros for sleep support
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- modify console example to use the new SOC_LIGHT_SLEEP_SUPPORTED
and SOC_DEEP_SLEEP_SUPPORTED macros when registering sleep commands
- remove exclusion of esp32p4 in basic and advanced example in
.build-test-rules.yml
- replace exclusion of esp32p4 for deep and light sleep tests with newly introduced macro
- remove the temporary disable check for esp32p4 and uses the
SOC_LIGHT_SLEEP_SUPPORTED maccro instead.
2024-03-05 07:05:40 +01:00
Cao Sen Miao
2b2b3be98f
feat(temperature_sensor): Add new support for temperature sensor ETM on ESP32C6/H2
2024-03-01 18:52:39 +08:00
Song Ruo Jing
98d9f04b00
feat(gdma): add GDMA support for ESP32C5
2024-02-28 12:38:02 +08:00
C.S.M
2302dd5a91
Merge branch 'feature/i2c_sleep' into 'master'
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feat(i2c): Support i2c sleep retention on esp32c6/h2
Closes IDF-8458
See merge request espressif/esp-idf!28885
2024-02-24 09:58:35 +08:00
Lin Rui Hao
00df222cdf
Merge branch 'docs/rf_coexistence_api_guides_support_esp32c2' into 'master'
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Docs: RF coexistence api guides support esp32c2
Closes BT-3582
See merge request espressif/esp-idf!28780
2024-02-23 15:20:45 +08:00
Cao Sen Miao
cf521b60ea
feat(i2c): Support i2c sleep retention on esp32c6/h2
2024-02-23 11:28:14 +08:00
linruihao
1d34bb5e8a
fix(esp_coex): add support_coexistence soc_caps for esp32c2 and esp32h2
2024-02-21 16:38:46 +08:00
Marius Vikhammer
c0a2043562
fix(system): update reset reasons for C6 and H2
2024-02-20 12:27:09 +08:00
Song Ruo Jing
5276cd4f1d
refactor(uart): add support to be able to test LP_UART port
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Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
2024-02-07 14:37:48 +08:00
wuzhenghui
0c2f811ca8
feat(esp_hw_support): support gdma register context sleep retention
2024-02-02 11:21:40 +08:00
Song Ruo Jing
cf93777077
refactor(rtc): move soc/rtc.h from soc to esp_hw_support component
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Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
2024-01-25 19:15:33 +08:00
Wu Zheng Hui
55f04b3326
Merge branch 'feature/clean_up_retention_context_definitions' into 'master'
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refactor(esp_hw_support): move sleep retention context definition to soc target folder
Closes PM-10
See merge request espressif/esp-idf!26753
2024-01-24 20:24:02 +08:00
wuzhenghui
f3f12e973c
refactor(esp_hw_support): separate different chip system peripheral regs context defs to target folder
2024-01-23 13:30:01 +08:00
wuzhenghui
9b3dc69908
refactor(esp_hw_support): move regdma structure defination to soc components
2024-01-23 11:51:44 +08:00
Mahavir Jain
9ecd2fd7e3
fix(soc): change debug addr range to CPU subsystem range
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For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).
For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.
For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
2024-01-22 13:34:32 +08:00
Konstantin Kondrashov
261651fc19
Merge branch 'feature/efuse_update' into 'master'
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feat(efuse): Adds new efuses for H2 and C6 chips
See merge request espressif/esp-idf!27672
2024-01-20 03:10:44 +08:00
