Commit Graph

168 Commits

Author SHA1 Message Date
wuzhenghui
45a79bc135 update bootloader.ld rom_boot ram usage info 2022-08-09 20:28:04 +08:00
wuzhenghui
d8432af3ab update bootloader memory allocation 2022-08-09 20:02:46 +08:00
Alexey Lapshin
09289fe451 esp_system: Fix esp32c2/esp32c3/esp32h2 TLS size
The change fixes thread-local-storage size by removing .srodata section
from it. It initially was included in TLS section by mistake.
The issue was found when stack size increased after building applications
with GCC-11.1 compiler. Stack size became bigger because some new data
appeared in .srodata. See more details here:
adce62f53d
2022-07-01 15:19:21 +04:00
Ivan Grokhotkov
6e6b9ec5a6
bootloader, esp_system: increase static allocation space for esp32s3
The previously used splits between memory allocated for ROM code,
2nd stage bootloader and the app were somewhat safe and conservative.
This resulted in some space being unavailable for static allocation
in the app.

This commit increases the space available for static allocation to the
maximum possible amount.

1. Some of the ROM code static allocation is only used in UART/USB/SPI
   download modes. This region ("shared buffers") has been placed at
   the lower end of ROM memory area, to be reusable in flash boot
   mode. The 2nd stage bootloader linker script is modified to "pack"
   all sections exactly up to the end but with roughly 8K margin between
   startup stacks.
2. Instead of calculating the sections placement and hardcoding the
   addresses in the LD script again, rewrite it to calculate the
   start address of each memory region automatically based on the
   logic above.
3. Adjust the app memory layout (SRAM_IRAM_END) accordingly,
   increasing the space available for static allocation.

Overall these changes increase the space available for static
allocation by about 78kB.

The downside of these changes is that the 2nd stage bootloader .data
segment is now directly adjacent to the startup stack on the PRO CPU.
Previously, there was effectively about 78kB of extra stack space for
the PRO CPU, before the stack would run into the data segment.
2022-06-27 09:22:01 +05:30
Jakob Hasse
ee24264c75 feat (bootloader): added rng sampling
Set maximum RNG query frequency to save value known from tests
2022-01-03 16:24:41 +05:30
Ivan Grokhotkov
5bfd10113a bootloader: fix adding bootloader_components to EXTRA_COMPONENT_DIRS 2021-10-06 10:17:19 +02:00
Sachin Parekh
bf1dde7233 bootloader: Enable clock glitch detection
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
2021-09-02 12:25:12 +05:30
Wu Zheng Hui
fb7894382b Merge branch 'bugfix/fix_c3_bootloader_ld_addr_err' into 'master'
update c3 bootloader ld rom addr info

See merge request espressif/esp-idf!14168
2021-07-31 05:43:58 +00:00
SalimTerryLi
2347e68e6b
soc: move peripheral linker scripts out of target component 2021-07-22 12:55:01 +08:00
KonstantinKondrashov
4ccb5515ef fpga/bootloader: Fix LoadProhibited error when bootloader_fill_random() is not in iram_loader_seg 2021-07-16 10:50:06 +10:00
Angus Gratton
4fe4df8770 Merge branch 'feature/bootloader_pin_level_pr7089' into 'master'
bootloader: Add configurable pin level for factory reset (PR)

Closes IDFGH-5337

See merge request espressif/esp-idf!13956
2021-07-13 05:39:25 +00:00
Angus Gratton
6bbb58c8c2 bootloader: Small cleanup and docs for factory reset level config
- Add to docs & config descriptions
- Change to a "choice" to become self-documenting
- Keep the bootloader_common_check_long_hold_gpio() function for compatibility
2021-07-05 12:08:36 +08:00
chegewara
fb7234a13d bootloader: Add selectable level for factory reset pin
Closes https://github.com/espressif/esp-idf/pull/7089
2021-07-05 12:08:36 +08:00
Omar Chebib
a79acb413e bootloader: override the 2nd stage bootloader
Add the possibility to have user bootloader components. This is performed
from an application/project, by creating bootloader components. To do so,
it is required to create a `bootloader_component` directory containing
the custom modules to be compiled with the bootloader.

Thanks to this, two solutions are available to override the bootloader now:
- Using hooks within a user bootloader component
- Using a user defined `main` bootloader component to totally override the
  old implementation

Please check the two new examples in `examples/custom_bootloader`

* Closes https://github.com/espressif/esp-idf/issues/7043
2021-07-05 10:25:32 +08:00
Shu Chen
75bd02bd46 esp32h2: add some more fixes and TODOs 2021-07-01 20:36:39 +08:00
wuzhenghui
112372d598 update rom bootloader addr info 2021-07-01 19:53:50 +08:00
Shu Chen
2df4ddf998 esp32h2: fixes after rebase 2021-07-01 19:53:50 +08:00
Shu Chen
c0056813f2 esp32h2: add bootloader support 2021-07-01 19:53:11 +08:00
wuzhenghui
a59eb2d607 update c3 bootloader ld addr info 2021-06-28 10:51:06 +08:00
Konstantin Kondrashov
f339b3fc96 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key()
These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
2021-06-17 07:21:36 +08:00
Anton Maklakov
343cc5025b make build system: fix build for undefined _lock_* funcs 2021-06-07 12:53:45 +07:00
Jan Brudný
dffe49f305 bootloader: update copyright notice 2021-06-02 14:22:09 +02:00
Jakob Hasse
fc22e3c645 [system]: Made longjmp save for context switch
* Patched longjmp to be context-switch safe
  longjmp modifies the windowbase and windowstart
  registers, which isn't safe if a context switch
  occurs during the modification. After a context
  switch, windowstart and windowbase will be
  different, leading to a wrongly set windowstart
  bit due to longjmp writing it based on the
  windowbase before the context switch. This
  corrupts the registers at the next window
  overflow reaching that wrongly set bit.

  The solution is to disable interrupts during
  this code. It is only 6 instructions long,
  the impact shouldn't be significant.

  The fix is implemented as a wrapper which
  replaces the original first instructions of
  longjmp which are buggy. Then, it jumps back
  to execute the rest of the original longjmp
  function.

  Added a comparably reliable test to the
  test apps.
2021-04-23 15:55:31 +08:00
KonstantinKondrashov
fd867a11df bootloader: Suppress a Cmake warning - variables were not used by the project
Manually-specified variables were not used by the project: SECURE_BOOT_SIGNING_KEY
2021-04-13 11:28:13 +00:00
Marius Vikhammer
8ac74082f1 soc: add dummy bytes to ensure instr prefetch always valid
The CPU might prefetch instructions, which means it in some cases
will try to fetch instruction located after the last instruction in
flash.text.

Add dummy bytes to ensure fetching these wont result in an error,
 e.g. MMU exceptions
2021-03-29 13:50:03 +08:00
Angus Gratton
1581744c10 Merge branch 'feature/main_task_affinity_pr6627' into 'master'
Allow selection of different core for main task

Closes IDFGH-4828

See merge request espressif/esp-idf!12654
2021-03-22 06:46:24 +00:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot)
- ESP32 ECO3, ESP32-S2/C3/S3
2021-03-15 12:30:20 +00:00
0xFEEDC0DE64
6928db7670 Allow selection of different core for main task
Closes https://github.com/espressif/esp-idf/pull/6627
2021-03-09 10:13:28 +11:00
Angus Gratton
90ec0b0327 bootloader: Allow 'silent assert' config to work in bootloader
Requires adding the 'newlib' component to the bootloader project, for
platform_include header.
2021-03-03 10:26:57 +11:00
Renz Bagaporo
5e8799bbfe esp_common: move some headers 2021-02-24 12:16:37 +08:00
Angus Gratton
fe8a891de9 Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master'
bootloader/esp32c3: Support secure boot

Closes IDF-2115

See merge request espressif/esp-idf!11797
2021-01-21 08:42:49 +08:00
Li Shuai
6ef2a7def0 bootloader: fix external 32k xtal not found error 2021-01-20 16:51:20 +08:00
KonstantinKondrashov
98f726fa4b bootloader/esp32c3: Adds secure boot (not yet supported) 2021-01-19 20:51:13 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
morris
65aebef596 esp32c3: added 2nd bootloader project linker file 2020-12-11 11:44:01 +08:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
e82eac4354 cmake: Apply cmakelint fixes 2020-11-11 07:36:35 +00:00
Renz Bagaporo
6b0a5af73e soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
Renz Bagaporo
988be69466 esp_hw_support: create component 2020-10-28 07:21:29 +08:00
morris
9de6cba434 ci: add more build test for esp32-s3 2020-10-27 17:22:17 +08:00
Angus Gratton
c51dca618a Merge branch 'feature/update_key_name_of_secure_boot' into 'master'
bootloader: Secure_boot name replaced by secure_boot_v1 & secure_boot_v2

Closes ESPTOOL-55

See merge request espressif/esp-idf!10849
2020-10-22 13:41:13 +08:00
Angus Gratton
b35cb43caf bootloader_support: Add dummy ESP32-S3 RNG support 2020-10-16 18:48:26 +11:00
Angus Gratton
699742acc6 esp32s2: Support bootloader_random_enable() 2020-10-16 18:48:26 +11:00
KonstantinKondrashov
b19c4739c3 bootloader: Secure_boot name replaced by secure_boot_v1 & secure_boot_v2
- espefuse.py burn_key secure_boot is no longer used.
- Secure boot V1: espefuse.py burn_key secure_boot_v1 file.bin
- Secure boot V2: espefuse.py burn_key secure_boot_v2 file.bin
2020-10-15 16:48:23 +08:00
fuzhibo
6773df88f2 feature(rtc): rename i2c_xxx to regi2c_xxx 2020-10-14 21:15:24 +08:00
Michael (XIAO Xufeng)
953c046550 esp32s3/bootloader: extend IRAM usage to 0x6000
The bootloader cannot fit in the size of iram_loader_seg when built under -O0. Extend the IRAM size to fix this.
2020-10-09 17:50:17 +08:00
fuzhibo
247789bb2e rtc: support access internal i2c register 2020-09-27 12:12:17 +08:00
Ivan Grokhotkov
7a9d2c3fb4 bootloader: fix section placement of wdt_hal
Regression from moving HAL and LL code into the new "hal" component.
2020-09-03 18:14:17 +02:00