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437 Commits

Author SHA1 Message Date
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
David Čermák
9f957cbfe2 Merge branch 'bugfix/memprot_panic_print_const_correction' into 'master' 
panic: Fix minor const string correction on meprot panic print

See merge request espressif/esp-idf!14851
 2021-09-13 06:13:33 +00:00
Andrei Safronov
9159aa58d3 tests: refactoring of the gcc's inner functions, because clang doesn't support them 2021-09-10 19:51:27 +03:00
baohongde
006a10b050 components/doc: Update doc about high-level interrupt 
some bugfix.
 2021-09-09 20:40:09 +08:00
David Cermak
0ee4c235eb panic/memprot: Fix minor const string correction on panic print 2021-09-09 11:46:21 +02:00
baohongde
e2fb413329 components/bt: add config option to choose Bluetooth intterupt level. 2021-09-09 11:29:17 +08:00
baohongde
6d63fe06fa components/os: add config option to choose system check intterupt level. 2021-09-09 11:29:12 +08:00
baohongde
8a4696d25a components/os: Fix live lock int bt isr using ocd multicore debug 
components/os: Fix live lock in bt isr immediately
 2021-09-09 11:29:08 +08:00
baohongde
d1db2df316 components/bt: High level interrupt in bluetooth 
components/os: Move ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and ETS_DPORT_INUM to l5 interrupt

components/os: high level interrupt(5)

components/os: hli_api: meta queue: fix out of bounds access, check for overflow

components/os: hli: don't spill registers, instead save them to a separate region

Level 4 interrupt has a chance of preempting a window overflow or underflow exception.
Therefore it is not possible to use standard context save functions,
as the SP on entry to Level 4 interrupt may be invalid (e.g. in WindowUnderflow4).

Instead, mask window overflows and save the entire general purpose register file,
plus some of the special registers.
Then clear WindowStart, allowing the C handler to execute without spilling the old windows.
On exit from the interrupt handler, do everything in reverse.

components/bt: using high level interrupt in lc

components/os: Add DRAM_ATTR to avoid feature `Allow .bss segment placed in external memory`

components/bt: optimize code structure

components/os: Modify the BT assert process to adapt to coredump and HLI

components/os: Disable exception mode after saving special registers

To store some registers first, avoid stuck due to live lock after disabling exception mode

components/os: using dport instead of AHB in BT to fix live lock

components/bt: Fix hli queue send error

components/bt: Fix CI fail

# Conflicts:
#	components/bt/CMakeLists.txt
#	components/bt/component.mk
#	components/bt/controller/bt.c
#	components/bt/controller/lib
#	components/esp_common/src/int_wdt.c
#	components/esp_system/port/soc/esp32/dport_panic_highint_hdl.S
#	components/soc/esp32/include/soc/soc.h
 2021-09-09 11:29:06 +08:00
Cao Sen Miao
6c0aebe279 esp_flash: add opi flash support in esp_flash chip driver, for MXIC 2021-09-07 14:44:40 +08:00
boarchuz
ec70bc0523 fix compiler warning with silent panic option 2021-09-04 14:46:26 +10:00
Mahavir Jain
e0d29d4ada esp_system: create ld template to abstract few common settings 
PMS aware chips require prefetch padding size for instruction fetch, or
some memory alignment considerations. These settings are now exposed
through kconfig options (hidden) and used through common ld template.
This shall help to add and manage future chips support easily for
these considerations.

Closes IDF-3624
 2021-09-02 16:13:17 +08:00
Marius Vikhammer
88e7b5f7be Merge branch 'feature/s3_cache_bringup' into 'master' 
soc: S3 cache bringup

Closes IDF-2952

See merge request espressif/esp-idf!12887
 2021-09-02 02:51:10 +00:00
Marius Vikhammer
bdf3a8ff29 Merge branch 'feature/xtwdt' into 'master' 
WDT: Add support for XTAL32K Watchdog timer

Closes IDF-2575

See merge request espressif/esp-idf!15000
 2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
gaoxiaojie
191a494e08 support dcache 64Byte and 16k 2021-09-02 02:27:40 +08:00
jiangguangming
f7137254e9 flash_mmap: register flash2spiram info to ROM 2021-09-02 02:27:40 +08:00
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
Martin Vychodil
58aed7df98 ESP32S2: No assert()/abort() in Memprot API, use esp_err_t instead 
JIRA IDF-3634
 2021-08-26 09:20:00 +02:00
Shu Chen
f8f9e545e8 Merge branch 'feature/support_esp32h2_hw_support' into 'master' 
Feature/support esp32h2 hw support

Closes IDF-3378 and IDF-3396

See merge request espressif/esp-idf!14545
 2021-08-26 06:00:27 +00:00
sly
11dfd802e0 esp32h2: add rtc clock support 2021-08-26 11:25:39 +08:00
Jiang Jiang Jian
cec0f5edfb Merge branch 'optimization/config_option_LWIP_TCPIP_CORE_LOCKING' into 'master' 
optimization config option LWIP_TCPIP_CORE_LOCKING

Closes IDF-2478

See merge request espressif/esp-idf!11809
 2021-08-25 08:52:43 +00:00
Wu Zheng Hui
3128a2544b Adjust the variable name & 
Add mapping support for different sizes of spi ram
 2021-08-25 16:06:28 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support 
brownout init fixed
 2021-08-25 11:02:47 +08:00
Erhan Kurubas
2a5d0a041e gcov: add stub table size entry 2021-08-20 15:00:55 +08:00
Erhan Kurubas
ca88b269ed gcov: add gcov callback into the ipc task 2021-08-20 15:00:55 +08:00
Erhan Kurubas
bbf919709f gcov: added dbg stub capabilites and magic number entry to keep backward compatible 2021-08-20 15:00:55 +08:00
xueyunfei
0d07569fff optimization config option LWIP_TCPIP_CORE_LOCKING 2021-08-18 21:32:13 +08:00
simon.chupin
294f9783fc Tools: Fix memory calculations of idf_size.py 2021-08-11 17:51:51 +02:00
Michael (XIAO Xufeng)
064f12cb90 idf_size.py: fixed diram counted twice issue, and improve display 
Currently static RAM usage are listed under corresponding physical
memory.

ld: fix linker script for C3 and S3
 2021-08-11 17:51:50 +02:00
Marius Vikhammer
85b107bf54 Merge branch 'bugfix/rename_ext_mem_bss_section' into 'master' 
ld: rename .ext_ram.noinit to .ext_ram_noinit

See merge request espressif/esp-idf!14717
 2021-08-11 05:51:00 +00:00
Marius Vikhammer
6a2f7b6f88 ld: rename .ext_ram.noinit to .ext_ram_noinit 
Older versions of the coredump utility tool do not correctly
handle this nameing scheme. Rename to keep forward compatibility.
 2021-08-10 11:13:54 +08:00
Jiang Jiang Jian
6e1f8a68b9 Merge branch 'feature/support_esp32s3_wifi_lightsleep' into 'master' 
support esp32s3 wifi lightsleep

Closes IDF-1781

See merge request espressif/esp-idf!14569
 2021-08-06 12:51:46 +00:00
Roland Dobai
7384149780 Merge branch 'update_copyright_notice_esp32s2_esp32s3' into 'master' 
esp32s2, esp32s3: update copyright notice

See merge request espressif/esp-idf!13831
 2021-08-06 10:36:07 +00:00
Jan Brudný
562ce4d009 esp32s2, esp32s3: update copyright notice 2021-08-05 15:01:26 +02:00
Sachin Parekh
6582f7070e Update tests for assert and abort 
- Place panic_abort in IRAM
- Added abort, assert test case in case of cache disabled
- Expect assert instead of abort in a freertos_mutex test
 2021-08-05 11:09:22 +05:30
Li Shuai
d73a09cd8b light sleep: add wifi mac sleep support for esp32s3 2021-08-04 21:58:33 +08:00
Li Shuai
366d0a724a light sleep: set wifi light sleep clock source to rtc slow clock 2021-08-04 21:31:47 +08:00
Zim Kalinowski
1fd56e0b87 Merge branch 'feature/systimer_generate_rtos_tick' into 'master' 
freertos(esp32s3): SysTick uses systimer

Closes IDF-2613

See merge request espressif/esp-idf!12246
 2021-08-04 12:33:52 +00:00
Konstantin Kondrashov
29f581fc70 freertos(esp32s3): SysTick uses systimer 2021-08-04 20:33:44 +08:00
Armando (Dou Yiwen)
03fb3973a2 Merge branch 'feature/support_quad_flash_octal_psram_on_esp32s3' into 'master' 
mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3

Closes IDF-3603

See merge request espressif/esp-idf!14346
 2021-08-04 03:57:16 +00:00
Armando
0f91a01a46 mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3 2021-08-03 16:54:00 +08:00
Konstantin Kondrashov
4972605b16 esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt 2021-08-03 14:35:29 +08:00
Armando (Dou Yiwen)
0dad76329f Merge branch 'feature/support_noinit_section_in_psram_on_esp32' into 'master' 
memory: support noinit section in psram on esp32

Closes IDFGH-2621

See merge request espressif/esp-idf!14088
 2021-07-31 09:58:59 +00:00
Jiang Jiang Jian
aebdaf08a6 Merge branch 'bugfix/esp32s3_app_core_clock_gate_invalid_issue' into 'master' 
fix app cpu core clock gate invalid issue

Closes WIFI-3899

See merge request espressif/esp-idf!14518
 2021-07-31 03:00:58 +00:00
Cao Sen Miao
c29b3e2e36 spi_flash: move the unlock patch to bootloader and add support for GD 2021-07-29 10:46:33 +08:00
Armando
ad8e1a395c memory: port SPIRAM noinit segment support to master 2021-07-29 10:28:39 +08:00
Devan Lai
b85011c15f esp32: Add support for noinit variables in SPIRAM 
Add Kconfig option SPIRAM_ALLOW_NOINIT_EXTERNAL_MEMORY
When enabled, a new linker script rule (from esp32.extram.noinit.ld)
places any variables in the .ext_ram.noinit section in SPIRAM.

This section is exempted from the startup SPIRAM memory test and is
not zero-initialized or added to the malloc pool, making it usable
for noinit variables that persist across reset.

The EXT_RAM_NOINIT_ATTR macro places variables in this section.
 2021-07-29 10:28:38 +08:00
Li Shuai
8a10ba4179 system: fix app cpu core clock gate invalid issue 2021-07-28 11:34:29 +08:00
Michael (XIAO Xufeng)
18bee2380a Merge branch 'refactor/usb_device_driver' into 'master' 
tiny_usb: support on esp32-s3

Closes IDF-3234

See merge request espressif/esp-idf!14293
 2021-07-26 16:21:55 +00:00
Martin Vychodil
ce28af2dd4 System/memprot: ESP32C3 IRAM section alignment fix (LD) 
IRAM section didn't contain sufficient padding for possible CPU instruction prefetch,
ie instruction fetch could happen in DRAM section which is prohibited by the Memprot module.
This is fixed by adding 16B to the end of IRAM section in LD script (C3 CPU prefetch buffer depth is 4 words)

Closes IDF-3554

* fix
 2021-07-23 17:11:12 +02:00
Michael (XIAO Xufeng)
fbb6b1b11a Merge branch 'bugfix/fix_uart_reset_issue_on_esp32c3' into 'master' 
bugfix(uart): reset uart0 core before uart apb reset

Closes IDF-3362

See merge request espressif/esp-idf!12749
 2021-07-22 07:20:58 +00:00
morris
81448dcae8 tiny_usb: rename Kconfig name 
1. Renamed Kconfig file of tinyusb (distinguish tinyusb stack from usb
   peripheral)
2. bugfix/typofix/doc update of tinyusb
 2021-07-22 10:43:10 +08:00
KonstantinKondrashov
c19b37d2a9 esp_system: Adds sync of FRC & RTC counters in esp_restart 
In case when FRC and RTC counters are very different then
the need to sync them before to restart the ESP
to get the correct system time after reboot.
 2021-07-21 10:23:24 +05:00
Wangjialin
2b986fbd49 For esp_restart API, reset uart0 core first, then reset uart0 apb side, so as to prevent uart output garbage after cpu reset. (UART0 RST bits will be cleared in ROM) 
Add UART0/1 core reset on esp32c3, in case uart driver would also reset uart hardwares.
 2021-07-21 11:41:04 +08:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master' 
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
 2021-07-18 08:06:38 +00:00
Angus Gratton
c1ca7a35b0 ldgen: Remove some remaining references to TARGET.project.ld.in 2021-07-16 20:14:27 +08:00
Angus Gratton
f0471b18b2 esp32h2: Move from target component to esp_hw_support (new structure) 2021-07-16 20:14:27 +08:00
Renz Bagaporo
b06dba7823 esp32: move app linker scripts 2021-07-16 20:14:27 +08:00
Renz Bagaporo
fddc0b6799 esp32: move remaining tests 2021-07-16 20:14:27 +08:00
Renz Bagaporo
7c22cccb9c esp32: cleanup build script 2021-07-16 20:14:27 +08:00
Angus Gratton
1a626ef6ca esp32: App can boot on FPGA image 
Includes fix for detecting ESP32 ECO3 on FPGA
 2021-07-16 10:50:06 +10:00
Angus Gratton
bbbbd5cf0c esp32s2: FPGA can boot to Hello World 2021-07-16 10:50:06 +10:00
Omar Chebib
0771bd1711 espsystem: Rearchitecture and fix eh_frame_parser bugs 
eh_frame_parser is architecture independent, thus the files have
been rearchitectured. Some bugs have been fixed in the test.
A README file has also been added to eh_frame_parser host test
directory.

eh_frame_parser is now able to detect empty gaps in .eh_frame_hdr
table (missing DWARF information).
Fix a bug occuring when parsing backtraces originated from abort().
Fix build missing dependencies issue.
 2021-07-15 12:47:51 +08:00
Omar Chebib
b967dc0dbf espsystem: add support for RISC-V panic backtrace 
Add .eh_frame and .eh_frame_hdr sections to the binary (can be
enabled/disabled within menuconfig). These sections are parsed
when a panic occurs. Their DWARF instructions are decoded and
executed at runtime, to retrieve the whole backtrace. This
parser has been tested on both RISC-V and x86 architectures.

This feature needs esptool's merge adjacent ELF sections feature.
 2021-07-13 15:42:40 +08:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
5e3689ae0f esp32h2: update esp_system and esp_hw_support to support esp32h2 2021-07-01 19:53:11 +08:00
Shu Chen
7d4b2617e1 esp32h2: copy esp_system and esp_hw_support from esp32c3 
Copy the esp32c3 code without any change:
 * components/esp_hw_support/include/soc/esp32h2
 * components/esp_hw_support/port/esp32h2
 * components/esp_system/port/soc/esp32h2
 2021-07-01 19:53:11 +08:00
Angus Gratton
2f8debdde1 Merge branch 'feature/esp32s3_remove_rtc_apb_freq_reg' into 'master' 
esp32s3: Remove APB frequency RTC register

See merge request espressif/esp-idf!11137
 2021-06-29 23:50:23 +00:00
Angus Gratton
1969e4b8e5 Merge branch 'bugfix/panic_handler_disable_wdts_early' into 'master' 
esp_system: Reconfigure the WDTs at the start of the panic handler

Closes IDFCI-361

See merge request espressif/esp-idf!14138
 2021-06-29 23:48:40 +00:00
Angus Gratton
57fa883127 esp32s3: Remove APB frequency RTC register 
Usage of this register changed between ESP32-S3 beta2 and the
final chip.
 2021-06-29 17:38:46 +10:00
Angus Gratton
14c7d4965b esp_system: Reconfigure the WDTs at the start of the panic handler 
This is mostly important on ESP32 ECO3 with the
ESP32_ECO3_CACHE_LOCK_FIX, because when we stall the other CPU core
before we disable the TG1 WDT then the first CPU can get stuck
in WDT ISR handle_livelock_int routine waiting for the other CPU.
 2021-06-28 17:24:39 +10:00
Ivan Grokhotkov
d7928bf1db Merge branch 'feature/esp32c3_apptrace' into 'master' 
apptrace: refactoring & esp32c3 support

See merge request espressif/esp-idf!11702
 2021-06-28 06:00:24 +00:00
Michael (XIAO Xufeng)
afc2bc94b3 Merge branch 'feature/add_opi_flash_psram_support' into 'master' 
spi flash: opi flash psram support and spi timing tuning  support on 727

Closes IDF-3097

See merge request espressif/esp-idf!12946
 2021-06-28 01:59:19 +00:00
Armando
bc248278f8 spiflash: add octal spi psram support on 727 2021-06-25 19:41:57 +08:00
Alexey Gerenkov
20fd09728f apptrace: Adds ESP32-C3 support 2021-06-24 13:16:14 +03:00
Alexey Gerenkov
821869d98d apptrace: Refactors apptrace for better support various tracing HW 2021-06-24 13:16:13 +03:00
Jakob Hasse
64750acbb0 [esp_system]: added __cxx_eh_arena_size_get again 
* This function has been accidentally removed.
  It is necessary to provide the emergency
  exception memory pool size for C++ code.
  Since our libstdc++ always has exceptions
  enabled, this function must exist here even if
  -fno-exception is set for user code.
 2021-06-22 14:14:08 +08:00
Cao Sen Miao
f2fe0847d5 usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now 2021-06-18 12:42:41 +08:00
Angus Gratton
059353b0c2 Merge branch 'feature/refactor_common_secure_boot_code' into 'master' 
secure_boot/flash_encryption: Refactoring

Closes IDF-2582 and IDF-2035

See merge request espressif/esp-idf!12963
 2021-06-16 23:21:45 +00:00
Konstantin Kondrashov
f339b3fc96 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 
These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
 2021-06-17 07:21:36 +08:00
Marius Vikhammer
f124536948 system: add support for reset reason hint on S3 2021-06-15 13:39:51 +08:00
Angus Gratton
d995086621 Merge branch 'bugfix/memprot_bypass' into 'master' 
System/Security: Memprot bypassing mitigation

Closes IDF-2700

See merge request espressif/esp-idf!13795
 2021-06-09 00:02:30 +00:00
Jiang Jiang Jian
5cbea220b0 Merge branch 'feature/decouple_esp_phy' into 'master' 
esp_phy: decouple esp_phy component from esp_wifi and bt

See merge request espressif/esp-idf!13742
 2021-06-04 05:20:17 +00:00
Shu Chen
6061a547e5 esp_phy: decouple esp_phy component from esp_wifi and bt 
* add esp-phy-lib submodule
* move libphy.a and phy_init.c from esp_wifi to esp_phy
* move librtc.a from esp_wifi to esp_phy
* move libbtbb.a from bt to esp_phy
* corresponding updates to build system
 2021-06-03 16:17:31 +08:00
Angus Gratton
dc6b950257 doc: Add performance guides for execuion speed, binary size, RAM usage 
Closes https://github.com/espressif/esp-idf/issues/7007
Closes https://github.com/espressif/esp-idf/issues/6715
Closes https://github.com/espressif/esp-idf/issues/3781
Closes https://github.com/espressif/esp-idf/issues/2566
 2021-06-03 13:55:34 +10:00
Martin Vychodil
1e58eb6928 system/security: Memprot bypassing mitigation 
Check Memprot lock bit(s) during the system startup, abort/reset on any Memprot parts found locked during this phase.
There is no legal reason to disallow the Memprot configuration by the system, so it's either a critical bug in the
application or an malicious attempt to bypass the system security.
Error message is printed before digital system reset.

Closes IDF-2700
 2021-06-01 00:07:09 +02:00
Dmitry
00a7ecb5a3 Code cleanup. Bugfix after rebase with master. Formating. 2021-05-13 15:03:40 +03:00
Dmitry
f8197c2446 Fix problem with panic handler with gdbstubs. 2021-05-11 16:09:32 +03:00
Dmitry
7bb91f912c gdbstub component 2021-05-11 15:55:39 +03:00
Ivan Grokhotkov
c88287851d Merge branch 'feature/raise_log_level' into 'master' 
feature: Set maximum log level, add startup time example

Closes IDFGH-3599 and IDFGH-333

See merge request espressif/esp-idf!12714
 2021-05-03 08:52:27 +00:00
Jiang Jiang Jian
efb9f87951 Merge branch 'bugfix/fix_728_series_reboot_failure' into 'master' 
[system]: Fix two  (re)boot failure issues on ESP32S3Beta

Closes WIFI-3548, WIFI-3559, and IDF-3170

See merge request espressif/esp-idf!13268
 2021-04-30 03:20:47 +00:00
Michael (XIAO Xufeng)
76fbb689fd Merge branch 'bugfix/remove_uart2_c3' into 'master' 
uart: remove misleading ld files and soc defs for UART2

See merge request espressif/esp-idf!13340
 2021-04-29 05:18:25 +00:00
wuzhenghui
57d43d1bc5 fix 728 series reboot failure 2021-04-29 03:10:47 +00:00
Jeroen Domburg
2c75f63f89 * ets_delay_us(1) has too much overhead; change logic 
* Fix MR comments
 2021-04-28 16:38:24 +08:00
Michael (XIAO Xufeng)
a0d13a31ec uart: fix misleading files for UART2 
Includes: header files, ld files and clk.c

ESP32-C3 only have UART0 and UART1.
 2021-04-27 17:40:19 +08:00
Angus Gratton
69309c88a0 Merge branch 'bugfix/fix_c3_typos' into 'master' 
esp32c3: fix typos of c3 path

See merge request espressif/esp-idf!13318
 2021-04-23 13:05:09 +00:00
Shu Chen
ff3320ca8a esp32c3: fix typos of c3 path 2021-04-23 18:11:39 +08:00
Angus Gratton
6e80811ca2 log: Remove redundant definition of LOG_LOCAL_LEVEL 
After adding a maximum setting, the default value of LOG_LOCAL_LEVEL
will be CONFIG_LOG_MAXIMUM_LEVEL not CONFIG_LOG_DEFAULT_LEVEL
 2021-04-23 18:13:04 +10:00