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idf_size.py: fixed diram counted twice issue, and improve display

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Currently static RAM usage are listed under corresponding physical
memory.

ld: fix linker script for C3 and S3
This commit is contained in:
Michael (XIAO Xufeng) 2020-10-30 13:31:24 +08:00 committed by simon.chupin
parent 2c49af9e75
commit 064f12cb90
8 changed files with 736 additions and 486 deletions
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39
components/esp_system/ld/esp32s3/memory.ld.in
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@ -21,15 +21,34 @@
#define ESP_BOOTLOADER_RESERVE_RTC 0
#endif
/*
* 40370000 <- IRAM/Icache -> 40378000 <- D/IRAM (I) -> 403E0000
* 3FC88000 <- D/IRAM (D) -> 3FCF0000 <- DRAM/DCache -> 3FD00000
*
* Startup code uses the IRAM from 0x403BA000 to 0x403E0000, which is not available for static
* memory, but can only be used after app starts.
*
* D cache use the memory from high address, so when it's configured to 16K/32K, the region
* 0x3FCF000 ~ (3FD00000 - DATA_CACHE_SIZE) should be available. This region is not used as
* static memory, leaving to the heap.
*/
#define SRAM_IRAM_START 0x40370000
#define SRAM_DRAM_START 0x3FC80000
#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START)
#define SRAM_DRAM_END 0x403BA000 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_DIRAM_I_START 0x40378000
#define SRAM_IRAM_END 0x403BA000
#define I_D_SRAM_OFFSET (SRAM_DIRAM_I_START - SRAM_DRAM_START)
#define SRAM_DRAM_START 0x3FC88000
#define SRAM_DRAM_END (SRAM_IRAM_END - I_D_SRAM_OFFSET) /* 2nd stage bootloader iram_loader_seg start address */
#define I_D_SRAM_SIZE (SRAM_DRAM_END - SRAM_DRAM_START)
#define ICACHE_SIZE 0x8000
#define SRAM_IRAM_ORG (SRAM_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define SRAM_DRAM_ORG (SRAM_DRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define SRAM_IRAM_SIZE (I_D_SRAM_SIZE + ICACHE_SIZE - CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG
#define DCACHE_SIZE 0x10000
#define SRAM_DRAM_ORG (SRAM_DRAM_START)
#if CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE
ASSERT((CONFIG_ESP32S3_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.")
@ -47,11 +66,15 @@ MEMORY
*/
/* IRAM for PRO CPU. */
iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE
iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = SRAM_IRAM_SIZE
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
/* Flash mapped instruction data */
<<<<<<< HEAD:components/esp_system/ld/esp32s3/memory.ld.in
iram0_2_seg (RX) : org = 0x42000020, len = 0x2000000-0x20
=======
iram0_2_seg (RX) : org = 0x42000020, len = 0x800000-0x20
>>>>>>> ld: fix linker script for C3 and S3:components/esp32s3/ld/esp32s3.ld
/**
* (0x20 offset above is a convenience for the app binary image generation.
@ -70,7 +93,11 @@ MEMORY
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
/* Flash mapped constant data */
<<<<<<< HEAD:components/esp_system/ld/esp32s3/memory.ld.in
drom0_0_seg (R) : org = 0x3C000020, len = 0x2000000-0x20
=======
drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20
>>>>>>> ld: fix linker script for C3 and S3:components/esp32s3/ld/esp32s3.ld
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

4
components/esp_system/ld/esp32s3/sections.ld.in
View File

@ -1,6 +1,8 @@
/* Default entry point */
ENTRY(call_start_cpu0);
_diram_i_start = 0x40378000;
SECTIONS
{
/**
@ -175,7 +177,7 @@ SECTIONS
*/
.dram0.dummy (NOLOAD):
{
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
. = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
} > dram0_0_seg
.dram0.data :

12
components/heap/port/esp32s3/memory_layout.c
View File

@ -69,7 +69,9 @@ const soc_memory_region_t soc_memory_regions[] = {
{ 0x3FCC0000, 0x10000, 2, 0x403B0000}, //Level 6, IDRAM, can be used as trace memroy
{ 0x3FCD0000, 0x10000, 2, 0x403C0000}, //Level 7, IDRAM, can be used as trace memroy
{ 0x3FCE0000, 0x10000, 1, 0}, //Level 8, IDRAM, can be used as trace memroy, contains stacks used by startup flow, recycled by heap allocator in app_main task
#if CONFIG_ESP32S3_DATA_CACHE_32KB
#if CONFIG_ESP32S3_DATA_CACHE_16KB
{ 0x3FCF0000, 0xC000, 0, 0}, //Level 9, DRAM
#elif CONFIG_ESP32S3_DATA_CACHE_32KB
{ 0x3FCF0000, 0x8000, 0, 0}, //Level 9, DRAM
#endif
#ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
@ -93,11 +95,11 @@ SOC_RESERVE_MEMORY_REGION((intptr_t)&_data_start, (intptr_t)&_heap_start, dram_d
// ESP32S3 has a big D/IRAM region, the part used by code is reserved
// The address of the D/I bus are in the same order, directly shift IRAM address to get reserved DRAM address
#define I_D_OFFSET (SOC_DIRAM_IRAM_LOW - SOC_DIRAM_DRAM_LOW)
#if CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start, (intptr_t)&_iram_start + 0x4000, iram_code_1);
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start + 0x4000 - I_D_OFFSET, (intptr_t)&_iram_end - I_D_OFFSET, iram_code_2);
#else
// .text region in diram. DRAM used by text (shared with IBUS).
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start - I_D_OFFSET, (intptr_t)&_iram_end - I_D_OFFSET, iram_code);
#if CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start, (intptr_t)&_iram_end, iram_code_2);
#endif
#ifdef CONFIG_SPIRAM

15
tools/ci/mypy_ignore_list.txt
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@ -1,6 +1,7 @@
components/app_update/otatool.py
components/efuse/efuse_table_gen.py
components/efuse/test_efuse_host/efuse_tests.py
components/esp32s2/test/gen_digital_signature_tests.py
components/esp_local_ctrl/python/esp_local_ctrl_pb2.py
components/esp_netif/test_apps/component_ut_test.py
components/espcoredump/corefile/gdb.py
@ -140,12 +141,20 @@ examples/system/ota/otatool/otatool_example.py
examples/system/ota/simple_ota_example/example_test.py
examples/system/perfmon/example_test.py
examples/system/select/example_test.py
<<<<<<< HEAD
examples/system/startup_time/example_test.py
examples/system/sysview_tracing/example_test.py
examples/system/sysview_tracing_heap_log/example_test.py
examples/system/task_watchdog/example_test.py
examples/system/ulp_fsm/ulp/example_test.py
examples/system/ulp_fsm/ulp_adc/example_test.py
=======
examples/system/sysview_tracing/example_test.py
examples/system/sysview_tracing_heap_log/example_test.py
examples/system/task_watchdog/example_test.py
examples/system/ulp/example_test.py
examples/system/ulp_adc/example_test.py
>>>>>>> idf_size.py: fixed diram counted twice issue, and improve display
examples/system/unit_test/example_test.py
examples/wifi/iperf/iperf_test.py
tools/ble/lib_ble_client.py
@ -190,6 +199,10 @@ tools/ci/python_packages/tiny_test_fw/Utility/TestCase.py
tools/ci/python_packages/tiny_test_fw/bin/Runner.py
tools/ci/python_packages/tiny_test_fw/bin/example.py
tools/ci/python_packages/tiny_test_fw/docs/conf.py
<<<<<<< HEAD
=======
tools/ci/python_packages/ttfw_idf/CIScanTests.py
>>>>>>> idf_size.py: fixed diram counted twice issue, and improve display
tools/ci/python_packages/ttfw_idf/DebugUtils.py
tools/ci/python_packages/ttfw_idf/IDFAssignTest.py
tools/ci/python_packages/ttfw_idf/IDFDUT.py
@ -221,6 +234,8 @@ tools/find_build_apps/common.py
tools/find_build_apps/make.py
tools/gen_esp_err_to_name.py
tools/idf.py
tools/idf_monitor.py
tools/idf_py_actions/constants.py
tools/idf_py_actions/core_ext.py
tools/idf_py_actions/create_ext.py
tools/idf_py_actions/debug_ext.py

1128
tools/idf_size.py
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File diff suppressed because it is too large Load Diff

8
tools/test_idf_size/expected_output
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@ -17750,10 +17750,4 @@ Producing text file output...
***
Running idf_size_tests.py...
Total sizes:
DRAM .data size: 0 bytes
DRAM .bss size: 0 bytes
Used static DRAM: 0 bytes ( 0 available, nan% used)
Used static IRAM: 0 bytes ( 0 available, nan% used)
Flash code: 0 bytes
Flash rodata: 0 bytes
Total image size:~ 0 bytes (.bin may be padded larger)
Total image size: 0 bytes (.bin may be padded larger)

2
tools/test_idf_size/test.sh
View File

@ -64,8 +64,6 @@
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s2 --archive_details libdriver.a app_esp32s2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py diff with another app (different target)..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py app.map --diff app_esp32s2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py diff with another app (wrong target)..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s2 app.map --diff app2.map &>> output \
&& echo -e "\n***\nProducing JSON output..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --json app.map &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --json --archives app.map &>> output \

14
tools/test_idf_size/test_idf_size.py
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@ -16,7 +16,6 @@
from __future__ import print_function
import collections
import sys
try:
@ -35,16 +34,13 @@ if __name__ == '__main__':
# Should deliver a RuntimeError as there's no content under the heading
try:
idf_size.load_memory_config(['Memory Configuration'])
idf_size.load_segments(['Memory Configuration'])
pass
except RuntimeError as e:
assert 'End of file' in str(e)
# This used to crash with a division by zero error but now it just prints nan% due to
# zero lengths
MemRegNames = collections.namedtuple('MemRegNames', ['iram_names', 'dram_names', 'diram_names', 'used_iram_names',
'used_dram_names', 'used_diram_names'])
mem_reg = MemRegNames(set(), set(), set(), set(), set(), set())
segments = {'iram0_0_seg': {'origin': 0, 'length': 0},
'dram0_0_seg': {'origin': 0, 'length': 0}}
sections = {}
print(idf_size.get_summary('a.map', mem_reg, {'iram0_0_seg': {'origin':0,'length':0}, 'dram0_0_seg':
{'origin':0, 'length':0}}, {}), end='')
print(idf_size.get_summary('a.map', segments, sections, 'esp32'), end='')