alex/esp-idf
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253 Commits

Author SHA1 Message Date
morris
ca1b182b25 glitch_filter: support derive clock source form IO MUX 2022-12-29 14:46:16 +08:00
morris
cbe297e5a0 sdm: support derive clock source from IO MUX 2022-12-29 14:46:16 +08:00
Cao Sen Miao
4713a9a7f2 ESP32H2: Introduce new chip target esp32h2, hello_world example supported 2022-12-29 12:29:14 +08:00
jiangguangming
42144a7e45 soc: H4/H2/C6 support SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY 2022-12-28 17:35:07 +08:00
wuzhenghui
3b43b63d47 soc: add ieee8020154_only cap for esp32hx 2022-12-28 16:15:58 +08:00
wuzhenghui
aa20825659 soc_caps: rename ESP_PD_DOMAIN_RTC8M to ESP_PD_DOMAIN_FOSC 2022-12-27 21:31:21 +08:00
laokaiyao
5333ac81bf adc: support ADC on esp32c6 (driver/test/example) 2022-12-23 11:24:06 +08:00
laokaiyao
e27f3e3128 adc: support ADC on esp32c6 (hal) 2022-12-23 11:24:06 +08:00
laokaiyao
7a002ab7a6 rtcio: support rtcio on c6 2022-12-22 14:14:38 +08:00
wuzhenghui
8f78520342 esp_phy: only esp32c3&esp32s3 support MAC_BB_PD, remove unused caps define 2022-12-16 15:47:59 +08:00
wuzhenghui
5822cdf93b esp_phy: enable for esp32c6 2022-12-16 15:47:56 +08:00
wuzhenghui
b887f86a78 soc: add SOC_IEEE802154_SUPPORTED caps 2022-12-15 17:18:28 +08:00
Song Ruo Jing
9402ab427b ledc: Add basic support for esp32c6 2022-12-07 18:40:50 +08:00
C.S.M
6b1d4b4d49 ESP32-H2: Last MR for g0 component support, (only hal left) 2022-12-05 17:32:21 +08:00
Cao Sen Miao
5520e3b811 ESP32H2: Add SOC files for esp32h2 2022-11-29 18:55:12 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
morris
f69a53f56d Merge branch 'feature/twai_bringup_esp32c6' into 'master' 
TWAI: initial driver bring up on esp32c6 (TWAI0 only)

Closes IDF-5313 and IDF-5940

See merge request espressif/esp-idf!20735
 2022-11-07 18:00:05 +08:00
morris
a25123f703 twai: bringup on esp32c6 2022-11-04 17:40:29 +08:00
morris
6828c011d9 twai: define clock source name 
twai clock source is target-specific,
this commit is to define them in the soc layer
 2022-11-04 17:40:29 +08:00
laokaiyao
fa9b022f68 i2s: support 4 line pdm rx on esp32s3 2022-11-04 15:46:34 +08:00
laokaiyao
9b8a78153f i2s: refactor soc caps 2022-11-04 12:31:12 +08:00
Jiang Jiang Jian
f191b2f034 Merge branch 'bugfix/fix_xtal_related_rtc_params_for_esp32' into 'master' 
esp32/rtc: fix xtal unstable in some cases when sleep

Closes ESPCS-869

See merge request espressif/esp-idf!20425
 2022-10-26 15:57:48 +08:00
Song Ruo Jing
6d24e8bcf4 gpio: Add support for esp32c6 2022-10-18 12:38:36 +08:00
jingli
b903a2253b esp_hw_support/sleep: fix current leakage when hold digital io during deep sleep 2022-10-11 12:11:28 +08:00
jingli
0a44d09f4f esp32/rtc: fix xtal unstable in some cases when sleep 
1. add xtal buf wait to fix high temperature restart issue
2. add min sleep value to fix xtal stop due to too short sleep time issue
 2022-10-09 19:58:58 +08:00
jingli
05a2fbe810 esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 03:03:25 +00:00
wangjialiang
6e79d05814 ble_mesh: docs: Remove BLE Mesh related reference for C2 2022-09-16 19:39:51 +08:00
Kevin (Lao Kaiyao)
04b4bc6cb5 Merge branch 'feature/support_i2s_on_esp32c6' into 'master' 
i2s: support i2s on esp32c6

See merge request espressif/esp-idf!19989
 2022-09-16 12:31:24 +08:00
laokaiyao
7197e987cb i2s: add XTAL clock source 2022-09-15 19:32:06 +08:00
Omar Chebib
53c7dd4efc WDT: implement interrupt wdt and task wdt for ESP32-C2 
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
 2022-09-15 14:37:59 +08:00
morris
5f550b2a13 rmt,gptimer: don't support rc_fast clock source for c6 and h2 
The RC_FAST clock source on ESP32C6 and ESP32H2 can't be calibrated.
Which makes it impossible to work stable for peripherals like timer, RMT
 2022-09-14 14:40:28 +00:00
wanlei
96aa2792f8 spi_master:fix error when use spi_bus_add_device more than 3 device 
update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
 2022-09-05 12:10:22 +08:00
songruojing
9d515185d0 esp32c6: clean up existing soc files and header file inclusion in IDF to be compatible with the new chip 2022-09-01 12:28:06 +08:00
Song Ruo Jing
6a60ecf780 soc_caps: Introduce SOC_LEDC_SUPPORTED and SOC_I2C_SUPPORTED caps to IDF 
Wrap the ledc, i2c source files with the new caps in CMakeLists and linker.lf.
This could avoid potential source file not found warning during linking time.
 2022-08-31 20:43:22 +08:00
Michael (XIAO Xufeng)
746f4b814c uart: move frequency of clock sources out of HAL 2022-08-15 18:55:43 +00:00
Geng Yuchao
0a1d8c1e09 Fix soc caps define for all chips 2022-08-08 20:50:28 +08:00
jingli
ee3423834e kconfig: refactor xtal freq kconfig to common configuration item 2022-08-05 19:12:29 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wuzhenghui
21a4eda4d4 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-07-29 10:51:47 +08:00
morris
d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
morris
741b031e83 soc: added SOC_TOUCH_SENSE_SUPPORTED macro 2022-07-22 00:12:36 +00:00
laokaiyao
edee3ee3cd i2s: add slot sequence table 
Closes: https://github.com/espressif/esp-idf/issues/9208

When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
 2022-07-21 15:52:39 +08:00
morris
4154eaec93 sdm: clean up soc/hal/ll code 2022-07-20 14:59:50 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master' 
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
 2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
Jiang Jiang Jian
3630713e5f Merge branch 'docs/esp32c2_sys_feature_api_guides' into 'master' 
docs: update system API-guides for ESP32-C2

Closes IDF-4202, IDF-4213, and IDF-4222

See merge request espressif/esp-idf!18979
 2022-07-12 10:59:12 +08:00
Marius Vikhammer
d62421619c docs: update system API-guides for ESP32-C2 2022-07-12 09:32:43 +08:00
songruojing
b3d8db3ae2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 
Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
 2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency 
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
 2022-07-11 12:24:37 +08:00
GengYuchao
d145c337e0 Enable rpa_moudle reset function 2022-07-05 20:50:31 +08:00
morris
7863c1bc45 Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master' 
Bugfix/fix rtc freq err for h2 beta1

See merge request espressif/esp-idf!18682
 2022-07-04 16:46:17 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component 
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
 2022-06-30 09:40:44 +00:00
GengYuchao
10fd1daa10 Add ETM clk gate defines for h2 2022-06-30 17:02:00 +08:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00
Sachin Parekh
6cfc9c365f esp32h2: Enable ECC accelerator 2022-06-23 12:59:13 +05:30
Ivan Grokhotkov
3973db7664
soc: make register access macros compatible with C++20 
In C++20, using the result of an assignment to a 'volatile' value is
deprecated.

Breaking change: register "setter" or modification macros can no
longer be used as expressions.

Closes https://github.com/espressif/esp-idf/issues/9170
 2022-06-17 18:09:22 +02:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master' 
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
 2022-06-16 11:53:39 +08:00
laokaiyao
28b8fc6a7e i2s: update documents for driver-NG 2022-06-15 10:30:04 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master' 
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
 2022-06-14 21:11:30 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer 
G0 doesn't depend on any G1+ layer for RISC-V based targets
 2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API 
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
 2022-06-14 14:30:58 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
Geng Yuchao
8012af37d1 Fix soc caps for BT 2022-06-03 21:45:40 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Island
74b7a3fc83 Merge branch 'feature/final_h2_bluedroid_skc_common' into 'master' 
Feature/final h2 bluedroid skc common

See merge request espressif/esp-idf!17710
 2022-05-30 21:20:52 +08:00
Jiang Jiang Jian
2bc5d58807 Merge branch 'feature/support_sleep_for_esp32c2' into 'master' 
esp32c2: support power management

Closes IDF-4440 and IDF-4617

See merge request espressif/esp-idf!18174
 2022-05-30 17:57:18 +08:00
satish.solanke
3a42007680 Bluedroid porting changes for esp32h2 
created common Kconfig for common flag of nimbble and Bluedroid

fix compile error

created common cfg file for controller

fix the compilation error on tip of master

added common controller flags and fixed compilation error

sdkconfig rename for target specific
 2022-05-30 08:42:45 +00:00
Jiang Jiang Jian
f3922f1b7f Merge branch 'feature/flash_mmap_refactor' into 'master' 
flash mmap: abstract R/W of MMU table instead of reg access

See merge request espressif/esp-idf!16882
 2022-05-29 13:56:37 +08:00
Wu Zheng Hui
b98622c624 efuse: update efuse name 2022-05-28 22:03:16 +08:00
jingli
ae127b04cd fix ld err since esp32c2 do not suport config gpio of spi flash via efuse 2022-05-27 19:29:38 +08:00
songruojing
74c99a8a07 rtc_clk: Add alias for the clock tree related enum and macros for backwards compatibility 2022-05-24 22:59:51 +08:00
songruojing
729d70129a clk_tree: add initial docs for clock tree 2022-05-24 22:59:51 +08:00
morris
b26cd91537 doc: added clk_tree definitions to doc 2022-05-24 22:59:51 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in 
soc/clk_tree_defs.h
 2022-05-24 22:59:41 +08:00
jiangguangming
42bc0b0643 soc: remove unused MMU related macros 2022-05-20 16:46:28 +08:00
Michael (XIAO Xufeng)
adcdcbaa0e Merge branch 'feat/pm_dbias_refactoring' into 'master' 
pm: refactoring dbias related code

See merge request espressif/esp-idf!17994
 2022-05-17 14:42:16 +08:00
Michael (XIAO Xufeng)
6f507d527c rtc: fixed 8MD256 can't be used as RTC slow src on ESP32 
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
 2022-05-14 22:35:41 +08:00
Michael (XIAO Xufeng)
234628b3ea pm: putting dbias and pd_cur code into same function 2022-05-14 02:35:11 +08:00
Jing Li
ac0d16cdc8 Merge branch 'bugfix/fix_cannot_lslp_again_after_ulp_wakeup' into 'master' 
sleep: fix cannot lightsleep again after a wakeup from ULP

Closes IDFGH-4396

See merge request espressif/esp-idf!17970
 2022-05-13 22:25:23 +08:00
jingli
abb6bb1181 esp_hw_support/sleep: fix cannot enable sleep reject in some cases 
When enable sleep reject before this fix, we have two limitations:
1. it must be light sleep
2. RTC GPIO wakeup source must be set

We require light sleep because `esp_deep_sleep_start` function has
been declared with "noreturn" attribute, So developers don't expect
that this function may return (due to an error or a sleep reject).
But the requirement for RTC GPIO wakeup source is not reasonable for
all chips. This requirement exists because ESP32 only supports RTC GPIO
and SDIO sleep reject sources. But later chips support all sleep reject
sources.

This fix brings the following changes:
for ESP32: RTC GPIO and SDIO sleep reject sources can be enabled
           when corresponding wakeup source is set.

for later chips: all sleep reject sources can be enabled when
                 corresponding wakeup source is set.
 2022-05-12 19:09:57 +08:00
Marius Vikhammer
c8617fe965 docs: fix all doxygen warnings 
Doxygen warnings would previously not result in a failed pipeline.
Fixed this as well as all current warnings.
 2022-05-12 14:50:03 +08:00
Michael (XIAO Xufeng)
36074b9812 pm: add powerdown for int_8m on ESP32-C2 and ESP32-H2 
Also move the xtal fpu logic to sleep_modes.c
 2022-05-11 11:36:34 +08:00
morris
523c51818c Merge branch 'feature/c2_soc_hwsupport_code' into 'master' 
ESP32-C2 (729) RTC update (Clock, PM)

Closes IDF-3833 and IDF-4874

See merge request espressif/esp-idf!17311
 2022-05-11 11:23:57 +08:00
morris
df5872b3a4 Merge branch 'feature/support_i2c_on_esp32h2' into 'master' 
i2c: support i2c on esp32h2

Closes IDF-4155

See merge request espressif/esp-idf!17798
 2022-05-10 22:48:05 +08:00
zlq
6336f8191e C2 rtc code 2022-05-09 17:50:54 +08:00
morris
722fde218d uart: add default source clock for all targets 2022-05-09 11:26:30 +08:00
Armando (Dou Yiwen)
03aeac1dde Merge branch 'refactor/adc_hal_common_layer' into 'master' 
adc: create common adc hal layer

See merge request espressif/esp-idf!17577
 2022-05-08 15:45:56 +08:00
Armando
49747bb486 adc: create common adc hal layer 2022-05-07 19:20:44 +08:00
morris
2fb43820c2 driver_ng: implement new rmt driver 
The legacy driver can't handle the breaking change between esp chips

very well.

And it's not elegant to extend new feature like DMA, ETM.

The new driver can return a opaque handle for each RMT channel.

An obvious transaction concept was also introduced.

TX and RX functionalities are splited out.
 2022-05-07 10:34:50 +00:00
morris
3f66660444 Merge branch 'feature/bringup_esp32c2eco1' into 'master' 
esp32c2：ECO1 ROM update

Closes IDF-4933

See merge request espressif/esp-idf!17723
 2022-05-06 18:06:26 +08:00
Simon
0b00831703 Merge branch 'bugfix/i2c_timeout_issue' into 'master' 
I2C: Patch for solving watchdog timeout issue

Closes IDFGH-6923, IDFGH-6463, and IDFGH-5558

See merge request espressif/esp-idf!17956
 2022-05-06 10:38:38 +08:00
Armando (Dou Yiwen)
76be0c2624 Merge branch 'bugfix/fix_esp32_mmu_init_issue' into 'master' 
mmu: add ll functions for mmu unmap

Closes OCD-526 and IDF-4962

See merge request espressif/esp-idf!17868
 2022-05-05 22:21:18 +08:00
wuzhenghui
17b3d139d5 hal: use systimer HAL IMPL in ESP32C2 ROM 2022-05-05 17:41:11 +08:00
Cao Sen Miao
9a9f10e4c9 I2C: patch for solving watchdog timeout issue 2022-05-05 14:36:49 +08:00
morris
9ab4abfb46 hw_support: move rtc_ctrl from driver to hw_support 2022-04-29 14:28:09 +08:00
Armando
b748a4fe5e mmu: improve vaddr range check 2022-04-27 11:35:07 +08:00
Armando
e09787d851 mmu: fix macro MMU_ENTRY_NUM and add new macro MMU_MAX_PADDR_PAGE_NUM 2022-04-27 11:35:07 +08:00
Cao Sen Miao
4418a855ba spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2 2022-04-26 15:22:37 +08:00