Commit Graph

348 Commits

Author SHA1 Message Date
Jiang Jiang Jian
d16797b447 Merge branch 'bugfix/further_fix_for_mspi_current_leakage_backport_v4.4' into 'release/v4.4'
system/sleep: further fix spi flash/ram current leakage(backport v4.4)

See merge request espressif/esp-idf!19212
2022-08-04 14:46:56 +08:00
jingli
236bd27134 further fix spi flash/ram current leakage
Currently, we pull up cs io for spi flash/ram to reduce current leakage during
light sleep. But some kind of spi flash/ram chip need all io pull up. Otherwise,
current leakage will still exist.
2022-07-28 13:11:55 +08:00
jingli
5f2855882b kconfig: fix kconfig help of power down flash 2022-07-28 13:10:55 +08:00
jingli
23d934429c esp_hw_support/sleep: fix cannot pd cpu and rc fast at the same time during light sleep
Since cpu retention dma use rc fast as clk source, so rc_fast_digi
will be enabled when we config to pd cpu. And cpu retention does not
need rc fast keep on during light sleep. So, if we use rc_fast_digi
to determine whether rc fast can be powered down, then cpu and and
rc fast cannot pd at the same time.
2022-07-28 11:24:40 +08:00
wanlei
92abac1fd8 psram: fixed heap pool reservation for DMA/internal usage fail issue
As heap block may be allocated into multiple non-continuous chunks, to
reserve enough memory for dma/internal usage, we do the malloc in the
step of max available block.
2022-07-28 10:12:17 +08:00
Marius Vikhammer
90e58c3721 docs: fix all doxygen warnings
Doxygen warnings would previously not result in a failed pipeline.
Fixed this as well as all current warnings.
2022-07-05 11:14:40 +08:00
Jiang Jiang Jian
1bd2e3f9df Merge branch 'feature/s3_ulp_support_v4.4' into 'release/v4.4'
ulp: Added ULP support for  esp32s3 (v4.4)

See merge request espressif/esp-idf!18621
2022-07-01 10:51:18 +08:00
Marius Vikhammer
3c358dd074 ulp: only enable relevant wakeup sources for ULP
Do not enable co-processor trap wakeup source when running ULP FSM, as this
could cause spurious wake-ups.
2022-06-29 11:57:05 +08:00
Michael (XIAO Xufeng)
c3c802d9b8 Revert "touch_sensor: forbid from using touch sensor with sleep on ESP32-S3"
This reverts commit a84faa3cef.
2022-06-27 14:33:09 +08:00
Sudeep Mohanty
b72f987c5c ulp: Added ULP RISC-V support for esp32s3
This commit adds support for ULP RISC-V for esp32s3.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2022-06-22 13:33:14 +08:00
KonstantinKondrashov
b0a15716ee esp_hw_support: Fix time spent in light sleep when RTC is used for gettimeofday
The esp_timer was not advanced correctly.
2022-06-20 16:17:00 +00:00
jingli
4cc873dfd9 improve flash power down logic 2022-06-20 11:32:20 +08:00
Jiang Jiang Jian
1133b0ef10 Merge branch 'bugfix/touch_wait_circle_after_wakeup_from_sleep_on_s3_v4.4' into 'release/v4.4'
touch: fix the touch sensor wait cycle on s3 (v4.4)

See merge request espressif/esp-idf!17424
2022-06-19 22:49:08 +08:00
Jiang Jiang Jian
469e2e540b Merge branch 'feature/adds_check_32k_xtal_stopped_v4.4' into 'release/v4.4'
esp_hw_support: Adds a msg when 32k xtal was stopped (v4.4)

See merge request espressif/esp-idf!18411
2022-06-19 22:41:20 +08:00
KonstantinKondrashov
871af8c5a5 esp_hw_support: Adds a msg when 32k xtal was stopped 2022-06-09 22:45:31 +08:00
Marius Vikhammer
957505136b spinlock: fixed spinlocks not working on S3 if placed in PSRAM
The compare and set instruction (S32C1I) cannot be used when
lock is not in internal memory.

Closes https://github.com/espressif/esp-idf/issues/9120
2022-06-09 10:39:19 +08:00
chaijie
2a1002b4a4 modify voltage param to fit all mode of S3 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng)
a2e1b6756e esp32s3: fixed dangerous power parameters in sleep modes 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng)
f46bd50884 pm: putting dbias and pd_cur code into same function 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng)
254870c3c4 rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
2022-06-05 02:33:50 +08:00
morris
0340c2f2bc Merge branch 'bugfix/keep_rtc8m_in_lightsleep_v4.4' into 'release/v4.4'
pm: fixed RTC8M domain power down issue when used as RTC source (v4.4)

See merge request espressif/esp-idf!18075
2022-05-30 09:54:39 +08:00
jingli
25c49588f9 esp_hw_‎support/sleep: ‎fix cannot lightsleep again after a wakeup from ULP
Since ulp wakeup signal are connected to ulp int raw(except esp32), we
need to clear ulp int raw before sleep when ulp wakeup enabled. Otherwise,
if the ulp int raw is already set, chip will not sleep properly.

Closes https://github.com/espressif/esp-idf/issues/6229
2022-05-19 23:13:42 +08:00
Michael (XIAO Xufeng)
ae6c52e9f9 Merge branch 'bugfix/fix_memory_miss_bug_v4.4' into 'release/v4.4'
esp32c3/esp32s3: Fix cpu crash bug when wakeup from lightsleep for memory data miss (backport v4.4)

See merge request espressif/esp-idf!17826
2022-05-19 13:47:20 +08:00
Jiang Jiang Jian
0bbdd67231 Merge branch 'bugfix/fix_s3_bbpll_calibrate_fail_bug_v4.4' into 'release/v4.4'
ESP32S3: fix bbpll calibrate fail bug in high temperature  (backport v4.4)

See merge request espressif/esp-idf!17896
2022-05-19 10:39:52 +08:00
chaijie
d222adbeeb solve memory error bug when in lightsleep mode 2022-05-18 17:43:13 +08:00
Michael (XIAO Xufeng)
e119d6cb06 pm: add powerdown for int_8m on ESP32-H2
Also move the xtal fpu logic to sleep_modes.c
2022-05-16 00:59:36 +08:00
Michael (XIAO Xufeng)
17b9cc6b4a pm: fixed RTC8M domain power issues
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
2022-05-12 15:57:09 +08:00
Jiang Jiang Jian
b6f4629e11 Merge branch 'bugfix/_rtc_slow_length_incorrectly_optimized_backport_v4.4' into 'release/v4.4'
sleep_power_domain: fix _rtc_slow_length being incorrectly optimized by compiler(backport v4.4)

See merge request espressif/esp-idf!17974
2022-05-03 15:04:09 +08:00
jingli
a2f141807f fix rtc mem load err(since the voltage of rtc regulator is too low) 2022-05-01 23:29:12 +08:00
jingli
74399f5b44 fix _rtc_slow_length being incorrectly optimized by compiler 2022-05-01 23:14:18 +08:00
chaijie
fe83802d65 fix c3 brownout bug after deepsleep 2022-04-28 18:23:28 +08:00
chaijie
a86cad6afe fix s3 bbpll calibrate fail bug in high temperature 2022-04-25 18:21:10 +08:00
Michael (XIAO Xufeng)
d378ca2b78 esp_phy: use spinlock to avoid regi2c access conflicts 2022-04-06 12:18:23 +08:00
Michael (XIAO Xufeng)
8522bb1178 regi2c: use safe version of spinlock, instead of ISR ver 2022-04-06 09:34:43 +08:00
Michael (XIAO Xufeng)
3503ee41ca sleep: fixed the issue error log not printed 2022-03-25 14:50:26 +08:00
Michael (XIAO Xufeng)
ea27a8543a touch_sensor: forbid from using touch sensor with sleep on ESP32-S3
This is not supported yet.
2022-03-25 14:50:26 +08:00
laokaiyao
19faa6ef43 touch: fix the touch sensor wait cycle on s3 2022-03-11 06:24:07 +00:00
Armando
32afe6a498 sleep: restore analog calibration registers after waking up from light sleep
Closes https://github.com/espressif/esp-idf/issues/8287
Closes https://github.com/espressif/esp-idf/issues/7921
2022-03-07 11:28:48 +08:00
morris
5f56bbd2d0 Merge branch 'bugfix/rtcio_increase_size_v4.4' into 'release/v4.4'
sleep: fixed ext1 cannot wakeup via RTCIO >= 18 issue (v4.4)

See merge request espressif/esp-idf!17201
2022-03-02 16:53:05 +08:00
Zim Kalinowski
000d3823bb Merge branch 'cumulative_backport_into_v4.4' into 'release/v4.4'
Cumulative backport MR (v4.4)

See merge request espressif/esp-idf!17194
2022-02-18 07:16:52 +00:00
Michael (XIAO Xufeng)
fd20ac807c sleep: fixed ext1 cannot wakeup via RTCIO >= 18 issue
Closes https://github.com/espressif/esp-idf/issues/8231
2022-02-18 11:44:20 +08:00
Marius Vikhammer
6664e6cf43 ds: update gen_digital_signature_tests.py to handle different max key sizes
Max key size is now decided by target parameter, and related parameters are
no longer hard coded.

Closes https://github.com/espressif/esp-idf/issues/8243


(cherry picked from commit 4a3f50faa0)
2022-02-17 11:24:54 +08:00
Cao Sen Miao
a74e06560b USB_SERIAL_JTAG: Fix the issue that there is no rom log when restarting 2022-02-15 18:56:06 +08:00
Michael (XIAO Xufeng)
c2c4b126f7 Merge branch 'feature/support_new_psram_v4.4' into 'release/v4.4'
psram: add ESP32-D0WD-R2-V3 support(backport v4.4)

See merge request espressif/esp-idf!16705
2022-02-13 14:13:38 +00:00
morris
42abd894d4 build: fix unused tag string
Closes https://github.com/espressif/esp-idf/issues/8250
2022-01-28 11:59:45 +08:00
Martin Vychodil
7d9652dccf System/Security: Memprot API unified (ESP32C3,ESP32S3)
Unified Memory protection API for all PMS-aware chips

Closes JIRA IDF-3849
2022-01-27 12:40:27 +08:00
Cao Sen Miao
e2ef65e117 psram: add ESP32-D0WD-R2-V3 support 2022-01-10 10:39:00 +08:00
Jakob Hasse
ee24264c75 feat (bootloader): added rng sampling
Set maximum RNG query frequency to save value known from tests
2022-01-03 16:24:41 +05:30
Armando
4a429d59ac adc: update adc calibration efuse version
ADC calibration scheme and algorithm are not changed. Only the eFuse bit BLOCK1_VERSION is changed. This MR updated the logic to recognize the adc efuse version
2021-12-13 13:03:23 +08:00
Jiang Jiang Jian
a89ff2677b Merge branch 'bugfix/fix_esp32h2_efuse_get_ext_mac_v4.4' into 'release/v4.4'
efuse_table_gen: Fixes wrong joining fields with omitted names (v4.4)

See merge request espressif/esp-idf!15735
2021-12-08 10:12:25 +00:00
Jiang Jiang Jian
67fcfc2e02 Merge branch 'feature/freertos_try_enter_critical_v4.4' into 'release/v4.4'
freertos: Add portTRY_ENTRY_CRITICAL() and deprecate legacy spinlock fucntions (v4.4)

See merge request espressif/esp-idf!16040
2021-12-08 10:10:17 +00:00
jingli
1d6c95000b reduce bootup time when using usb-serial-jtag 2021-12-03 20:50:22 +08:00
Darian Leung
c5efb55d43 freertos: Add portTRY_ENTRY_CRITICAL() and deprecate legacy spinlock fucntions
Add TRY_ENTRY_CRITICAL() API to all for timeouts when entering critical sections.
The following port API were added:
- portTRY_ENTER_CRITICAL()
- portTRY_ENTER_CRITICAL_ISR()
- portTRY_ENTER_CRITICAL_SAFE()

Deprecated legacy spinlock API in favor of spinlock.h. The following API were deprecated:
- vPortCPUInitializeMutex()
- vPortCPUAcquireMutex()
- vPortCPUAcquireMutexTimeout()
- vPortCPUReleaseMutex()

Other Changes:
- Added portMUX_INITIALIZE() to replace vPortCPUInitializeMutex()
- The assembly of the critical section functions ends up being about 50 instructions longer,
  thus the spinlock test pass threshold had to be increased to account for the extra runtime.

Closes https://github.com/espressif/esp-idf/issues/5301
2021-11-22 18:42:10 +08:00
Omar Chebib
2ca86a3eaf Sleep: fix wrong debug level
Fix usage of ESP_LOGD in sleep_modes.c which triggers a panic when
used in debug log level.

* Closes https://github.com/espressif/esp-idf/issues/7942
2021-11-22 16:32:21 +08:00
Li Shuai
e75762b02f sleep: deep sleep does not need cpu and wifi/bt mac retention 2021-11-12 19:38:32 +08:00
zhangwenxu
281598077a efuse: fix esp32h2 get ext_mac 2021-10-29 19:17:51 +08:00
Michael (XIAO Xufeng)
390f71cbcb Merge branch 'bugfix/add_support_for_mspi_to_work_with_cpu_clock_switch' into 'master'
mspi: make cpu clock source switch safe

Closes IDFCI-902

See merge request espressif/esp-idf!15557
2021-10-20 08:21:53 +00:00
Li Shuai
a939f7d34b light sleep: add software workaround for esp32s3 gpio reset issue 2021-10-20 11:36:22 +08:00
Li Shuai
62a4587e87 deep sleep: modified to support dual-core mode 2021-10-20 11:36:22 +08:00
Li Shuai
881e1b0fd5 deep sleep: add deep sleep support for esp32s3 2021-10-20 11:36:20 +08:00
Armando
c331c85318 mspi: make cpu clock source switch safe
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
2021-10-19 21:47:27 +08:00
wuzhenghui
5000aa877f fix rtc_clk_cal: Wait for timeout in a loop instead of just judge once 2021-10-19 12:07:34 +08:00
wuzhenghui
ab9df9945f fix stuck in rtc_clk_cal 2021-10-14 16:25:54 +08:00
Li Shuai
73829221f5 esp_hw_support: force power down wifi and bt power domain when rtc module init 2021-10-14 10:51:10 +08:00
Kevin (Lao Kaiyao)
a9faafee3c Merge branch 'feature/touch_sensor_driver_support_for_esp32s3' into 'master'
driver(touch): support touch sensor for esp32s3 platform

Closes IDF-1784 and IDF-3302

See merge request espressif/esp-idf!14102
2021-10-12 05:50:58 +00:00
Armando
16a91399f1 psram: put opiram_psram and spiram_psram in internal ram
External memory is accessed via SPI0. When modifying the SPI0 registers,
should put the code in internal RAM. Otherwise when there is an ongoing
SPI0 transaction, CPU changes the SPI0 registers. This is dangerous.
Besides, modifying SPI0 registers may lead external memory to an
unstable state. Therefore putting these code in internal RAM is
necessary.
2021-10-08 17:39:41 +08:00
Armando
7ff9332243 rtc: fix mspi timing issue when self-calibrate ocode
When doing OCode self-calibration in rtc_init.c, it will change the
system clock from PLL to XTAL, which is in a lower frequency, and MSPI
timing tuning is not needed. Therefore we should modify the timing
configurations accordingly, and set it back after the calibration.

This is a temporary fix
2021-10-08 15:59:57 +08:00
Armando
4cafdbd83b mspi: fix psram cs timing register setting not in iram bug 2021-10-08 15:59:57 +08:00
Armando
2655a506c9 mspi: support auto detect octal flash vendor 2021-10-08 15:59:57 +08:00
fuzhibo
057b9d61b5 driver(touch): support touch sensor for esp32s3 platform 2021-10-08 10:39:46 +08:00
Martin Vychodil
5344de34c3 System/Memprot: fixed voltage glitching detection logic
When the application is being debugged it should check the call result (esp_cpu_in_ocd_debug_mode())
is not given volt.glitch attack - so the result is triple-checked by ESP_FAULT_ASSERT macro. In case
the check fails, the system is reset immediately

IDF-4014
2021-10-04 09:21:07 +02:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master'
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
2021-09-27 04:02:29 +00:00
Jiang Jiang Jian
a015123a1d Merge branch 'feature/rename_apbctrl_to_syscon' into 'master'
rename apbctrl to syscon

See merge request espressif/esp-idf!14524
2021-09-16 12:58:07 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON
save
2021-09-16 20:57:57 +08:00
Armando (Dou Yiwen)
b9ea273e78 Merge branch 'feature/suppport_self_icode_calibration_on_s3' into 'master'
adc: support self calibration icode on s3

Closes IDF-3913

See merge request espressif/esp-idf!15195
2021-09-16 11:14:58 +00:00
Armando
ddd0235783 adc: support adc self-calibration on esp32s3 2021-09-16 15:17:29 +08:00
Li Shuai
b3e27403f3 esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep 2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22 Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep 2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-16 14:40:46 +08:00
Li Shuai
b59902f4d1 Merge branch 'bugfix/esp32s3_lightsleep_psram_leakage_current' into 'master'
fix SPIRAM leakage when its CS pin has no hardware pullup

See merge request espressif/esp-idf!14730
2021-09-16 04:07:58 +00:00
Li Shuai
c5b481c6da light sleep: fix Flash leakage when its CS pin has no hardware pullup 2021-09-15 20:34:18 +08:00
Li Shuai
af4f2075ac light sleep: fix SPIRAM leakage when its CS pin has no hardware pullup 2021-09-15 20:34:18 +08:00
Armando
ea10dacf68 mspi: add octal psram get_cs_io function 2021-09-15 20:34:18 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Anton Maklakov
c94b913ced Merge branch 'bugfix/esp32s3_chip_id' into 'master'
esp_hw_support: update esp32s3 chip ID to the MP version

See merge request espressif/esp-idf!15183
2021-09-14 09:09:38 +00:00
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
Ivan Grokhotkov
e21e5aac64 esp_hw_support: update esp32s3 chip ID to the MP version
- Update 7.2.5 chip ID (4) to 7.2.8 chip ID (9).
- Remove TODO in espcoredump regarding this mismatch.
2021-09-13 15:16:45 +02:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
baohongde
006a10b050 components/doc: Update doc about high-level interrupt
some bugfix.
2021-09-09 20:40:09 +08:00
Sachin Parekh
0e6b03f343 esp32s2/hmac: Release HMAC lock in downstream mode incase of failure 2021-09-06 11:21:39 +05:30
Sachin Parekh
fd5a7df404 esp32h2: Replicated HMAC JTAG downstream enable mode implementation 2021-09-06 11:06:50 +05:30
Sachin Parekh
fa2707f1f3 hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
2021-09-06 11:06:50 +05:30
Jiang Jiang Jian
316988bd2d Merge branch 'feature/support_esp32s3_cpu_tagmem_retention' into 'master'
support esp32s3 cpu + tagmem retention

See merge request espressif/esp-idf!14579
2021-09-06 03:47:44 +00:00
Sachin Billore
f80d6f8c21 Digital Signature support for S3
Closes IDF-1791
2021-09-02 11:59:24 +05:30
Marius Vikhammer
bdf3a8ff29 Merge branch 'feature/xtwdt' into 'master'
WDT: Add support for XTAL32K Watchdog timer

Closes IDF-2575

See merge request espressif/esp-idf!15000
2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
Armando (Dou Yiwen)
5f38b766a8 Merge branch 'feature/support_120mhz_quad_psram_quad_flash' into 'master'
mspi: support 120MHz clock freq on QSPI flash/psram on ESP32-S3

Closes IDF-3711

See merge request espressif/esp-idf!14849
2021-09-01 02:46:05 +00:00
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
Marius Vikhammer
2e0cab6f94 himem: reverse error check logic in himem 2021-08-31 08:46:27 +08:00
SalimTerryLi
55a5c444b5
rtc_io, esp_himem: replace XXX_CHECK with ESP_RETURN_ON_FALSE 2021-08-30 11:18:34 +08:00