alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

ulp: only enable relevant wakeup sources for ULP

Browse Source 
Do not enable co-processor trap wakeup source when running ULP FSM, as this
could cause spurious wake-ups.
This commit is contained in:
Marius Vikhammer 2022-06-22 10:20:39 +08:00
parent a0e3d488da
commit 3c358dd074
3 changed files with 10 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
components/esp_hw_support/sleep_modes.c
View File

@ -863,8 +863,13 @@ esp_err_t esp_sleep_enable_ulp_wakeup(void)
return ESP_ERR_INVALID_STATE;
#endif // CONFIG_ESP32_ULP_COPROC_ENABLED
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
s_config.wakeup_triggers |= (RTC_ULP_TRIG_EN | RTC_COCPU_TRIG_EN | RTC_COCPU_TRAP_TRIG_EN);
#if CONFIG_ESP32S2_ULP_COPROC_RISCV || CONFIG_ESP32S3_ULP_COPROC_RISCV
s_config.wakeup_triggers |= (RTC_COCPU_TRIG_EN | RTC_COCPU_TRAP_TRIG_EN);
return ESP_OK;
#else // ULP_FSM
s_config.wakeup_triggers |= (RTC_ULP_TRIG_EN);
return ESP_OK;
#endif //ESP32S2_ULP_COPROC_RISCV || ESP32S3_ULP_COPROC_RISCV
#else
return ESP_ERR_NOT_SUPPORTED;
#endif

6
examples/system/ulp_fsm/ulp/README.md
View File

@ -1,12 +1,12 @@
| Supported Targets | ESP32 | ESP32-S2 |
| ----------------- | ----- | -------- |
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- |
# ULP Pulse Counting Example
This example demonstrates how to program the ULP FSM coprocessor to count pulses on an IO while the main CPUs are either running some other code or are in deep sleep. See the README.md file in the upper level 'examples' directory for more information about examples.
ULP program written in assembly can be found across `ulp/pulse_cnt.S` and `ulp/wake_up.S` (demonstrating multiple ULP source files). The build system assembles and links this program, converts it into binary format, and embeds it into the .rodata section of the ESP-IDF application.
At runtime, the main code running on the ESP32 (found in main.c) loads ULP program into the `RTC_SLOW_MEM` memory region using `ulp_load_binary` function. Main code configures the ULP program by setting up values of some variables and then starts it using `ulp_run`. Once the ULP program is started, it runs periodically, with the period set by the main program. The main program enables ULP wakeup source and puts the chip into deep sleep mode.
When the ULP program finds an edge in the input signal, it performs debouncing and increments the variable maintaining the total edge count. Once the edge count reaches certain value (set by the main program), ULP triggers wake up from deep sleep. Note that the ULP program keeps running and monitoring the input signal even when the SoC is woken up.

2
examples/system/ulp_riscv/gpio/example_test.py
View File

@ -8,7 +8,7 @@ import ttfw_idf
from tiny_test_fw import DUT
@ttfw_idf.idf_example_test(env_tag='deepsleep_temp_tag', target=['esp32s2', 'esp32s3'])
@ttfw_idf.idf_example_test(env_tag='Example_GENERIC', target=['esp32s2', 'esp32s3'])
def test_examples_ulp_riscv(env, extra_data): # type: (tiny_test_fw.Env.Env, None) -> None # pylint: disable=unused-argument
dut = env.get_dut('ulp_riscv', 'examples/system/ulp_riscv/gpio')
dut.start_app()