morris
2a50dd8a8f
mcpwm: default clock cource is PLL160M
...
On esp32, the default clock source is also PLL160M
2022-10-21 07:37:36 +00:00
chenjianhua
84bcd1d1f0
soc: remove soc ble config from Kconfig
2022-10-09 17:07:53 +08:00
chenjianhua
f96e38a70d
Revert "Fixed ESP32 BLE can't resolve the peer address when enable white list"
...
This reverts commit 1cc0f6aac5
.
2022-10-09 17:07:53 +08:00
morris
5d58c10c3e
rgb_lcd: support yuv converter
2022-09-27 14:32:04 +08:00
Jiang Jiang Jian
b9495f85cf
Merge branch 'bugfix/fix_c2_xtal_unstable_when_wakeup_from_sleep_backport_v5.0' into 'release/v5.0'
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esp_hw_support/esp32c2/rtc: fix c2 xtal unstable when wakeup from sleep(backport v5.0)
See merge request espressif/esp-idf!20273
2022-09-21 22:38:24 +08:00
jingli
9fa4bb272e
esp_hw_support/clk_cali: fix xtal32k error detect
2022-09-21 16:21:11 +08:00
jingli
b8b7a0d8dd
esp_hw_support/esp32c2/rtc: take a safer xtal buf wait
2022-09-21 14:16:34 +08:00
Jiang Jiang Jian
3c3a68513c
Merge branch 'feature/add_mesh_support_macro_v5.0' into 'release/v5.0'
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ble_mesh: docs: Remove BLE Mesh related reference for C2(v5.0)
See merge request espressif/esp-idf!20097
2022-09-20 16:04:27 +08:00
wangjialiang
ddc294c79f
ble_mesh: docs: Remove BLE Mesh related reference for C2
2022-09-19 21:11:17 +08:00
morris
70ee85d38b
mcpwm: check sync direction is valid
2022-09-15 19:07:31 +08:00
wanlei
3cc3455ca6
spi_master:fix error when use spi_bus_add_device
more than 3 device
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update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal
Closes https://github.com/espressif/esp-idf/issues/8876
2022-09-09 15:57:13 +08:00
Armando
29ae238845
mmu: driver framework, for vaddr maintenance
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This commit gives basic mmu driver framework. Now it is able to maintain
mmu virtual address usage on esp32, esp32s2 and esp32s3. Usage to
external virtual address should rely on mmu functions to know which
address range is available, instead of hardcoded.
This commit also improves psram memory that is added to the heap
allocator. Now it's added to the heap, according to the memory
alignment.
Closes https://github.com/espressif/esp-idf/issues/8295
Closes https://github.com/espressif/esp-idf/issues/9193
2022-08-27 16:05:51 +08:00
Sachin Parekh
ca19d23952
esp32s3: Update world controller headers
2022-08-26 09:35:43 +05:30
Michael (XIAO Xufeng)
69be7c4cc2
Merge branch 'feat/support_esp32c2_uart_v5.0' into 'release/v5.0'
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uart: update console docs about frequency for ESP32-C2, move frequency of clock sources out of HAL (v5.0)
See merge request espressif/esp-idf!19690
2022-08-25 02:03:26 +08:00
Michael (XIAO Xufeng)
4a68f9e064
Merge branch 'feature/support_7.2.9_soc/pvt_dig_v5.0' into 'release/v5.0'
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ESP32C2:support auto adjust LDO voltage based on pvt-dig(backport 5.0)
See merge request espressif/esp-idf!19628
2022-08-23 09:30:06 +08:00
Jiang Jiang Jian
b84f9dd5cc
Merge branch 'bugfix/fix_c2_rtc_ldo_too_low_bug_v5.0' into 'release/v5.0'
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ESP32C2: Fix system not stable bug when rtc voltage too low (backport v5.0)
See merge request espressif/esp-idf!19599
2022-08-22 19:48:36 +08:00
Michael (XIAO Xufeng)
6ed15178b6
uart: move frequency of clock sources out of HAL
2022-08-22 14:28:12 +08:00
Geng Yuchao
5524c772e6
Fix soc caps define for all chips
2022-08-18 16:27:06 +08:00
Erhan Kurubas
fdc839494f
esp32s3: fix interrupt names used by SystemView
2022-08-17 12:48:37 +02:00
Erhan Kurubas
bf622042b7
replace CAN with TWAI in the esp_isr_names table
2022-08-17 12:32:43 +02:00
zlq
3dc89437cc
support auto adjust LDO voltage based on pvt-dig
2022-08-17 17:25:59 +08:00
cje
7243032123
set fosc div to 1 to make chip run stablly for C2
2022-08-17 10:58:14 +08:00
Sudeep Mohanty
56c78fbbf7
rtci2c: Corrected the register base addr reference for RTC I2C on esp32s3
...
This commit corrects the register base address reference for RTC I2C on
esp32s3.
2022-08-15 14:50:04 +02:00
jingli
8cd7c30bc7
kconfig: refactor xtal freq kconfig to common configuration item
2022-08-08 13:53:02 +08:00
Wan Lei
1265a2db9d
Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master'
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Fix check_public_headers violations for soc component
Closes IDF-5397
See merge request espressif/esp-idf!19158
2022-08-01 10:14:04 +08:00
wuzhenghui
7cb9304b65
Clean IRAM and DRAM address space conversion macros
2022-07-29 17:07:39 +08:00
wanlei
bb5a95f1aa
soc: fix register header files not self-contain
2022-07-29 11:18:06 +08:00
wuzhenghui
31183270fb
bugfix: fix SOC_ROM_STACK_START defines
2022-07-29 10:51:47 +08:00
wuzhenghui
21a4eda4d4
Use the entire sharedbuffer space as the heap of the D/IRAM attribute
2022-07-29 10:51:47 +08:00
morris
d94432fea8
systimer: refactor hal to accomodate more xtal choices
2022-07-25 16:08:52 +08:00
morris
c4e84751a5
driver: fix public header exceptions for driver
2022-07-22 00:12:36 +00:00
morris
741b031e83
soc: added SOC_TOUCH_SENSE_SUPPORTED macro
2022-07-22 00:12:36 +00:00
laokaiyao
edee3ee3cd
i2s: add slot sequence table
...
Closes: https://github.com/espressif/esp-idf/issues/9208
When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
2022-07-21 15:52:39 +08:00
laokaiyao
90866e99fb
i2s: add basic examples for STD/TDM/PDM mode
2022-07-21 15:52:39 +08:00
morris
4154eaec93
sdm: clean up soc/hal/ll code
2022-07-20 14:59:50 +08:00
morris
bec44ca2e9
gptimer: test on c2 with xtal 26mhz
2022-07-20 04:40:28 +00:00
Song Ruo Jing
4734b1433b
Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master'
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gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report
Closes IDF-4901
See merge request espressif/esp-idf!18805
2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen)
9f6f61345b
Merge branch 'feature/adc_driver_ng' into 'master'
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ADC Driver NG
Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979
See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5
I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2
2022-07-19 11:41:42 +08:00
Armando
5b523a3313
esp_adc: new esp_adc component and adc drivers
2022-07-15 18:31:00 +08:00
songruojing
145454356b
gpio: Fix ESP32S3 GPIO48 does not support hold function bug
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GPIO_HOLD_MASK array was missing the last item
Add __Static_assert to check array sizes for all gpio_periph.c files to prevent same mistake in the future.
2022-07-15 16:51:25 +08:00
Jiang Jiang Jian
b610b47a83
Merge branch 'feature/esp32s3_memprot_additional_improvements' into 'master'
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[System/Security] Memprot after-merge improvements (v5.0)
Closes IDF-5263 and IDF-5208
See merge request espressif/esp-idf!18893
2022-07-13 15:48:20 +08:00
Jiang Jiang Jian
3630713e5f
Merge branch 'docs/esp32c2_sys_feature_api_guides' into 'master'
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docs: update system API-guides for ESP32-C2
Closes IDF-4202, IDF-4213, and IDF-4222
See merge request espressif/esp-idf!18979
2022-07-12 10:59:12 +08:00
Marius Vikhammer
d62421619c
docs: update system API-guides for ESP32-C2
2022-07-12 09:32:43 +08:00
Song Ruo Jing
ea97cc93ea
Merge branch 'feature/c2_systimer_26mhz' into 'master'
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esp32c2: 26 MHz XTAL support: Kconfig option, systimer support
Closes IDF-5412 and IDF-5413
See merge request espressif/esp-idf!18835
2022-07-11 16:17:25 +08:00
songruojing
b3d8db3ae2
bootloader, esp_system: esp32c2 console uart to support 26MHz xtal
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Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
2022-07-11 12:24:58 +08:00
songruojing
ef813b23fa
rtc: esp32c2 support 26MHz xtal in startup code and rtc_clk.c
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
2e37218ce5
soc, hal: remove XTAL_CLK_FREQ
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XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4
esp_timer, hal: add support for non-integer systimer frequency
...
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:
1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.
For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.
This introduced two possible issues:
1. Overflow when multiplying systimer counter by 5
- Should not be an issue, since systimer counter is 52-bit, so
counter * 5 is no more than 55-bit.
2. The code needs to perform:
- divide by 5: when converting from microseconds to ticks
- divide by 52: when converting from ticks to microseconds
The latter potentially introduces a performance issue for the
esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Martin Vychodil
0c87ae2a91
System/Security: Memprot API unified (ESP32S3)
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Added missing features and improvements
2022-07-09 22:57:51 +02:00
Jiang Jiang Jian
a7bf3af687
Merge branch 'bugfix/reset_ble_hw_on_inititalization' into 'master'
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component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
Closes BT-2402
See merge request espressif/esp-idf!18831
2022-07-08 16:21:41 +08:00
morris
75bd6fc2d9
Merge branch 'contrib/github_pr_9302' into 'master'
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ESP32S3 USB external PHY pinout (GitHub PR)
Closes IDFGH-7761
See merge request espressif/esp-idf!18909
2022-07-07 16:17:26 +08:00
morris
b0e228f756
soc: update copyright for usb phy pins
2022-07-07 11:50:06 +08:00
Michael (XIAO Xufeng)
a58362a429
Merge branch 'feature/efuse_rev_major_minor' into 'master'
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efuse: Adds major and minor versions
See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f
Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
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support c2 26M/32M xtal for bbpll
Closes IDF-5485
See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
lsita
9ceff23c6d
USB external PHY pinout set as in Reference Manual Figure 29-3.
2022-07-06 14:54:35 +02:00
wangmengyang
f86efb2bc2
fix licence copyright for header file syscon_reg.h on ESP32C3 and ESP32S3
2022-07-06 16:24:03 +08:00
wangmengyang
1d55f12c2d
component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
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1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
2022-07-06 16:23:48 +08:00
morris
627b171a3c
Merge branch 'feature/enable_rpa_modem_reset_function_in_esp32h2' into 'master'
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Enable rpa_moudle reset function
See merge request espressif/esp-idf!18891
2022-07-06 14:47:37 +08:00
GengYuchao
d145c337e0
Enable rpa_moudle reset function
2022-07-05 20:50:31 +08:00
cje
e16165f263
support c2 26M/32M xtal for bbpll
2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
Jakob Hasse
f8b5ed5d6c
refactor (soc, esp_rom)!: removed target-specific ROM dependencies
2022-07-05 13:57:58 +08:00
morris
7863c1bc45
Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
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Bugfix/fix rtc freq err for h2 beta1
See merge request espressif/esp-idf!18682
2022-07-04 16:46:17 +08:00
Omar Chebib
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
GengYuchao
10fd1daa10
Add ETM clk gate defines for h2
2022-06-30 17:02:00 +08:00
Armando (Dou Yiwen)
e13d7f8351
Merge branch 'bugfix/s2_ap64_psram_crash_issue' into 'master'
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psram: fix esp32s2 module with APS6404 PSRAM crash issue
Closes IDF-5361
See merge request espressif/esp-idf!18699
2022-06-29 11:19:17 +08:00
Armando
31b3f31ef4
ext_mem: make memory region check strict
2022-06-28 14:17:44 +08:00
morris
7fd9a91034
dma: move from driver to hw_support
2022-06-28 14:17:12 +08:00
Mahavir Jain
c619e2162d
Merge branch 'feature/memprot_settings_to_soc_caps' into 'master'
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esp_system: move MEMPROT related configuration to soc capability header
Closes IDF-4506
See merge request espressif/esp-idf!18645
2022-06-24 18:08:19 +08:00
Mahavir Jain
dd24639215
Merge branch 'esp32h2/enable_ecc_accelerator' into 'master'
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esp32h2: Enable ECC accelerator
Closes IDF-3397
See merge request espressif/esp-idf!18647
2022-06-23 20:06:26 +08:00
Cao Sen Miao
3a820462ac
temperature_sensor: Add temperature sensor support for ESP32-C2
2022-06-23 15:36:43 +08:00
Sachin Parekh
6cfc9c365f
esp32h2: Enable ECC accelerator
2022-06-23 12:59:13 +05:30
Marius Vikhammer
7e60e07a0a
Merge branch 'feature/esp8684_sha' into 'master'
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mbedtls: enable hw support for SHA on C2
Closes IDF-3830 and IDF-5141
See merge request espressif/esp-idf!18531
2022-06-23 14:18:49 +08:00
Mahavir Jain
0a12eab32e
esp_system: move MEMPROT related configuration to soc capability header
...
Closes IDF-4506
2022-06-23 10:29:42 +05:30
Marius Vikhammer
f4c79687f8
SHA: added hardware support for SHA on C2.
2022-06-23 11:01:16 +08:00
Zim Kalinowski
136c873364
Merge branch 'refactor/g0_for_xtensa' into 'master'
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G0: Support Xtensa targets for G0-only compilation
Closes IDF-3087
See merge request espressif/esp-idf!18538
2022-06-23 07:28:37 +08:00
muhaidong
96f86e0bb4
esp_wifi: esp32c2 does not support wifi mesh
2022-06-21 16:48:52 +08:00
muhaidong
b48b9beace
esp_wifi: esp32c2 does not support csi.
2022-06-20 21:47:51 +08:00
muhaidong
9a25d06b5f
esp_wifi: esp32s2 esp32c3 and esp32s3 support ftm
2022-06-20 21:47:51 +08:00
morris
865937fba3
Merge branch 'bugfix/fix_esp32c2_dose_not_support_wapi' into 'master'
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esp_wifi: esp32c2 does not support wapi
Closes IDF-4216
See merge request espressif/esp-idf!18573
2022-06-20 21:31:54 +08:00
muhaidong
2ccce0ca41
esp_wifi: update comments of WI-FI CAPS in soc_caps.h
2022-06-20 19:43:16 +08:00
Omar Chebib
8fae0f0753
G0: Support Xtensa targets for G0-only compilation
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G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Martin Vychodil
692b9980b5
Merge branch 'feature/memprot_api_unified_s3_2' into 'master'
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System/Security: Memprot API unified (ESP32S3)
See merge request espressif/esp-idf!16169
2022-06-20 17:34:22 +08:00
muhaidong
6ca2804107
esp_wifi: esp32c2 does not support wapi.
2022-06-20 11:42:12 +08:00
Martin Vychodil
339fcbf14d
System/Security: Memprot API unified (ESP32S3)
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Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
Ivan Grokhotkov
3973db7664
soc: make register access macros compatible with C++20
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In C++20, using the result of an assignment to a 'volatile' value is
deprecated.
Breaking change: register "setter" or modification macros can no
longer be used as expressions.
Closes https://github.com/espressif/esp-idf/issues/9170
2022-06-17 18:09:22 +02:00
morris
381b4cb26f
Merge branch 'bugfix/undefined_dport_lvl_def' into 'master'
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soc(esp32): Expose SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL for all ECO versions
Closes IDFGH-7606
See merge request espressif/esp-idf!18520
2022-06-16 15:00:24 +08:00
Omar Chebib
752026a174
Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
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G0: RISC-V targets have now an independent G0 layer
See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
KonstantinKondrashov
f428a241c6
soc(esp32): Expose SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL for all ECO versions
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It fixes a build issue when ESP32_ECO3_CACHE_LOCK_FIX=y
Closes https://github.com/espressif/esp-idf/issues/9160
2022-06-15 17:42:21 +08:00
laokaiyao
28b8fc6a7e
i2s: update documents for driver-NG
2022-06-15 10:30:04 +08:00
Darian
e213e66ba3
Merge branch 'refactor/esp_hw_support_cpu' into 'master'
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esp_hw_support: Add new esp_cpu.h abstraction
Closes IDF-4769
See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
morris
919344547b
Merge branch 'bugfix/rmt_register_file_s3' into 'master'
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rmt: update register file after fixing csv of RMT peripheral (esp32s2/s3)
Closes IDFGH-7537
See merge request espressif/esp-idf!18392
2022-06-14 18:24:28 +08:00
Michael (XIAO Xufeng)
7b8e5888ca
Merge branch 'refactor/add_clk_tree_ll' into 'master'
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clk_tree: Stage3 - HAL for clock subsystem
Closes IDF-4334
See merge request espressif/esp-idf!18270
2022-06-14 17:16:29 +08:00
Omar Chebib
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
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G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b
esp_hw_support: Add esp_cpu.h abstraction and API
...
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:
- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)
Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Konstantin Kondrashov
7d942e0a5d
Merge branch 'feature/efuse_rst_is_treated_as_poweron_rst' into 'master'
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reset_reasons: EFUSE_RST is treated as POWERON_RST + checks errors of eFuse BLOCK0
Closes IDF-3702
See merge request espressif/esp-idf!14742
2022-06-13 21:26:13 +08:00
songruojing
c8752cee6a
clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem
2022-06-13 17:47:50 +08:00
morris
4094f13fd3
rmt: fix error in rmt register file
...
Closes https://github.com/espressif/esp-idf/issues/9100
2022-06-10 18:38:42 +08:00
morris
5daa73d236
Merge branch 'refactor/mcpwm_hal_driver_doc' into 'master'
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mcpwm: don't support disable carrier one-shot pulse
Closes IDFGH-7406
See merge request espressif/esp-idf!18295
2022-06-10 10:28:59 +08:00