1576 Commits

Author SHA1 Message Date
Wu Zheng Hui
5a682c3bbb Merge branch 'feature/optimize_chips_active_power' into 'master'
feat(system): Optimize the power consumption of esp32h2 and esp32c6 in the active state

Closes IDF-5658

See merge request espressif/esp-idf!27798
2024-03-14 12:08:33 +08:00
morris
79d8057a8c Merge branch 'feat/rmt_support_esp32c5' into 'master'
Basic RMT driver support on esp32c5

See merge request espressif/esp-idf!29215
2024-03-14 11:52:01 +08:00
Jiang Jiang Jian
6a879bf2d2 Merge branch 'bugfix/fix_maximum_value_of_config_rtc_clk_cal_cycles_bug' into 'master'
ESP All Chip: fixed the maximum value of config RTC_CLK_CAL_SYCLES bug

See merge request espressif/esp-idf!29423
2024-03-14 10:44:17 +08:00
Wu Zheng Hui
bb25cc1234 Merge branch 'feature/esp32p4_sleep_support' into 'master'
feat(esp_hw_support): esp32p4 sleep support (Stage 1: support basic pmu sleep function 💤)

Closes IDF-7528 and IDF-7527

See merge request espressif/esp-idf!28196
2024-03-14 10:17:32 +08:00
harshal.patil
e8268d8b6b
feat(hal/aes): use RCC atomic block to enable/reset the AES peripheral 2024-03-13 15:22:07 +05:30
morris
9b8fd65221 feat(rmt): basic driver support on esp32c5 2024-03-13 17:37:47 +08:00
wuzhenghui
0fc97f0e84
feat(gpio): support LP_IO clock gating management 2024-03-13 11:56:14 +08:00
Mahavir Jain
2b17acb4b0 Merge branch 'bugfix/memprot_cleanup' into 'master'
fix: cleanup memprot files for C6/H2/P4

See merge request espressif/esp-idf!29556
2024-03-13 11:12:52 +08:00
Konstantin Kondrashov
3f89072af1 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
Michael (XIAO Xufeng)
4ee54026e3 Merge branch 'bugfix/fix_fastmem_slowmem_lost_data_bug' into 'master'
[C3/S3]Fix sleep fast_mem & slow_mem may lost bug

See merge request espressif/esp-idf!27571
2024-03-12 11:32:00 +08:00
wuzhenghui
9e8e20227f
feat(system): disable RNG module clock by default for save power 2024-03-12 10:10:41 +08:00
Mahavir Jain
fd6c710b27
fix: cleanup memprot files for C6/H2/P4
There is no separate permission control peripheral in C6/H2/P4.
Memory protection is achieved using built-in PMA/PMP and hence
removing permission control specific files.
2024-03-11 17:10:40 +05:30
wuzhenghui
174386f133 ci: enable lightsleep related tests 2024-03-10 10:51:28 +08:00
wuzhenghui
129bfce02e feat(esp_hw_support): support esp32p4 pll start/stop event callback 2024-03-10 10:51:28 +08:00
wuzhenghui
65e9d0ddb9 feat(esp_hw_support): add esp32p4 sleep initial support 2024-03-10 10:51:28 +08:00
wuzhenghui
856f043331 feat(esp_hw_support): add esp32p4 pmu initial support 2024-03-10 10:51:28 +08:00
morris
c952cfb673 feat(gpio): reserve gpio output atomically 2024-03-09 10:33:58 +08:00
wuzhenghui
85b246ac88
feat(system): gate the debug clock source by default for esp32c6 and esp32h2 2024-03-07 19:26:39 +08:00
wuzhenghui
f5707c6ab8
feat(system): gate the REF_TICK clock by default for esp32c6 and esp32h2 2024-03-07 19:26:38 +08:00
Omar Chebib
eeb5e2f080 Merge branch 'refactor/cpu_interrupt_table' into 'master'
refactor(Core System/Interrupts): changed reserved interrupt functions to be now defined per SoC

Closes IDF-5728

See merge request espressif/esp-idf!29020
2024-03-06 11:26:17 +08:00
hongshuqing
d78805670a fix: fix_maximum_value_of_config_rtc_clk_cal_cycle_bug 2024-03-05 19:33:30 +08:00
Wan Lei
3459db1bbb Merge branch 'feat/c6lite_c61_introduce_step1_target' into 'master'
feat(esp32c61): introduce target esp32c61 (1/8) 🌱

See merge request espressif/esp-idf!29238
2024-03-05 11:36:17 +08:00
C.S.M
0f03434119 Merge branch 'feature/tsens_etm' into 'master'
feature(temperature sensor): Temperature sensor ETM support.

Closes IDF-6357

See merge request espressif/esp-idf!28880
2024-03-05 10:09:25 +08:00
Aditya Patwardhan
acb733845f Merge branch 'bugfix/update_disabling_hmac_jtag_method' into 'master'
fix(esp_hw_support): update hmac toggle method due to discrepency in ROM code

See merge request espressif/esp-idf!29131
2024-03-04 17:55:59 +08:00
wanlei
ee02b71f1c feat(esp32c61): introduce target esp32c61 2024-03-01 21:12:25 +08:00
Cao Sen Miao
2b2b3be98f feat(temperature_sensor): Add new support for temperature sensor ETM on ESP32C6/H2 2024-03-01 18:52:39 +08:00
Sudeep Mohanty
e4f167df25 Merge branch 'fix/freertos_optimize_critical_sections' into 'master'
fix(riscv): Updated RISC-V functions to set interrupt threshold for CLIC targets

Closes IDFCI-2033, IDFCI-2034, IDF-8090, and IDF-8117

See merge request espressif/esp-idf!29055
2024-03-01 17:51:14 +08:00
Kevin (Lao Kaiyao)
31437c34a9 Merge branch 'refactor/support_esp32c5_beta3_mp_coexistence' into 'master'
refactor(esp32c5): support esp32c5 beta3 & mp coexistence

See merge request espressif/esp-idf!29248
2024-03-01 15:50:05 +08:00
Armando (Dou Yiwen)
7b414002f6 Merge branch 'change/psram_200m_update' into 'master'
change(psram): update voltage configurations

See merge request espressif/esp-idf!28933
2024-03-01 15:17:24 +08:00
laokaiyao
1b91e84544 feat(esp32c5): add esp32c5 mp target 2024-03-01 10:13:45 +08:00
Mahavir Jain
e18fd01d0d Merge branch 'fix/pmp_idcache_reg_prot' into 'master'
fix(esp_hw_support): Fix the I/DCACHE region PMP protection

See merge request espressif/esp-idf!28525
2024-02-29 21:39:11 +08:00
Mahavir Jain
7adbc9cf4b Merge branch 'fix/fix_key_manager_clock_changes' into 'master'
fix(hal): Fix Key Manager clock changes

See merge request espressif/esp-idf!28890
2024-02-29 21:38:18 +08:00
nilesh.kale
152f172367 fix(esp_hw_support): update hmac toggle method due to discrepency in ROM code
Need to update the HMAC enable/disable method due to discrepancy in ROM code
across different targets for the esp_hmac_disable() API.
2024-02-29 12:01:09 +05:30
gaoxu
f9109beda2 feat(uart): add HP/LP uart support on ESP32C5 2024-02-29 14:12:51 +08:00
Aditya Patwardhan
4636ef946b fix(esp_hw_support): Update key manager locking mechanism 2024-02-29 12:00:30 +08:00
Aditya Patwardhan
3ffb811d18 fix(hal): Fix Key Manager clock changes 2024-02-29 12:00:30 +08:00
Armando
62440e5b12 change(psram): update voltage configurations 2024-02-29 10:42:37 +08:00
Sudeep Mohanty
459ff8348f fix(riscv): Added RISC-V functions to set interrupt threshold for CLIC targets
This commit added the RISC-V utility functions to set the interrupt
threshold for CLIC targets by using direct register value writes.
This makes the functions more efficient during run-time.
This is done to improve the critical section enter and exit performance on esp32p4.
2024-02-28 08:51:37 +01:00
Omar Chebib
c1849df791 refactor(esp_hw_support): changed reserved interrupt functions to be now defined per SoC 2024-02-28 15:21:10 +08:00
Laukik Hase
366e4ee944
refactor(esp_hw_support): Remove redundant PMP entry for ROM region
- The ROM text and data sections share the address range
    (see SOC_I/DROM_MASK_LOW - SOC_I/DROM_MASK_HIGH).
  - Initially, we had two PMP entries for this address range - one marking the
    region as RX and the other as R.
  - However, the latter entry is redundant as the former locks the PMP settings.
  - We can divide the ROM region into text and data sections later when we
    define boundaries marking these regions from the ROM.
2024-02-28 10:54:38 +05:30
Laukik Hase
ff839be31d
fix(esp_hw_support): Fix the I/DCACHE region PMP protection 2024-02-28 10:54:37 +05:30
Song Ruo Jing
98d9f04b00 feat(gdma): add GDMA support for ESP32C5 2024-02-28 12:38:02 +08:00
Wu Zheng Hui
f3b95059f9 Merge branch 'bugfix/fix_sleep_cache_safe_assertion' into 'master'
fix(esp_hw_support): fix cache safe check function

See merge request espressif/esp-idf!29246
2024-02-28 10:50:52 +08:00
morris
f0342d6b59 feat(dw_gdma): support change link list item connection
by dw_gdma_lli_set_next
2024-02-27 17:49:04 +08:00
wuzhenghui
4e731e8612 fix(esp_hw_support): fix cache safe check function 2024-02-27 17:29:24 +08:00
Jiang Jiang Jian
c7a02cbe55 Merge branch 'c6_auto_dbias_master_hsq' into 'master'
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage

See merge request espressif/esp-idf!27696
2024-02-22 19:12:28 +08:00
KonstantinKondrashov
eeeebdf1cd fix(esp_hw_support): Fix esp_intr_free when taks has no core affinity
Closes https://github.com/espressif/esp-idf/issues/12608
2024-02-21 14:54:32 +08:00
fl0wl0w
90d1dcfd76 feat(freertos): Introduced new Kconfig option CONFIG_FREERTOS_NUMBER_OF_CORES
This commit replaces the use of portNUM_PROCESSORS and configNUM_CORES
macros in all of ESP-IDF. These macros are needed to realize an SMP
scenario by fetching the number of active cores FreeRTOS is running on.
Instead, a new Kconfig option, CONFIG_FREERTOS_NUMBER_OF_CORES, has been
added as a proxy for the FreeRTOS config option, configNUMBER_OF_CORES.
This new commit is now used to realize an SMP scenario in various places
in ESP-IDF.

[Sudeep Mohanty: Added new Kconfig option CONFIG_FREERTOS_NUMBER_OF_CORES]

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2024-02-09 09:11:28 +01:00
Song Ruo Jing
d556fee5c4 Merge branch 'feature/esp32c5_clock_preliminary_support' into 'master'
Feature/esp32c5 clock preliminary support

See merge request espressif/esp-idf!28808
2024-02-08 11:54:35 +08:00
chaijie@espressif.com
17ac4cd909 fix: fix sleep fast_mem & slow_mem may lost bug 2024-02-07 18:06:04 +08:00