feat(esp32c61): introduce target esp32c61

This commit is contained in:
wanlei 2024-02-26 11:29:46 +08:00
parent e4f167df25
commit ee02b71f1c
31 changed files with 53 additions and 17 deletions

View File

@ -151,6 +151,13 @@ mainmenu "Espressif IoT Development Framework Configuration"
select FREERTOS_UNICORE
select IDF_TARGET_ARCH_RISCV
config IDF_TARGET_ESP32C61
bool
default "y" if IDF_TARGET="esp32c61"
select FREERTOS_UNICORE
select IDF_TARGET_ARCH_RISCV
select IDF_ENV_FPGA
config IDF_TARGET_LINUX
bool
default "y" if IDF_TARGET="linux"
@ -167,6 +174,7 @@ mainmenu "Espressif IoT Development Framework Configuration"
default 0x0012 if IDF_TARGET_ESP32P4
default 0x0011 if IDF_TARGET_ESP32C5 && IDF_TARGET_ESP32C5_BETA3_VERSION # TODO: IDF-9197
default 0x0017 if IDF_TARGET_ESP32C5 && IDF_TARGET_ESP32C5_MP_VERSION # TODO: IDF-9197
default 0x0014 if IDF_TARGET_ESP32C61
default 0xFFFF

View File

@ -4,16 +4,17 @@ if(CONFIG_SOC_UART_SUPPORTED)
list(APPEND srcs "src/uart.c")
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
PRIV_REQUIRES esp_pm esp_driver_gpio esp_ringbuf
LDFRAGMENTS "linker.lf"
)
idf_component_register(
SRCS ${srcs}
INCLUDE_DIRS ${public_include}
PRIV_REQUIRES esp_pm esp_driver_gpio esp_ringbuf
LDFRAGMENTS "linker.lf"
)
if(CONFIG_VFS_SUPPORT_IO)
target_link_libraries(${COMPONENT_LIB} PUBLIC idf::vfs)
target_sources(${COMPONENT_LIB} PRIVATE "src/uart_vfs.c")
if(CONFIG_ESP_CONSOLE_UART)
target_link_libraries(${COMPONENT_LIB} INTERFACE "-u uart_vfs_include_dev_init")
endif()
if(CONFIG_VFS_SUPPORT_IO AND CONFIG_SOC_UART_SUPPORTED)
target_link_libraries(${COMPONENT_LIB} PUBLIC idf::vfs)
target_sources(${COMPONENT_LIB} PRIVATE "src/uart_vfs.c")
if(CONFIG_ESP_CONSOLE_UART)
target_link_libraries(${COMPONENT_LIB} INTERFACE "-u uart_vfs_include_dev_init")
endif()
endif()

View File

@ -33,6 +33,7 @@ typedef enum {
CHIP_ESP32C5 = 23, //!< ESP32-C5 MP
#endif
CHIP_ESP32P4 = 18, //!< ESP32-P4
CHIP_ESP32C61= 20, //!< ESP32-C61
CHIP_POSIX_LINUX = 999, //!< The code is running on POSIX/Linux simulator
} esp_chip_model_t;

View File

View File

View File

View File

View File

View File

@ -35,6 +35,7 @@ USUAL_TO_FORMAL = {
'esp32c5': 'ESP32-C5',
'esp32h2': 'ESP32-H2',
'esp32p4': 'ESP32-P4',
'esp32c61': 'ESP32-C61',
'linux': 'Linux',
}
@ -48,6 +49,7 @@ FORMAL_TO_USUAL = {
'ESP32-C5': 'esp32c5',
'ESP32-H2': 'esp32h2',
'ESP32-P4': 'esp32p4',
'ESP32-C61': 'esp32c61',
'Linux': 'linux',
}

View File

@ -15,6 +15,8 @@ function(__add_dfu_targets)
return()
elseif("${target}" STREQUAL "esp32c6")
return()
elseif("${target}" STREQUAL "esp32c61")
return()
elseif("${target}" STREQUAL "esp32c5")
return()
elseif("${target}" STREQUAL "esp32h2")

View File

@ -0,0 +1,18 @@
include($ENV{IDF_PATH}/tools/cmake/utilities.cmake)
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_C_COMPILER riscv32-esp-elf-gcc)
set(CMAKE_CXX_COMPILER riscv32-esp-elf-g++)
set(CMAKE_ASM_COMPILER riscv32-esp-elf-gcc)
set(_CMAKE_TOOLCHAIN_PREFIX riscv32-esp-elf-)
remove_duplicated_flags("-march=rv32imac_zicsr_zifencei ${CMAKE_C_FLAGS}" UNIQ_CMAKE_C_FLAGS)
set(CMAKE_C_FLAGS "${UNIQ_CMAKE_C_FLAGS}" CACHE STRING "C Compiler Base Flags" FORCE)
remove_duplicated_flags("-march=rv32imac_zicsr_zifencei ${CMAKE_CXX_FLAGS}" UNIQ_CMAKE_CXX_FLAGS)
set(CMAKE_CXX_FLAGS "${UNIQ_CMAKE_CXX_FLAGS}" CACHE STRING "C++ Compiler Base Flags" FORCE)
remove_duplicated_flags("-nostartfiles -march=rv32imac_zicsr_zifencei --specs=nosys.specs \
${CMAKE_EXE_LINKER_FLAGS}"
UNIQ_CMAKE_SAFE_EXE_LINKER_FLAGS)
set(CMAKE_EXE_LINKER_FLAGS "${UNIQ_CMAKE_SAFE_EXE_LINKER_FLAGS}" CACHE STRING "Linker Base Flags" FORCE)

View File

@ -1,10 +1,11 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0
import collections
import multiprocessing
import os
import platform
from typing import Dict, Union
from typing import Dict
from typing import Union
GENERATORS: Dict[str, Union[str, Dict, list]] = collections.OrderedDict([
# - command: build command line
@ -33,7 +34,7 @@ if os.name != 'nt':
URL_TO_DOC = 'https://docs.espressif.com/projects/esp-idf'
SUPPORTED_TARGETS = ['esp32', 'esp32s2', 'esp32c3', 'esp32s3', 'esp32c2', 'esp32c6', 'esp32h2']
PREVIEW_TARGETS = ['linux', 'esp32p4', 'esp32c5']
PREVIEW_TARGETS = ['linux', 'esp32p4', 'esp32c5', 'esp32c61']
OPENOCD_TAGET_CONFIG_DEFAULT = '-f interface/ftdi/esp32_devkitj_v1.cfg -f target/{target}.cfg'
OPENOCD_TAGET_CONFIG: Dict[str, str] = {

View File

@ -94,7 +94,8 @@
"esp32c6",
"esp32c5",
"esp32h2",
"esp32p4"
"esp32p4",
"esp32c61"
],
"version_cmd": [
"riscv32-esp-elf-gdb-no-python",
@ -249,7 +250,8 @@
"esp32c2",
"esp32c6",
"esp32c5",
"esp32h2"
"esp32h2",
"esp32c61"
],
"version_cmd": [
"clang",
@ -314,7 +316,8 @@
"esp32c2",
"esp32c6",
"esp32c5",
"esp32h2"
"esp32h2",
"esp32c61"
],
"version_cmd": [
"riscv32-esp-elf-gcc",